chclau

8 ms·

31.
by chclau 4y ago
The problem is nice but the solution proposed at the website is too convoluted. The straight solution is simple. The mid door must say the truth, so left and right doors must lie. Taking these three simple facts into account, the exit is on
32.
FPGA internal tri-state buses(fpgaer.tech)
3 points by chclau 4y ago|0 comments
33.
What if Intel buys VMware(nextplatform.com)
4 points by chclau 4y ago|0 comments
34.
by chclau 4y ago
So it was not intercepted by an Alien vessel... :)
35.
by chclau 4y ago
For me is one of the loveliest series I have seen
36.
by chclau 4y ago
I am a dad of grownup children myself. My daughter is married and my son is getting married soon. One of their strongest memories is about the songs we would make them hear while traveling around in our car, when cars had CD-ROM players.
37.
Playing music in childhood linked to a sharper mind at old age(theguardian.com)
18 points by chclau 4y ago|4 comments
38.
Verifying 10B-Gates(semiwiki.com)
1 points by chclau 4y ago|0 comments
39.
A Fresh Look at HLS Value(fpgaer.tech)
2 points by chclau 4y ago|0 comments
40.
by chclau 6y ago
Thanks, I might, eventually. J. Poniachik, BTW, was a mathematician from Uruguay, very active in the field of Recreational Math, having published quite a few magazines and books about this during his life, and also created several puzzles a
41.
Trepando las dimensiones [Spanish – Recreational Math](detupoc.blogspot.com)
1 points by chclau 6y ago|3 comments
42.
A little bit of portable media storage history(linkedin.com)
1 points by chclau 6y ago|0 comments
43.
Woodturning from a Newbie(facebook.com)
1 points by chclau 6y ago|0 comments
44.
Keras and IMDB: Love, hate, sex and money(fpgaer.wordpress.com)
3 points by chclau 8y ago|0 comments
45.
FPGAs becoming more SoC-like(semiengineering.com)
112 points by chclau 8y ago|56 comments
46.
FPGA design flow summary(fpgaer.wordpress.com)
2 points by chclau 8y ago|0 comments
47.
Show HN: Organizing your tasks and design files(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments
48.
Intel Xeon processor with FPGA now shipping(fpgaer.wordpress.com)
172 points by chclau 8y ago|79 comments
49.
Xeon processor with FPGA accelerator – now shipping(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments
50.
FPGA prototyping, legally free book(fpgaer.wordpress.com)
5 points by chclau 8y ago|0 comments
51.
VHDL – signed, unsigned, and std_logic_vector(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments
52.
Show HN: VHDL Modulo counter(fpgaer.wordpress.com)
4 points by chclau 8y ago|0 comments
53.
Show HN: MIF-Gen–Intel FPGA Memory Init with Matlab(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments
54.
FPGA internal tristate buses(fpgaer.wordpress.com)
3 points by chclau 8y ago|0 comments
55.
Can AI be Conscious?(fpgaer.wordpress.com)
2 points by chclau 8y ago|1 comments
56.
Understanding Machine Learning – free book(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments
57.
VHDL or Verilog? (2017)(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments
58.
Will the Rise of Digital Media Forgery Be the End of Trust?(semiwiki.com)
1 points by chclau 8y ago|0 comments
59.
As time goes by – FPGA'er comics strip(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments
60.
Machine Learning optimizes FPGA timing(fpgaer.wordpress.com)
1 points by chclau 8y ago|0 comments

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