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chclau
searching PlanetScale…
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18 ms
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61.
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by
chclau
8y ago
Well, then I would say it was not a good interview. And yes, if you can, go to as many interviews as possible. There is a 'mood' for passing interviews and the more you do, the more you approach them with the right mood.
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by
chclau
8y ago
Difficult to say. I have interviewed lots of people over the years, and have noticed that many people in charge of the interviews barely read the CV in advance. If you were already invited to an interview, a good interviewer should make mos
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by
chclau
8y ago
Thanks for your comment. You may have noticed that duty_cycle is indeed an input. Some of the other constants could be indeed input as generics. In general I prefer to use packages, since it makes instantiation simpler, and parameterization
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Show HN: Parameterized PWM controller in VHDL
(fpgaer.wordpress.com)
22 points
by
chclau
8y ago
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2 comments
65.
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How Deep Learning works, maybe
(fpgaer.wordpress.com)
2 points
by
chclau
8y ago
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0 comments
66.
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Formal verification free ebook from Synopsis
(synopsys.com)
2 points
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chclau
8y ago
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0 comments
67.
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MIG-Gen – Matlab Utility for Intel PSG FPGA Mem. Init
(fpgaer.wordpress.com)
1 points
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chclau
8y ago
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0 comments
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Understanding Machine Learning – free book
(fpgaer.wordpress.com)
3 points
by
chclau
8y ago
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0 comments
69.
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Keeping your design files organized
(fpgaer.wordpress.com)
1 points
by
chclau
8y ago
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0 comments
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Innovate FPGA contest
(innovatefpga.com)
1 points
by
chclau
9y ago
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0 comments
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chclau
9y ago
Direct link to falcon mesa fact sheet: https://newsroom.intel.com/newsroom/wp-content/uploads/sites... (as posted at reddit by ProgrammableGatorade)
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Understanding Machine Learning – free book
(fpgasite.blogspot.com)
2 points
by
chclau
9y ago
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0 comments
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SeTI's FPGAs
(fpgasite.blogspot.com)
2 points
by
chclau
9y ago
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0 comments
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Show HN: Organizing your tasks and design files
(fpgasite.blogspot.com)
2 points
by
chclau
9y ago
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0 comments
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Can AI be Conscious?
(fpgasite.blogspot.com)
1 points
by
chclau
9y ago
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0 comments
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FPGA for dummies – free book
(fpgasite.blogspot.com)
2 points
by
chclau
9y ago
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0 comments
77.
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Show HN: Mif_gen Matlab utility for Altera mems init
(fpgasite.blogspot.com)
2 points
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chclau
9y ago
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0 comments
78.
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Guinness – GUI Based Neural Network Synthesizer
(fpgasite.blogspot.com)
1 points
by
chclau
9y ago
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0 comments
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SoC and MPSoC
(fpgasite.blogspot.com)
1 points
by
chclau
9y ago
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0 comments
80.
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Machine Learning Optimizes FPGA Timing
(fpgasite.blogspot.com)
1 points
by
chclau
9y ago
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0 comments
81.
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As time goes by – FPGA'er comics strip
(fpgasite.blogspot.com)
3 points
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chclau
9y ago
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0 comments
82.
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by
chclau
9y ago
You may be having a confusion between tristate buses and open-collector, or open-drain, drivers
83.
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by
chclau
9y ago
I am the author of the article and it may seem wrong to you but it is the way things unfolded. Once interconnections were faster than the transistors, at the beginning of the 2000's that fact was reverted, now transistors are much fast
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FPGA internal tristate buses
(fpgasite.blogspot.com)
35 points
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chclau
9y ago
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10 comments
85.
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Show HN: VHDL pseudo random generator tutorial (three parts)
(fpgasite.blogspot.com)
2 points
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chclau
9y ago
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0 comments
86.
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An Artificial Intelligence Developed Its Own Non-Human Language
(theatlantic.com)
1 points
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chclau
9y ago
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0 comments
87.
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Introduction to Verilog
(fpgasite.blogspot.com)
3 points
by
chclau
9y ago
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0 comments
88.
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High Speed Serial I/O – free book
(fpgasite.blogspot.com)
2 points
by
chclau
9y ago
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0 comments
89.
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by
chclau
9y ago
I don't know ADA, I have always thought that Verilog is like old C and VHDL like C++. Not that VHDL is object oriented, but is a strong-typed language.
90.
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by
chclau
9y ago
For many years now I have been using mainly Altera and VHDL. Lately I started a new job and returned to Xilinx which I have not used for long. Part of my job is integrating three major IPs, and guess what? One of them is VHDL and two others
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