12 ms·

Western Digital Plans to Ship More Than One Billion RISC-V Cores a Year

371 points by deepnotderp 9y ago

sverige 9y ago
I haven't been following the RISC-V story too closely, possibly because I didn't want to get my hopes up only to be dashed. From the article, it sounds like these cores will be developed solely for use in data storage. Can someone with more knowledge tell whether this will help provide the kind of production volume needed to make consumer products (like laptops and desktops) more likely to be viable? Are general purpose chips likely to be one result of the development of RISC-V, or have I missed something fundamental?
- wmf 9y ago
  whether this will help provide the kind of production volume needed to make consumer products (like laptops and desktops) more likely to be viable? It probably won't, despite a lot of wishful thinking to the contrary. Are general purpose chips likely to be one result of the development of RISC-V, or have I missed something fundamental? Out of the whole RISC-V ecosystem it looks like only SiFive is working on that, so it will take time.
  - guelo 9y ago
    The announcement does say "we are providing all of our RISC-V logic work to the community." Whatever that means.
    - garmaine 9y ago
      It means essentially “open source,” its just that this time the source code is in a hardware definition language.
  - microcolonel 9y ago
    > Out of the whole RISC-V ecosystem it looks like only SiFive is working on that, so it will take time. If you look at Qualcomm's strategy with x86 competition (using Dynamic Binary Translation), it's not hard to imagine that they might consider building RISC-V application processors; especially once they've proven their ability to deliver enough compatibility and performance with DBT to compete on ISAs for which their device is not licensed (and especially if they are sued by Intel and win, one of those things where you'd jump for joy if you saw a C&D in the mail).
    - hawski 9y ago
      Can Qualcomm do that? Tegra K1 from nVidia was supposed to be x86 in similar way. They couldn't get a license so it became an ARM core.
      - microcolonel 9y ago
        > Can Qualcomm do that? Tegra K1 from nVidia was supposed to be x86 in similar way. They couldn't get a license so it became an ARM core. NVIDIA bought Transmeta; Transmeta basically proved (by being sued into insolvency) that they couldn't compete on (up to date, still under patent) x86 with hardware or whole-system software DBT for licensing reasons. NVIDIA's K1/Denver products are very similar to Transmeta architectures still, but for ARMv8 instead of x86(or, more interesting, AMD64), and in this case they have an architectural license. What Qualcomm is doing is different. Qualcomm is doing software-only Dynamic Binary Translation, and they're doing it on a per-application basis (similar to the Mac 68K emulator, Rosetta, WOW64, or QEMU user mode).
  - deepnotderp 9y ago
    Esperanto Technologies is working on high performance general purpose RISC-V processors.
- garmaine 9y ago
  You should read up on SiFive.
  - ac29 9y ago
    Specifically their Freedom products [0], which are multicore, 1GHz+ CPUs, with support for standard interfaces like PCIe 3.0, USB 3.0, GbE, DDR3/4.... and ship with Linux support. Not about to disrupt Intel, AMD, or ARM in the laptop/desktop/server space just yet, but relatively high performance, modern RISC-V SoCs are definitely out there. [0] https://www.sifive.com/products/freedom/ https://www.sifive.com/products/freedom/
    - zokier 9y ago
      > and ship with Linux support Just to point out that they are not actually shipping that fancy HW yet, with or without Linux support. It might materialize one day, but that day is not today.
      - fasquoika 9y ago
        They do have a way to set up FPGAs for it though, so it's clearly not entirely vaporware
      - baobrien 9y ago
        According to the workshop summary, they plan to ship a Linux capable dev board with hard U54 silicon in Q1 of 2018. http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-day-one/ http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-...
- mtgx 9y ago
  It helps that the ISA is supported in more places, even if for awareness alone. Compare where ARM was 10 years ago, where it was 5 years ago, and now we're discussing having competitive alternatives to Intel and AMD in servers. As new developments seem to happen at an accelerated pace, RISC-V should also see more accelerated adoption. It won't take 30 years to get get to where ARM is today. Maybe only 10, or less.
  - seanmcdirmid 9y ago
    10 years ago was when the iPhone came out, ARM was already fairly established, better to look at intel’s strongarm acquisition almost 20 years ago, when ARM’s future was much more in doubt.
- Symmetry 9y ago
  Probably we won't be seeing RISC-V application processors for quite a while. There's a lot of stuff that can just be recompiled but there's also a lot of hand-tuned assembly that goes into making a JIT or media codec fast. That's why we're seeing initial adoption in the embedded space, where either there's just a small amount of code to recompile or you were going to rewrite the assembly anyways for the next product. In the long run using RISC-V in a laptop is a possibility. And there might be some limited production $2000 500MHz FOSS laptop soonish. But in 15 years, say, I could see RISC-V being where ARM is now.
  - sitkack 9y ago
    You can already run Debian [0] RISCV. [0] https://wiki.debian.org/RISC-V https://wiki.debian.org/RISC-V https://github.com/riscv/riscv-linux https://github.com/riscv/riscv-linux
  - frankharv 9y ago
    FreeBSD has been in the works since 2016... [0]https://wiki.freebsd.org/riscv https://wiki.freebsd.org/riscv
  - pjmlp 9y ago
    In the context of JIT, there is ongoing work to port at least OpenJDK and JikesRVM.
0xFFC 9y ago
This was what I exactly predicted one year ago. Risk-V ISA is coming for all of them{x86,arm,mips}. And this is very smart move by WD to jump into Risk-V wagon. Update: Why do people downvote? I honestly don’t understand.
- phkahler 9y ago
  >> Why do people downvote? Because they can't handle the fact that you're right. RISC-V is coming for all of them. I like your phrasing too, it's accurate but I guess people think it's more pretentious. Only time will tell for sure.
  - pjc50 9y ago
    There's a lot of wishful thinking involved in this. It's like Linux on the desktop: doable but very much a fringe thing.
    - garmaine 9y ago
      Why is it any more fringe than, say, hoping for an ARM laptop?
      - wmf 9y ago
        ARM laptops already exist BTW using smartphone SoCs. The R&D has already been done and paid for. A RISC-V server or desktop processor would have to be created essentially from scratch.
        phkahler 9y ago
        >> A RISC-V server or desktop processor would have to be created essentially from scratch. I'd love to see AMD or Intel build a chip on the RISC-V instruction set and use all their existing infrastructure around that. I would not be surprised it they could achieve higher benchmark performance than their x86 offerings. For someone else to achieve the same level of performance will take a while, but there are multiple groups working on it.
microcolonel 9y ago
I think the level of industry enthusiasm for RISC-V is so palpable, in part, because the messaging from day one has been unequivocally: RISC-V will be the standard ISA for every form factor, in every market. Can't wait to put a RISC-V SBC in my ThinkPad X220 chassis. :- )
- mr_spothawk 9y ago
  > a RISC-V SBC in my ThinkPad X220 chassis afk, changing pants
- anderspitman 9y ago
  I'm so excited that we're feasibly within a year or two of being able to develop embedded devices in Rust[0] on RISC-V microcontrollers [1] running on open source RTOSes also written in Rust[2]. It's currently already possible but still requires quite a bit of hacking. Plus the RF stacks (Bluetooth in particular) aren't there yet. What a time to be a developer. PS RISC-V on my X220 wouldn't hurt either. [0] http://blog.japaric.io/quickstart/ http://blog.japaric.io/quickstart/ [1] https://www.sifive.com/products/hifive1/ https://www.sifive.com/products/hifive1/ [2] https://www.tockos.org/ https://www.tockos.org/
  - microcolonel 9y ago
    > I'm so excited that we're feasibly within a year or two of being able to develop embedded devices in Rust[0] on RISC-V microcontrollers I'm happy to report that the future is yesterday![0][1] (sort of) > Plus the RF stacks (Bluetooth in particular) aren't there yet. Espressif is a RISC-V foundation member, and you know what that means. (hint: it rhymes with could-pie den-sill-hiccup)† :- ) [0]: https://abopen.com/news/rust-comes-risc-v/ https://abopen.com/news/rust-comes-risc-v/ [1]: https://github.com/dvc94ch/hifive https://github.com/dvc94ch/hifive † «Goodbye Tensilica» (sorry Tensilica, I have nothing against you!)
    - anderspitman 9y ago
      Very nice. I actually hadn't realized Tensilica wasn't an Espressif technology. That would definitely be sweet if they switched to RISC-V
H99189 9y ago
I like the idea behind RISC-V's open architecture but I had a question. Does it do or even try to do anything about the cloud of uncertainty surrounding Intel ME and the AMD equivalent in x86?
- microcolonel 9y ago
  I don't think it necessarily addresses that concern, but Machine mode might be the right place to address the concerns which ME addresses on a RISC-V machine; which means that it's at least more likely that it'll be programmable on whatever machine you're looking at. Just a thought though, it could really go any way. The nice thing though, is that you'll have more than two vendors, which means that the niche of PSP/ME paranoids may be large enough to address for a smaller designer, or through a limited run of licensed design (like SiFive's).
  - sverige 9y ago
    I'm one of the paranoids. This is one of the main things I'm hoping for. Is there any indication of what price point such chips might be offered at? I have no idea how much it costs to set up fabrication, etc., but it seems like ARM chips have done very well.
    - erikj 9y ago
      ARM chips have a much higher production volume so they are going to be much cheaper than RISC-V chips, at least for the foreseeable future.
    - pjc50 9y ago
      How long is a piece of string? It depends entirely on features and performance. Like Intel and arm chips have a 10x range of cost.
- pedroaraujo 9y ago
  RISC-V is not an architecture, it is just an instruction set. People still need to design the architecture for an implementation of RISC-V. Intel ME is a co-processor that runs at the same time as the main processor, it is not related to the instruction set. To answer your question: Intel ME is a problem that happens on an higher level than the document that defines instruction set.
Numberwang 9y ago
I have not been following this, what are the advantages?
- microcolonel 9y ago
  Smaller designs, easier to license designs, simpler and more attractive ISA extension mechanisms, no royalties, no license negotiation periods, no incremental cost to adding more cores of different designs.
- tw04 9y ago
  For you as an end-user? Nothing. For WD? They escape paying ARM licensing fees on every drive. They'll see an extra couple points of margin on every hard drive they sell.
- linkregister 9y ago
  It's a bid deal for RISC-V enthusiasts, who are delighted to see it in consumer products.
erikj 9y ago
So WD is switching their hardware to in-house designed processors after purchasing a RISC-V developer, do I understand this press release correctly?
- microcolonel 9y ago
  WD had already been a RISC-V foundation member before their involvement with Esperanto Technologies (who has also been a member for a while). I suspect they saw Esperanto's portfolio and team after meeting at one of the workshops, and bought into it because of preexisting interest in RISC-V. Just to be clear, I think they bought into Esperanto, but I don't think they acquired it. Much public communication implies that Esperanto Technologies is still generally autonomous[0][1]. [0]: https://twitter.com/rickbmerritt/status/935600820300713985 https://twitter.com/rickbmerritt/status/935600820300713985 [1]: https://twitter.com/EsperantoTech/status/935598028773138432 https://twitter.com/EsperantoTech/status/935598028773138432
jstewartmobile 9y ago
I guess this will be nice for industry, which may pass the savings along to the consumer, but as far as having auditable hardware that you have some control over, I don't see how this is any better than the ARM SoCs we already have--unless you're going to roll your own system on an FPGA. That, and I'm kind of disappointed everyone has drunk the RISC kool-aid. I think a lot of RISC "performance" has more to do with compilers catering to the least common denominator than anything else. If you had a language/compiler that took better advantage of a stack architecture, or even a CISC architecture, the performance would probably be just as good if not better. I was particularly impressed by Baker's old paper[0] on stack architectures in service of his Linear Lisp idea. [0] http://home.pipeline.com/~hbaker1/ForthStack.html http://home.pipeline.com/~hbaker1/ForthStack.html
- pkaye 9y ago
  RISC-V benefits is mostly an open source license that is free of patents. I think the biggest reason for it is academic... there needs to be an open platform for academic research. I'm sure it is next to impossible for an average university to do that on ARM or x86 architecture.
  - jstewartmobile 9y ago
    Were there any academic obstructions to OpenRISC or OpenSPARC?
    - anderspitman 9y ago
      https://riscv.org/2014/10/why-not-build-on-openrisc/ https://riscv.org/2014/10/why-not-build-on-openrisc/
  - nabla9 9y ago
    RISC-V is just ISA. I don't think ISA's can be patented. Just some specific instructions.
    - pkaye 9y ago
ac29 9y ago
Presentation slides: http://innovation.wdc.com/downloads/RISC-V-Presentation.pdf http://innovation.wdc.com/downloads/RISC-V-Presentation.pdf Presentation brief slides: http://innovation.wdc.com/downloads/RISC-V-Presentation-Brief-forWeb.pdf http://innovation.wdc.com/downloads/RISC-V-Presentation-Brie...
- gbrown_ 9y ago
  Talk about buzzword bingo.
  - eeZah7Ux 9y ago
    It's almost a parody.
csense 9y ago
From the headline, I would guess WD is putting a user accessible CPU in each of their disk drives, idea being that if you have a CPU living close to the drive, then e.g. map+reduce workloads can be more efficiently executed. Instead of going with ARM or Intel, I guess the CPU's are using some less famous architecture called RISC-V. Then I read the article, and the article is so full of buzzwords and genericisms that after reading the whole thing, I don't know if this guess is correct.
- Symmetry 9y ago
  In order to move the reader head inside your drive and to communicate with the host CPU you need microprocessors in your hard driver, really tiny ones. Now, instead of paying ARM for licences to use them WD is using open source processors that don't come with fees besides what it takes to manufacture them.
  - tyingq 9y ago
    This is the right answer...they already use ARM, they want a one-time-fee license instead of royalties. Trying to shave a little margin.
    - eroccatlun 9y ago
      Sounds ... RiskV. YYYEEEAAAAAAHHHHHHHH!
      - ficklepickle 9y ago
        Was I supposed to see the CSI Miami guy when I read that?
      - rubatuga 9y ago
        I know these comments aren’t really allowed but I laughed
    - _chris_ 9y ago
      WD made it clear in there talk that this wasn't about saving on costs, but rather having control over the innovation in the data space. I don't see any reason to doubt them. It's an incredible risk to switch their entire company over to a still-growing ISA. But being able to design and modify any particular core as they see fit without having to talk to lawyers or negotiate a new contract... that's an incredible power.
nolanpro 9y ago
"RISC" is a terrible name for anything related to computing
- pavlov 9y ago
  Advanced RISC Machines (ARM) doesn't seem to have suffered from the association.
technofiend 9y ago
I haven't dug through all the marketing speak yet but this seems like it's tangentially related to WD's He8 converged servers they've been sampling, which were ARM-based and ran Debian Jessie. [0] Although when I saw them spoke about in Redhat Summit of course they were mooted to be running RHEL. It would be interesting to see if WD Labs is now sampling RISC-V-based boards running Redhat and Ceph OSD software which like the He8. I found the whole concept of on-board PCB with dual gig ethernet ports fascinating and I believe there's a second generation with faster network speeds. Unfortunately WD never seem to have gone mainstream with it. [0] http://ceph.com/geen-categorie/500-osd-ceph-cluster/ http://ceph.com/geen-categorie/500-osd-ceph-cluster/
- lovemenot 9y ago
  Language used in the article - edge computing and fast data - suggests WD is going after potential new markets indicated in the a16z presentation [1]. The He8 concept seems to make sense in that context. So it would not be surprising to see RISC-V extended to better support this new category: call it locally-edge-attached-fast-storage. [1] https://a16z.com/2016/12/16/the-end-of-cloud-computing/ https://a16z.com/2016/12/16/the-end-of-cloud-computing/
- kijiki 9y ago
  I am similarly disappointed that this didn't go mainstream. At Cumulus we did a follow up experiment to the one in your link, with the WD labs folks using Cumulus Linux switches. The idea was that you'd run the Ceph monitors on the switches, and the OSDs on the hard drives, and you'd have an entire storage array with no servers needed. Was very neat, but pointless unless you can buy the drives...
  - sitkack 9y ago
    WD could easily take on Intel and AMD for datacenter workloads if computation starts moving to the drives. Drives have mass causing more Data Gravity. Data Gravity is literally money.
milesf 9y ago
I remember RISC's back in the late 80's/early 90's. CISC's bullied them away and we've been stuck in Intel's quagmire every since. Anytime there's an attack on the status quo, the established players feign concern and beat back the attack then return to the way things were (remember Negroponte's $100 laptop and the netbook response?) No idea how this will pan out.
- zokier 9y ago
  RISCV is pretty far from attacking Intel anywhere. ARM is the one that should be both worried about RISCV and simultaneously be a cause of worry for Intel.
- tzahola 9y ago
  >CISC's bullied them away and we've been stuck in Intel's quagmire every since You know that ARM means Advanced RISC Machine, right?
  - pjmlp 9y ago
    In the early days. ARMv8-A 64 has gotten a bit CISC.
- astrodust 9y ago
  It wasn't that CISC won or that RISC lost, it was that the architectures got so blurry you couldn't tell one from the other. There's so much microcode in a CPU now that the instruction set is just the icing layer on the cake. Internally there's surprising amounts of commonality between PowerPC, ARM and x86 type chips. Plus PowerPC started to adopt CISC-like instructions, x86-64 started to adopt RISC-like features such as having a multitude of generic registers, and here we are where nobody cares about the distinction. Don't forget that while Intel won in certain markets, like notebooks, desktops and servers, it's absolutely, utterly irrelevant in other places that ship far, far more CPUs. A typical car may have as many as one hundred CPUs of various types, typically at least fifty, many of them PowerPC for power and legacy reasons. Your phone is probably ARM. Remote controls. Routers. Switches. Refrigerators. Thermostats. Televisions and displays. Hard drives. Keyboards and mice. Basically anything that needs some kind of compute capability probably has a non-Intel processor. If there's a quagmire we're stuck in it's that we're surrounded by thousands of devices that are likely full of vulnerabilities that can never, will ever be fixed.
asb 9y ago
If you're interested in what's going on at the RISC-V Workshop, you might want to follow my live blog here: http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-day-one/ http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-...
- mhayenga 9y ago
  You really do an amazing job writing these up. Back when I used to work at ARM and attended the 3rd workshop, I ended up just pointing people to your write-up rather than my own notes.
- madez 9y ago
  Let me thank you for providing the excellent write-up. I eagerly wait for news from lowRISC in hope for a SBC with general purpose Linux support. This would open up the hardware in general, and thus be a major step in a good direction. I do have a question, though. Is there any plan for working on an architecture for massively parallelizable workloads, like graphics, artifical neural networks and simulations? Especially the talk by Dave Ditzel seems relevant to this. Even without competitive performance, that would be another major step. It would not only improve the situation by the amount of the necessary efforts for that, but by raising the bar for all the other vendors by being compared to that. There is a factor between your work and the impact on the ecosystem, and I guess it is significantly higher than one.
flamedoge 9y ago
everybody makes processors!
rijoja 9y ago
Well what I find interesting here is if they are able to manufacture chips with 7nm litography. Aren't intel and samsung who I belive to be the leaders in the field, still at 14 nm? In case WD manages to beat them to the market with this technology at least there will be a lot of hype around this. As far as binary compability is concerned this is more or less a thing of the past. The way I see it js and other interpreted languages provide for the most vibrant ecosystem at the moment. Where we have package management running not over only kernels but also distributions. Before this developers have gotten really acustomed to compiling into platform independent bytecode. And even windows which in comparison with Linux has been ported to few platforms is by no means impossible to move over to a new instruction set. As have been demonstrated multiple times. Even C itself was developed to make few assumptions in regards to the metal. If you please, excuse me for reiterating facts well known to the average HN reader. Furthermore with developers more or less requiring to work with open source software as it makes debugging and making use of other developers experiences easier. The probability that you will be stuck with CPU specific binaries of any given program is slim. Now the problem is "only" to find programmers capable of programming 4096 CPU cores to operate well simultaneously, in a world where it's completely accepted and right, for a text editor to eat up hundreds of megabytes of ram displaying the source code for a hello world program. Also for this to truly make a dent the development has to span all the way from the metal via the kernel and to the actual application. Unfortunately I am afraid that the open license will mean very little, from a freedom point of view as they take this route out of the pragmatic reasons, briefly mentioned above, not to make an ideological stand. Nonetheless it's a step forward so I'll try to supress my cynicism.
- deepnotderp 9y ago
  "Well what I find interesting here is if they are able to manufacture chips with 7nm litography. " They're going to be using TSMC "7nm". At this point nm node names from anyone mean absolutely nothing. Just know that TSMC "7nm" ~= Intel "10nm"
  - rijoja 9y ago
    Aha thank you for clearing that out.
tonmoy 9y ago
This is so exciting, can’t wait for all the open source contributions to RISC-V WD will make
- phkahler 9y ago
  It is an interesting play. I didn't think WD would be all that relevant, but... I figured with open ISA the CPU would no longer be a significant piece of IP and competition and leadership would move to those with graphics IP. OTOH if tightly coupled CPU and storage was to become a big thing then storage companies would be the big winners (maybe just in some markets). But the fact that they talk about contributing back is interesting. If companies with GFX or storage want their specialty to become the real value, they will benefit by contributing high quality IP to the open CPU movement thereby destroying the market for the old guard (CPU makers).
sandGorgon 9y ago
Does anyone know what is the state of the processor that they are proposing to ship ? Has it already gone to GDS? Or is this simply at proposal stage right now (mwani1the hardware is still RTL or netlist).
dfee 9y ago
A primer on the RISC vs CISC debate that helped me understand why this matters: http://cs.stanford.edu/people/eroberts/courses/soco/projects/2000-01/risc/risccisc/ http://cs.stanford.edu/people/eroberts/courses/soco/projects...

371 points by deepnotderp 9y ago

I haven't been following the RISC-V story too closely, possibly because I didn't want to get my hopes up only to be dashed. From the article, it sounds like these cores will be developed solely for use in data storage. Can someone with more knowledge tell whether this will help provide the kind of production volume needed to make consumer products (like laptops and desktops) more likely to be viable? Are general purpose chips likely to be one result of the development of RISC-V, or have I missed something fundamental?

wmf 9y ago
whether this will help provide the kind of production volume needed to make consumer products (like laptops and desktops) more likely to be viable? It probably won't, despite a lot of wishful thinking to the contrary. Are general purpose chips likely to be one result of the development of RISC-V, or have I missed something fundamental? Out of the whole RISC-V ecosystem it looks like only SiFive is working on that, so it will take time.
- guelo 9y ago
  The announcement does say "we are providing all of our RISC-V logic work to the community." Whatever that means.
  - garmaine 9y ago
    It means essentially “open source,” its just that this time the source code is in a hardware definition language.
- microcolonel 9y ago
  > Out of the whole RISC-V ecosystem it looks like only SiFive is working on that, so it will take time. If you look at Qualcomm's strategy with x86 competition (using Dynamic Binary Translation), it's not hard to imagine that they might consider building RISC-V application processors; especially once they've proven their ability to deliver enough compatibility and performance with DBT to compete on ISAs for which their device is not licensed (and especially if they are sued by Intel and win, one of those things where you'd jump for joy if you saw a C&D in the mail).
  - hawski 9y ago
    Can Qualcomm do that? Tegra K1 from nVidia was supposed to be x86 in similar way. They couldn't get a license so it became an ARM core.
    - microcolonel 9y ago
      > Can Qualcomm do that? Tegra K1 from nVidia was supposed to be x86 in similar way. They couldn't get a license so it became an ARM core. NVIDIA bought Transmeta; Transmeta basically proved (by being sued into insolvency) that they couldn't compete on (up to date, still under patent) x86 with hardware or whole-system software DBT for licensing reasons. NVIDIA's K1/Denver products are very similar to Transmeta architectures still, but for ARMv8 instead of x86(or, more interesting, AMD64), and in this case they have an architectural license. What Qualcomm is doing is different. Qualcomm is doing software-only Dynamic Binary Translation, and they're doing it on a per-application basis (similar to the Mac 68K emulator, Rosetta, WOW64, or QEMU user mode).
- deepnotderp 9y ago
  Esperanto Technologies is working on high performance general purpose RISC-V processors.
garmaine 9y ago
You should read up on SiFive.
- ac29 9y ago
  Specifically their Freedom products [0], which are multicore, 1GHz+ CPUs, with support for standard interfaces like PCIe 3.0, USB 3.0, GbE, DDR3/4.... and ship with Linux support. Not about to disrupt Intel, AMD, or ARM in the laptop/desktop/server space just yet, but relatively high performance, modern RISC-V SoCs are definitely out there. [0] https://www.sifive.com/products/freedom/ https://www.sifive.com/products/freedom/
  - zokier 9y ago
    > and ship with Linux support Just to point out that they are not actually shipping that fancy HW yet, with or without Linux support. It might materialize one day, but that day is not today.
    - fasquoika 9y ago
      They do have a way to set up FPGAs for it though, so it's clearly not entirely vaporware
    - baobrien 9y ago
      According to the workshop summary, they plan to ship a Linux capable dev board with hard U54 silicon in Q1 of 2018. http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-day-one/ http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-...
mtgx 9y ago
It helps that the ISA is supported in more places, even if for awareness alone. Compare where ARM was 10 years ago, where it was 5 years ago, and now we're discussing having competitive alternatives to Intel and AMD in servers. As new developments seem to happen at an accelerated pace, RISC-V should also see more accelerated adoption. It won't take 30 years to get get to where ARM is today. Maybe only 10, or less.
- seanmcdirmid 9y ago
  10 years ago was when the iPhone came out, ARM was already fairly established, better to look at intel’s strongarm acquisition almost 20 years ago, when ARM’s future was much more in doubt.
Symmetry 9y ago
Probably we won't be seeing RISC-V application processors for quite a while. There's a lot of stuff that can just be recompiled but there's also a lot of hand-tuned assembly that goes into making a JIT or media codec fast. That's why we're seeing initial adoption in the embedded space, where either there's just a small amount of code to recompile or you were going to rewrite the assembly anyways for the next product. In the long run using RISC-V in a laptop is a possibility. And there might be some limited production $2000 500MHz FOSS laptop soonish. But in 15 years, say, I could see RISC-V being where ARM is now.
- sitkack 9y ago
  You can already run Debian [0] RISCV. [0] https://wiki.debian.org/RISC-V https://wiki.debian.org/RISC-V https://github.com/riscv/riscv-linux https://github.com/riscv/riscv-linux
- frankharv 9y ago
  FreeBSD has been in the works since 2016... [0]https://wiki.freebsd.org/riscv https://wiki.freebsd.org/riscv
- pjmlp 9y ago
  In the context of JIT, there is ongoing work to port at least OpenJDK and JikesRVM.

0xFFC 9y ago

This was what I exactly predicted one year ago. Risk-V ISA is coming for all of them{x86,arm,mips}. And this is very smart move by WD to jump into Risk-V wagon. Update: Why do people downvote? I honestly don’t understand.

phkahler 9y ago
>> Why do people downvote? Because they can't handle the fact that you're right. RISC-V is coming for all of them. I like your phrasing too, it's accurate but I guess people think it's more pretentious. Only time will tell for sure.
- pjc50 9y ago
  There's a lot of wishful thinking involved in this. It's like Linux on the desktop: doable but very much a fringe thing.
  - garmaine 9y ago
    Why is it any more fringe than, say, hoping for an ARM laptop?
    - wmf 9y ago
      ARM laptops already exist BTW using smartphone SoCs. The R&D has already been done and paid for. A RISC-V server or desktop processor would have to be created essentially from scratch.
      - phkahler 9y ago
        >> A RISC-V server or desktop processor would have to be created essentially from scratch. I'd love to see AMD or Intel build a chip on the RISC-V instruction set and use all their existing infrastructure around that. I would not be surprised it they could achieve higher benchmark performance than their x86 offerings. For someone else to achieve the same level of performance will take a while, but there are multiple groups working on it.

microcolonel 9y ago

I think the level of industry enthusiasm for RISC-V is so palpable, in part, because the messaging from day one has been unequivocally: RISC-V will be the standard ISA for every form factor, in every market. Can't wait to put a RISC-V SBC in my ThinkPad X220 chassis. :- )

mr_spothawk 9y ago
> a RISC-V SBC in my ThinkPad X220 chassis afk, changing pants
anderspitman 9y ago
I'm so excited that we're feasibly within a year or two of being able to develop embedded devices in Rust[0] on RISC-V microcontrollers [1] running on open source RTOSes also written in Rust[2]. It's currently already possible but still requires quite a bit of hacking. Plus the RF stacks (Bluetooth in particular) aren't there yet. What a time to be a developer. PS RISC-V on my X220 wouldn't hurt either. [0] http://blog.japaric.io/quickstart/ http://blog.japaric.io/quickstart/ [1] https://www.sifive.com/products/hifive1/ https://www.sifive.com/products/hifive1/ [2] https://www.tockos.org/ https://www.tockos.org/
- microcolonel 9y ago
  > I'm so excited that we're feasibly within a year or two of being able to develop embedded devices in Rust[0] on RISC-V microcontrollers I'm happy to report that the future is yesterday![0][1] (sort of) > Plus the RF stacks (Bluetooth in particular) aren't there yet. Espressif is a RISC-V foundation member, and you know what that means. (hint: it rhymes with could-pie den-sill-hiccup)† :- ) [0]: https://abopen.com/news/rust-comes-risc-v/ https://abopen.com/news/rust-comes-risc-v/ [1]: https://github.com/dvc94ch/hifive https://github.com/dvc94ch/hifive † «Goodbye Tensilica» (sorry Tensilica, I have nothing against you!)
  - anderspitman 9y ago
    Very nice. I actually hadn't realized Tensilica wasn't an Espressif technology. That would definitely be sweet if they switched to RISC-V

H99189 9y ago

I like the idea behind RISC-V's open architecture but I had a question. Does it do or even try to do anything about the cloud of uncertainty surrounding Intel ME and the AMD equivalent in x86?

microcolonel 9y ago
I don't think it necessarily addresses that concern, but Machine mode might be the right place to address the concerns which ME addresses on a RISC-V machine; which means that it's at least more likely that it'll be programmable on whatever machine you're looking at. Just a thought though, it could really go any way. The nice thing though, is that you'll have more than two vendors, which means that the niche of PSP/ME paranoids may be large enough to address for a smaller designer, or through a limited run of licensed design (like SiFive's).
- sverige 9y ago
  I'm one of the paranoids. This is one of the main things I'm hoping for. Is there any indication of what price point such chips might be offered at? I have no idea how much it costs to set up fabrication, etc., but it seems like ARM chips have done very well.
  - erikj 9y ago
    ARM chips have a much higher production volume so they are going to be much cheaper than RISC-V chips, at least for the foreseeable future.
  - pjc50 9y ago
    How long is a piece of string? It depends entirely on features and performance. Like Intel and arm chips have a 10x range of cost.
pedroaraujo 9y ago
RISC-V is not an architecture, it is just an instruction set. People still need to design the architecture for an implementation of RISC-V. Intel ME is a co-processor that runs at the same time as the main processor, it is not related to the instruction set. To answer your question: Intel ME is a problem that happens on an higher level than the document that defines instruction set.

Numberwang 9y ago

I have not been following this, what are the advantages?

microcolonel 9y ago
Smaller designs, easier to license designs, simpler and more attractive ISA extension mechanisms, no royalties, no license negotiation periods, no incremental cost to adding more cores of different designs.
tw04 9y ago
For you as an end-user? Nothing. For WD? They escape paying ARM licensing fees on every drive. They'll see an extra couple points of margin on every hard drive they sell.
linkregister 9y ago
It's a bid deal for RISC-V enthusiasts, who are delighted to see it in consumer products.

erikj 9y ago

So WD is switching their hardware to in-house designed processors after purchasing a RISC-V developer, do I understand this press release correctly?

microcolonel 9y ago
WD had already been a RISC-V foundation member before their involvement with Esperanto Technologies (who has also been a member for a while). I suspect they saw Esperanto's portfolio and team after meeting at one of the workshops, and bought into it because of preexisting interest in RISC-V. Just to be clear, I think they bought into Esperanto, but I don't think they acquired it. Much public communication implies that Esperanto Technologies is still generally autonomous[0][1]. [0]: https://twitter.com/rickbmerritt/status/935600820300713985 https://twitter.com/rickbmerritt/status/935600820300713985 [1]: https://twitter.com/EsperantoTech/status/935598028773138432 https://twitter.com/EsperantoTech/status/935598028773138432

jstewartmobile 9y ago

I guess this will be nice for industry, which may pass the savings along to the consumer, but as far as having auditable hardware that you have some control over, I don't see how this is any better than the ARM SoCs we already have--unless you're going to roll your own system on an FPGA. That, and I'm kind of disappointed everyone has drunk the RISC kool-aid. I think a lot of RISC "performance" has more to do with compilers catering to the least common denominator than anything else. If you had a language/compiler that took better advantage of a stack architecture, or even a CISC architecture, the performance would probably be just as good if not better. I was particularly impressed by Baker's old paper[0] on stack architectures in service of his Linear Lisp idea. [0] http://home.pipeline.com/~hbaker1/ForthStack.html http://home.pipeline.com/~hbaker1/ForthStack.html

pkaye 9y ago
RISC-V benefits is mostly an open source license that is free of patents. I think the biggest reason for it is academic... there needs to be an open platform for academic research. I'm sure it is next to impossible for an average university to do that on ARM or x86 architecture.
- jstewartmobile 9y ago
  Were there any academic obstructions to OpenRISC or OpenSPARC?
  - anderspitman 9y ago
    https://riscv.org/2014/10/why-not-build-on-openrisc/ https://riscv.org/2014/10/why-not-build-on-openrisc/
- nabla9 9y ago
  RISC-V is just ISA. I don't think ISA's can be patented. Just some specific instructions.
  - pkaye 9y ago

ac29 9y ago

Presentation slides: http://innovation.wdc.com/downloads/RISC-V-Presentation.pdf http://innovation.wdc.com/downloads/RISC-V-Presentation.pdf Presentation brief slides: http://innovation.wdc.com/downloads/RISC-V-Presentation-Brief-forWeb.pdf http://innovation.wdc.com/downloads/RISC-V-Presentation-Brie...

gbrown_ 9y ago
Talk about buzzword bingo.
- eeZah7Ux 9y ago
  It's almost a parody.

csense 9y ago

From the headline, I would guess WD is putting a user accessible CPU in each of their disk drives, idea being that if you have a CPU living close to the drive, then e.g. map+reduce workloads can be more efficiently executed. Instead of going with ARM or Intel, I guess the CPU's are using some less famous architecture called RISC-V. Then I read the article, and the article is so full of buzzwords and genericisms that after reading the whole thing, I don't know if this guess is correct.

Symmetry 9y ago
In order to move the reader head inside your drive and to communicate with the host CPU you need microprocessors in your hard driver, really tiny ones. Now, instead of paying ARM for licences to use them WD is using open source processors that don't come with fees besides what it takes to manufacture them.
- tyingq 9y ago
  This is the right answer...they already use ARM, they want a one-time-fee license instead of royalties. Trying to shave a little margin.
  - eroccatlun 9y ago
    Sounds ... RiskV. YYYEEEAAAAAAHHHHHHHH!
    - ficklepickle 9y ago
      Was I supposed to see the CSI Miami guy when I read that?
    - rubatuga 9y ago
      I know these comments aren’t really allowed but I laughed
  - _chris_ 9y ago
    WD made it clear in there talk that this wasn't about saving on costs, but rather having control over the innovation in the data space. I don't see any reason to doubt them. It's an incredible risk to switch their entire company over to a still-growing ISA. But being able to design and modify any particular core as they see fit without having to talk to lawyers or negotiate a new contract... that's an incredible power.

nolanpro 9y ago

"RISC" is a terrible name for anything related to computing

pavlov 9y ago
Advanced RISC Machines (ARM) doesn't seem to have suffered from the association.

technofiend 9y ago

I haven't dug through all the marketing speak yet but this seems like it's tangentially related to WD's He8 converged servers they've been sampling, which were ARM-based and ran Debian Jessie. [0] Although when I saw them spoke about in Redhat Summit of course they were mooted to be running RHEL. It would be interesting to see if WD Labs is now sampling RISC-V-based boards running Redhat and Ceph OSD software which like the He8. I found the whole concept of on-board PCB with dual gig ethernet ports fascinating and I believe there's a second generation with faster network speeds. Unfortunately WD never seem to have gone mainstream with it. [0] http://ceph.com/geen-categorie/500-osd-ceph-cluster/ http://ceph.com/geen-categorie/500-osd-ceph-cluster/

lovemenot 9y ago
Language used in the article - edge computing and fast data - suggests WD is going after potential new markets indicated in the a16z presentation [1]. The He8 concept seems to make sense in that context. So it would not be surprising to see RISC-V extended to better support this new category: call it locally-edge-attached-fast-storage. [1] https://a16z.com/2016/12/16/the-end-of-cloud-computing/ https://a16z.com/2016/12/16/the-end-of-cloud-computing/
kijiki 9y ago
I am similarly disappointed that this didn't go mainstream. At Cumulus we did a follow up experiment to the one in your link, with the WD labs folks using Cumulus Linux switches. The idea was that you'd run the Ceph monitors on the switches, and the OSDs on the hard drives, and you'd have an entire storage array with no servers needed. Was very neat, but pointless unless you can buy the drives...
- sitkack 9y ago
  WD could easily take on Intel and AMD for datacenter workloads if computation starts moving to the drives. Drives have mass causing more Data Gravity. Data Gravity is literally money.

milesf 9y ago

I remember RISC's back in the late 80's/early 90's. CISC's bullied them away and we've been stuck in Intel's quagmire every since. Anytime there's an attack on the status quo, the established players feign concern and beat back the attack then return to the way things were (remember Negroponte's $100 laptop and the netbook response?) No idea how this will pan out.

zokier 9y ago
RISCV is pretty far from attacking Intel anywhere. ARM is the one that should be both worried about RISCV and simultaneously be a cause of worry for Intel.
tzahola 9y ago
>CISC's bullied them away and we've been stuck in Intel's quagmire every since You know that ARM means Advanced RISC Machine, right?
- pjmlp 9y ago
  In the early days. ARMv8-A 64 has gotten a bit CISC.
astrodust 9y ago
It wasn't that CISC won or that RISC lost, it was that the architectures got so blurry you couldn't tell one from the other. There's so much microcode in a CPU now that the instruction set is just the icing layer on the cake. Internally there's surprising amounts of commonality between PowerPC, ARM and x86 type chips. Plus PowerPC started to adopt CISC-like instructions, x86-64 started to adopt RISC-like features such as having a multitude of generic registers, and here we are where nobody cares about the distinction. Don't forget that while Intel won in certain markets, like notebooks, desktops and servers, it's absolutely, utterly irrelevant in other places that ship far, far more CPUs. A typical car may have as many as one hundred CPUs of various types, typically at least fifty, many of them PowerPC for power and legacy reasons. Your phone is probably ARM. Remote controls. Routers. Switches. Refrigerators. Thermostats. Televisions and displays. Hard drives. Keyboards and mice. Basically anything that needs some kind of compute capability probably has a non-Intel processor. If there's a quagmire we're stuck in it's that we're surrounded by thousands of devices that are likely full of vulnerabilities that can never, will ever be fixed.

asb 9y ago

If you're interested in what's going on at the RISC-V Workshop, you might want to follow my live blog here: http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-day-one/ http://www.lowrisc.org/blog/2017/11/seventh-risc-v-workshop-...

mhayenga 9y ago
You really do an amazing job writing these up. Back when I used to work at ARM and attended the 3rd workshop, I ended up just pointing people to your write-up rather than my own notes.
madez 9y ago
Let me thank you for providing the excellent write-up. I eagerly wait for news from lowRISC in hope for a SBC with general purpose Linux support. This would open up the hardware in general, and thus be a major step in a good direction. I do have a question, though. Is there any plan for working on an architecture for massively parallelizable workloads, like graphics, artifical neural networks and simulations? Especially the talk by Dave Ditzel seems relevant to this. Even without competitive performance, that would be another major step. It would not only improve the situation by the amount of the necessary efforts for that, but by raising the bar for all the other vendors by being compared to that. There is a factor between your work and the impact on the ecosystem, and I guess it is significantly higher than one.

flamedoge 9y ago

everybody makes processors!

rijoja 9y ago

Well what I find interesting here is if they are able to manufacture chips with 7nm litography. Aren't intel and samsung who I belive to be the leaders in the field, still at 14 nm? In case WD manages to beat them to the market with this technology at least there will be a lot of hype around this. As far as binary compability is concerned this is more or less a thing of the past. The way I see it js and other interpreted languages provide for the most vibrant ecosystem at the moment. Where we have package management running not over only kernels but also distributions. Before this developers have gotten really acustomed to compiling into platform independent bytecode. And even windows which in comparison with Linux has been ported to few platforms is by no means impossible to move over to a new instruction set. As have been demonstrated multiple times. Even C itself was developed to make few assumptions in regards to the metal. If you please, excuse me for reiterating facts well known to the average HN reader. Furthermore with developers more or less requiring to work with open source software as it makes debugging and making use of other developers experiences easier. The probability that you will be stuck with CPU specific binaries of any given program is slim. Now the problem is "only" to find programmers capable of programming 4096 CPU cores to operate well simultaneously, in a world where it's completely accepted and right, for a text editor to eat up hundreds of megabytes of ram displaying the source code for a hello world program. Also for this to truly make a dent the development has to span all the way from the metal via the kernel and to the actual application. Unfortunately I am afraid that the open license will mean very little, from a freedom point of view as they take this route out of the pragmatic reasons, briefly mentioned above, not to make an ideological stand. Nonetheless it's a step forward so I'll try to supress my cynicism.

deepnotderp 9y ago
"Well what I find interesting here is if they are able to manufacture chips with 7nm litography. " They're going to be using TSMC "7nm". At this point nm node names from anyone mean absolutely nothing. Just know that TSMC "7nm" ~= Intel "10nm"
- rijoja 9y ago
  Aha thank you for clearing that out.

tonmoy 9y ago

This is so exciting, can’t wait for all the open source contributions to RISC-V WD will make

phkahler 9y ago
It is an interesting play. I didn't think WD would be all that relevant, but... I figured with open ISA the CPU would no longer be a significant piece of IP and competition and leadership would move to those with graphics IP. OTOH if tightly coupled CPU and storage was to become a big thing then storage companies would be the big winners (maybe just in some markets). But the fact that they talk about contributing back is interesting. If companies with GFX or storage want their specialty to become the real value, they will benefit by contributing high quality IP to the open CPU movement thereby destroying the market for the old guard (CPU makers).

sandGorgon 9y ago

Does anyone know what is the state of the processor that they are proposing to ship ? Has it already gone to GDS? Or is this simply at proposal stage right now (mwani1the hardware is still RTL or netlist).

dfee 9y ago

A primer on the RISC vs CISC debate that helped me understand why this matters: http://cs.stanford.edu/people/eroberts/courses/soco/projects/2000-01/risc/risccisc/ http://cs.stanford.edu/people/eroberts/courses/soco/projects...