mechagodzilla

26 ms·

271.
by mechagodzilla 10y ago
An fpga has finite resources (block rams, pins, logic blocks (lookup table + flop)). If you have a good understanding of the logic you're designing, it's not that hard to estimate resource usage. You just get used to thinking in t
272.
by mechagodzilla 10y ago
The linked paper mentions a 500 MHz operating frequency, as well as mentioning a completely automated RTL-to-GDS flow. 500 MHz seems extraordinarily slow for a 16nm chip - was this just an explicit decision to take whatever the tools would
273.
by mechagodzilla 10y ago
Ireland gave Apple tax breaks that were not theirs to give. Just as a worker can't give a break to an employer and work for less than minimum wage (even if they want to, and even if they wrote the contract!). The ruling was effectively
274.
by mechagodzilla 10y ago
I think the Anton machines for simulating molecular dynamics ( https://en.wikipedia.org/wiki/Anton_(computer) ) show that this has already changed. The 8 year old Anton 1 machines are still ~1-2 orders of magnitude fas
275.
by mechagodzilla 10y ago
She might also just be, you know, poor. She might live far away and spend a lot of time on a bus, sharing a studio apt with other family members that also work low wage jobs.
276.
by mechagodzilla 10y ago
25 gbps for a very short reach interconnect sounds possible, although having to go through an adapter chip is going to kill your latency from a system perspective. If you haven't already, you should check out the DE Shaw Research Anton
277.
by mechagodzilla 10y ago
Did you stick with the parallel, SERDES-less interfaces for your interchip I/O? 48 GB/s implies a pretty high signalling rate to not have a CTLE, DFE, etc. Why 3 interchip links? What network topology are you planning to use to sc
278.
by mechagodzilla 10y ago
Another obscure way to generate the fibonacci sequence - Compute the fibonacci sequence on a hand-cranked mechanical computer: http://www.chrisfenton.com/the-turbo-entabulator/
279.
by mechagodzilla 11y ago
VLIW is just a way of achieving instruction level parallelism. That 9:1 speed-up is vs a single issue, in-order core, which PCs haven't used since the mid-90s. Modern superscalar processors can not only handle multiple instructions in
280.
by mechagodzilla 11y ago
Right, but they didn't build an optical computer that is even close to competitive with something like this: http://www.hotchips.org/wp-content/uploads/hc_archives/hc26/...
281.
by mechagodzilla 11y ago
This appears to basically be an analog optical computer - it inputs some 2D data using an LCD, puts it through a bunch of optical transforms, and then captures the output with a camera. This probably does have some kind of obscure use cases
282.
by mechagodzilla 11y ago
For it to make sense to buy one, it would have to actually be a better all-around solution to a problem. Say this machine costs $10 million (the same price of one of their earlier machines), and is the size and power consumption of many rac
283.
by mechagodzilla 11y ago
These results seem a bit misleading - they're comparing their multi-million dollar system to a classical optimizer running single-threaded on a 3-year old processor (Intel Xeon E5-2670), and then saying 'look how much faster we ar
284.
by mechagodzilla 11y ago
That requires that you work somewhere that you'd want to live, though. A few hundred thousand people work in midtown manhattan, but it would be a miserable place to live. The subway isn't great, but commuter rail is pretty pleasan
285.
by mechagodzilla 12y ago
Ah, so the idea is to have 64 parallel bits coming in at 6 Gbits/s, along with a slower clock that you multiply up to 6 GHz and use to sample the inputs? That will be quite tricky to get working 1) without any analog signal conditionin
286.
by mechagodzilla 12y ago
Getting anything approximating Intel's work, assuming you are rolling all your own IP, is pretty ambitious (and probably a good deal more work than your Core design). Even at only 6 Gbit/s (faster than PCIe Gen2, btw). Just curi
287.
by mechagodzilla 12y ago
I asked this previously without seeing that you had answered it here. So you're claiming to have a parallel interface without a SERDES running at 64-bits at 6 Gb/s? How are you maintaining bit alignment between lanes? Do you have
288.
by mechagodzilla 12y ago
Can you provide some more details on your parallel interface? As an ASIC designer, these numbers sound extremely fishy for a non-serdes interface. A 128-bit parallel interface (which is a lot of pins, especially if you need 8 links) would
289.
by mechagodzilla 12y ago
It's kind of like fretting that it's expensive to write software if you have to invent your own language and compiler first. It would be, which is why no one does that.
290.
by mechagodzilla 12y ago
These days, Intel is an unusual model in that they own the whole 'stack', from processor design to fabrication, packaging, etc. To replicate that costs 10s of billions of dollars. To get your own chip produced using a 'pure-p
291.
by mechagodzilla 13y ago
But you're limited by the mach speed of the fluid pushing the object, not the mach speed of the fluid you're traveling through. A bullet out of a rifle is limited by the mach speed of the hot gases created during combustion. A c
292.
by mechagodzilla 13y ago
Describing the login page of the exchange as a 'single point of failure' for the entire healthcare system seems a bit harsh. It's not like hospitals everywhere say "Oops, login page is down, shutdown the ICU - we'
293.
by mechagodzilla 13y ago
Here is the Fibonacci sequence calculated by a literal series of mechanical steps: http://www.chrisfenton.com/the-turbo-entabulator/
294.
by mechagodzilla 14y ago
It probably should be normalized in many different ways (but if we hypothesize that teenagers are dangerous drivers, taking teenagers off the road would reduce both the teenage fatality rate and the fatality rate of the general population
295.
by mechagodzilla 14y ago
It looks like it is actually working. I pulled this data from the CDC's website[1] for auto-related fatalities for Americans aged 14-19 (population is total # of teenagers): YEAR DEATHS POPULATION 1999 5,508 24,099,614 2000 5,561 24
296.
by mechagodzilla 14y ago
That's the same way the Cray-1 does it. It uses 3 passes of newton's method (and I think is accurate to 28 bits for the first time through).
297.
by mechagodzilla 14y ago
Stagnation in the 1800's? Keep in mind this was the century that saw the invention and spread of the railroad, the invention and spread of a nearly instant global communication medium with the telegraph, the telephone, the moving picture,
298.
by mechagodzilla 14y ago
I think this is more like Josef Prusa and a couple of angry reprap guys trying to 'take their ball and go home' than a revolution of some sort.
299.
The FIBIAC - a simple 3D-printed electromechanical computer(chrisfenton.com)
1 points by mechagodzilla 14y ago|0 comments