3 ms·
Can you provide some more details on your parallel interface? As an ASIC designer, these numbers sound extremely fishy for a non-serdes interface. A 128-bit par
by mechagodzilla 12y ago
Can you provide some more details on your parallel interface? As an ASIC designer, these numbers sound extremely fishy for a non-serdes interface. A 128-bit parallel interface (which is a lot of pins, especially if you need 8 links) would need to be running at 3 GHz, for instance, to hit that. Is it differential/single-ended? Source-synchronous? How big of a package are you planning?
- trsohmers 12y ago(Copied from another comment on this page): Relevant paper (by Intel Research, actually)... there are quite a few differences (we are keeping it a lot simpler on the tx and rx ends, but that is some of our secret sauce... I can talk about it offline if you are really interested) http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=648778.. http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=648778....
- ajb 12y agoFYI, That link doesn't work, but the one you posted here: https://news.ycombinator.com/item?id=8659653 https://news.ycombinator.com/item?id=8659653 does.
- deleted 12y ago[deleted]