12 ms·

Purdue Starts Comprehensive Semiconductor Degree Programs in U.S.

473 points by mindcrime 4y ago

suyash 4y ago
Can someone explain how is this field of study different than already existing Electrical Engineering ? Sounds like a marketing ploy by Purdue.
- Animats 4y ago
  There's a lot more chemistry.
sameerkapur 4y ago
boiler up
- OedipusRex 4y ago
  Boiler Up!
soared 4y ago
Reading this all I could think was that it’s an excellent idea, and that the government should be tripping over itself to give this program scholarships. > The university has existing collaborations with the U.S. Department of Defense’s SCALE (Scalable Asymmetric Lifecycle Engagement) program, the American Semiconductor Academy, and other CHIPS Act workforce consortia
hnthrowaway0315 4y ago
As someone working full-time in Canada, wish I could roll back my life 10+ years and get into one of the semiconductor schools. Good luck to all who are admitted into this program, looks very interesting. Link to online degree: https://engineering.purdue.edu/semiconductors/degrees#online-breadth https://engineering.purdue.edu/semiconductors/degrees#online...
- Bilal_io 4y ago
  Semi-relates: Why don't universities offer online undergraduate programs? It's frustrating. I enrolled myself back to finish my bachelor's degree and my school offers very few or no online options for the classes I need.
  - Victerius 4y ago
    Online programs may not be accredited by national credentialing bodies. Many STEM degrees require lab courses that can't be performed online. And non-STEM programs are based around the seminar (classroom discussion) model, where on-site attendance is always superior to a Zoom meeting. Forcing students to live on-premises also makes universities money through student housing and amenities. Universities have concerns that opening their programs to online instruction would lead to an exodus from the campus. You could have 70% of a 20,000 strong student body attend online, and all the expensive real estate of the campus would mostly be a waste of money.
  - hnthrowaway0315 4y ago
    I'm frustrated too. My university has gone back to in-people and it forces me to drop 2 out of the 4 courses I registered, plus one of the kept course forces me to take a couple of hours off every week.
  - nonethewiser 4y ago
    But this is an online program.
    - Bilal_io 4y ago
      I am happy that it is, but it's not my domain. I am trying to finish my degree in CS or a related field.
      - adamsmith143 4y ago
        Plenty of options out there. ASU, Arizona, Florida, etc all have online CS or SWE bachelor programs but there are many others as well. Good Luck!
echelon 4y ago
What other industries and critical supply chain components do we need to do this for? Anything at this scale?
- Victerius 4y ago
  Software engineering, statistics (to train data scientists), plane pilots.
  - Datenstrom 4y ago
    Software engineering should really be separated from CS anywhere it isn't.
- digb 4y ago
  Doctors. The US is way understaffed for doctors.
deleted 4y ago
[deleted]
Linda703 4y ago
[dead]
smalley 4y ago
This seems like good marketing but reading this press release and looking at the courses in their degree program I feel like I'm missing what's different here (other than some reference to supply chain management). Most of the coursework here seems to be very similar to what was available over a decade ago at the state university I attended for graduate school (my concentration was semiconductor device theory related). While I think this material is very interesting I don't know that the demand is going to be there for this type of field. Companies like Intel have dedicated smaller departments for process development which do the more academic work (for example the D1X facility). My experience with fabrication organization is the need is much more process engineer and technician focused rather than semiconductor engineers. The high volume hires are in improving reliability, reducing cost etc. I don't think you really need the EE degree for this, more likely industrial engineering, chemical engineering or statistics. This said, Purdue has always had a very strong program in the more device oriented semiconductor courses (Until his passing Robert Pierret the fellow who wrote some of the best and most used grad textbooks on devices called it home).
- avs733 4y ago
  You are correct. This is clearly not the first…check out Rochester institute of technology…it’s just a branding exercise which is very in keeping with the current Purdue leadership.
  - Jistern 4y ago
    - NeverFade 4y ago
      > LeetCode is the beginning of the process of standardized testing for engineers at Big Tech companies, better testing tools will probably soon supplant LeetCode LeetCode has been the de-facto screening standard for at least the past 15 years. As a hiring manager, I keep closely up to date with the screening field. I see nothing else coming to replace LeetCode any time soon. There isn't even a general consensus about what such a replacement would look like. LeetCode also isn't just used as an initial screen: in many processes it is effectively the only technical screen. You can pass many big tech screens if you just know LeetCode + System Design, and the latter is only required if you're a senior.
digb 4y ago
This seems like a smart cross-section of the existing ECE major and IE majors offered at Purdue, and would likely be a good way to lighten up the major (IE was considered easier than the other programs when I was in undergrad).
DonHopkins 4y ago
Lynn Conway, co-author along with Carver Mead of "the textbook" on VLSI design, "Introduction to VLSI Systems", created and taught this historic VLSI Design Course in 1978, which was the first time students designed and fabricated their own integrated circuits: >"Importantly, these weren’t just any designs, for many pushed the envelope of system architecture. Jim Clark, for instance, prototyped the Geometry Engine and went on to launch Silicon Graphics Incorporated based on that work (see Fig. 16). Guy Steele, Gerry Sussman, Jack Holloway and Alan Bell created the follow-on ‘Scheme’ (a dialect of LISP) microprocessor, another stunning design." THE M.I.T. 1978 VLSI SYSTEM DESIGN COURSE: https://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.html https://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.htm... A Guidebook for the Instructor of VLSI System Design: https://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/InstGuide.html https://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/InstG... That book and course catalyzed the "Mead–Conway VLSI chip design revolution": https://en.wikipedia.org/wiki/Mead%E2%80%93Conway_VLSI_chip_design_revolution https://en.wikipedia.org/wiki/Mead%E2%80%93Conway_VLSI_chip_... https://ai.eecs.umich.edu/people/conway/conway.html https://ai.eecs.umich.edu/people/conway/conway.html https://en.wikipedia.org/wiki/Lynn_Conway https://en.wikipedia.org/wiki/Lynn_Conway https://en.wikipedia.org/wiki/Carver_Mead https://en.wikipedia.org/wiki/Carver_Mead Lynn Conway's "Reminiscences of the VLSI Revolution: How a series of failures triggered a paradigm shift in digital design": https://ai.eecs.umich.edu/people/conway/Memoirs/VLSI/Lynn_Conway_VLSI_Reminiscences.pdf https://ai.eecs.umich.edu/people/conway/Memoirs/VLSI/Lynn_Co... Also: https://news.ycombinator.com/item?id=25964865 https://news.ycombinator.com/item?id=25964865 Here's some historic Vintage VLSI Porn that I posted 6 years ago, from Lynn Conway's famous VLSI Design course at MIT: https://en.wikipedia.org/wiki/Lynn_Conway https://en.wikipedia.org/wiki/Lynn_Conway https://ai.eecs.umich.edu/people/conway/conway.html https://ai.eecs.umich.edu/people/conway/conway.html https://news.ycombinator.com/item?id=8860722 https://news.ycombinator.com/item?id=8860722 DonHopkins on Jan 9, 2015 | on: Design of Lisp-Based Processors Or, LAMBDA: The Ul... I believe this is about the Lisp Microprocessor that Guy Steele created in Lynn Conway's groundbreaking 1978 MIT VLSI System Design Course: http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.html http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.html My friend David Levitt is crouching down in this class photo so his big 1978 hair doesn't block Guy Steele's face: The class photo is in two parts, left and right: http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class2s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class2s.jp... http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class3s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class3s.jp... Here are hires images of the two halves of the chip the class made: http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78chip%20photo-1%20L.jpg http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78c... http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78chip%20photo-2%20L.jpg http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78c... The Great Quux's Lisp Microprocessor is the big one on the left of the second image, and you can see his name "(C) 1978 GUY L STEELE JR" if you zoom in. David's project is in the lower right corner of the first image, and you can see his name "LEVITT" if you zoom way in. Here is a photo of a chalkboard with status of the various projects: http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Status%20Em.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Status%20E... The final sanity check before maskmaking: A wall-sized overall check plot made at Xerox PARC from Arpanet-transmitted design files, showing the student design projects merged into multiproject chip set. http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Checkplot%20s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Checkplot%... One of the wafers just off the HP fab line containing the MIT'78 VLSI design projects: Wafers were then diced into chips, and the chips packaged and wire bonded to specific projects, which were then tested back at M.I.T. http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Wafer%20s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Wafer%20s.... Design of a LISP-based microprocessor http://dl.acm.org/citation.cfm?id=359031 http://dl.acm.org/citation.cfm?id=359031 ftp://publications.ai.mit.edu/ai-publications/pdf/AIM-514.pdf Page 22 has a map of the processor layout: http://i.imgur.com/zwaJMQC.jpg http://i.imgur.com/zwaJMQC.jpg We present a design for a class of computers whose “instruction sets” are based on LISP. LISP, like traditional stored-program machine languages and unlike most high-level languages, conceptually stores programs and data in the same way and explicitly allows programs to be manipulated as data, and so is a suitable basis for a stored-program computer architecture. LISP differs from traditional machine languages in that the program/data storage is conceptually an unordered set of linked record structures of various sizes, rather than an ordered, indexable vector of integers or bit fields of fixed size. An instruction set can be designed for programs expressed as trees of record structures. A processor can interpret these program trees in a recursive fashion and provide automatic storage management for the record structures. We discuss a small-scale prototype VLSI microprocessor which has been designed and fabricated, containing a sufficiently complete instruction interpreter to execute small programs and a rudimentary storage allocator. Here's a map of the projects on that chip, and a list of the people who made them and what they did: http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jp... 1. Sandra Azoury, N. Lynn Bowen Jorge Rubenstein: Charge flow transistors (moisture sensors) integrated into digital subsystem for testing. 2. Andy Boughton, J. Dean Brock, Randy Bryant, Clement Leung: Serial data manipulator subsystem for searching and sorting data base operations. 3. Jim Cherry: Graphics memory subsystem for mirroring/rotating image data. 4. Mike Coln: Switched capacitor, serial quantizing D/A converter. 5. Steve Frank: Writeable PLA project, based on the 3-transistor ram cell. 6. Jim Frankel: Data path portion of a bit-slice microprocessor. 7. Nelson Goldikener, Scott Westbrook: Electrical test patterns for chip set. 8. Tak Hiratsuka: Subsystem for data base operations. 9. Siu Ho Lam: Autocorrelator subsystem. 10. Dave Levitt: Synchronously timed FIFO. 11. Craig Olson: Bus interface for 7-segment display data. 12. Dave Otten: Bus interfaceable real time clock/calendar. 13. Ernesto Perea: 4-Bit slice microprogram sequencer. 14. Gerald Roylance: LRU virtual memory paging subsystem. 15. Dave Shaver Multi-function smart memory. 16. Alan Snyder Associative memory. 17. Guy Steele: LISP microprocessor (LISP expression evaluator and associated memory manager; operates directly on LISP expressions stored in memory). 18. Richard Stern: Finite impulse response digital filter. 19. Runchan Yang: Armstrong type bubble sorting memory. The following projects were completed but not quite in time for inclusion in the project set: 20. Sandra Azoury, N. Lynn Bowen, Jorge Rubenstein: In addition to project 1 above, this team completed a CRT controller project. 21. Martin Fraeman: Programmable interval clock. 22. Bob Baldwin: LCS net nametable project. 23. Moshe Bain: Programmable word generator. 24. Rae McLellan: Chaos net address matcher. 25. Robert Reynolds: Digital Subsystem to be used with project 4. Also, Jim Clark (SGI, Netscape) was one of Lynn Conway's students, and she taught him how to make his first prototype "Geometry Engine"! http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/MPCAdv.html http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/MPCAdv.ht... Just 29 days after the design deadline time at the end of the courses, packaged custom wire-bonded chips were shipped back to all the MPC79 designers. Many of these worked as planned, and the overall activity was a great success. I'll now project photos of several interesting MPC79 projects. First is one of the multiproject chips produced by students and faculty researchers at Stanford University (Fig. 5). Among these is the first prototype of the "Geometry Engine", a high performance computer graphics image-generation system, designed by Jim Clark. That project has since evolved into a very interesting architectural exploration and development project.[9] Figure 5. Photo of MPC79 Die-Type BK (containing projects from Stanford University): http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jp... [...] The text itself passed through drafts, became a manuscript, went on to become a published text. Design environments evolved from primitive CIF editors and CIF plotting software on to include all sorts of advanced symbolic layout generators and analysis aids. Some new architectural paradigms have begun to similarly evolve. An example is the series of designs produced by the OM project here at Caltech. At MIT there has been the work on evolving the LISP microprocessors [3,10]. At Stanford, Jim Clark's prototype geometry engine, done as a project for MPC79, has gone on to become the basis of a very powerful graphics processing system architecture [9], involving a later iteration of his prototype plus new work by Marc Hannah on an image memory processor [20]. [...] For example, the early circuit extractor work done by Clark Baker [16] at MIT became very widely known because Clark made access to the program available to a number of people in the network community. From Clark's viewpoint, this further tested the program and validated the concepts involved. But Clark's use of the network made many, many people aware of what the concept was about. The extractor proved so useful that knowledge about it propagated very rapidly through the community. (Another factor may have been the clever and often bizarre error-messages that Clark's program generated when it found an error in a user's design!) 9. J. Clark, "A VLSI Geometry Processor for Graphics", Computer, Vol. 13, No. 7, July, 1980. [...] The above is all from Lynn Conway's fascinating web site, which includes her great book "VLSI Reminiscence" available for free: http://ai.eecs.umich.edu/people/conway/ http://ai.eecs.umich.edu/people/conway/ These photos look very beautiful to me, and it's interesting to scroll around the hires image of the Quux's Lisp Microprocessor while looking at the map from page 22 that I linked to above. There really isn't that much too it, so even though it's the biggest one, it really isn't all that complicated, so I'd say that "SIMPLE" graffiti is not totally inappropriate. (It's microcoded, and you can actually see the rough but semi-regular "texture" of the code!) This paper has lots more beautiful Vintage VLSI Porn, if you're into that kind of stuff like I am: http://ai.eecs.umich.edu/people/conway/VLSI/MPC79/Photos/PDFs/MPC79ChipPhotos.pdf http://ai.eecs.umich.edu/people/conway/VLSI/MPC79/Photos/PDF... A full color hires image of the chip including James Clark's Geometry Engine is on page 23, model "MPC79BK", upside down in the upper right corner, "Geometry Engine (C) 1979 James Clark", with a close-up "centerfold spread" on page 27. Is the "document chip" on page 20, model "MPC79AH", a hardware implementation of Literate Programming? If somebody catches you looking at page 27, you can quickly flip to page 20, and tell them that you only look at Vintage VLSI Porn Magazines for the articles! There is quite literally a Playboy Bunny logo on page 21, model "MPC79B1", so who knows what else you might find in there by zooming in and scrolling around stuff like the "infamous buffalo chip"? http://ai.eecs.umich.edu/people/conway/VLSI/VLSIarchive.html http://ai.eecs.umich.edu/people/conway/VLSI/VLSIarchive.html http://ai.eecs.umich.edu/people/conway/VLSI/VLSI.archive.spreadsheet.htm http://ai.eecs.umich.edu/people/conway/VLSI/VLSI.archive.spr...
binbag 4y ago
I think this is a great opportunity for young people and they should take the chance to enter a field that even for electrical engineers is tough to enter. Chip design and semiconductor engineering is a bit of a black art, kind of like analogue electronics in general. I've got a PhD in EE and I still marvel at the engineering that goes into chips. If I was starting again I'd seriously consider this opportunity.
bluedays 4y ago
And people always said that chickens were dumb.
iron2disulfide 4y ago
Skimmed the article; what's the difference between this program and what's already taught in electrical and computer engineering classes? I studied ECE for my BS and MS and there were already a couple of chip design-related courses: digital design, VLSI, FPGA, semiconductor physics, IC fabrication. I guess more specialized coursework on verification or manufacturing would have been nice, but I don't think that would warrant a whole new academic program. edit: forgot to mention that I worked as a chip designer for many years right out of school.
- p_j_w 4y ago
  I had the same thought. Upon reading, this sounds like it goes deeper on the semiconductor physics and fabrication parts. Relevant bit: "Courses will address supply chain issues in chemical engineering, mechanical engineering for tool development, thermal management, packaging, and material engineering as well as industrial engineering, logistics, and manufacturing optimization."
- Dracophoenix 4y ago
  Which company did you work for?
  - iron2disulfide 4y ago
    In chronological order: a fabless IP company, FPGA company, FAANG company. I've since taken a hiatus from chip design.
- j_walter 4y ago
  There is a big difference between chip design and running a factory...which generally isn't taught anywhere. When I got my ChE degree many years ago we had like 3 or 4 courses for semiconductors and in one course we learned about the manufacturing aspect. Even then it was super outdated with respect to what I actually dealt with when working as a Process Engineer at a fab.
  - iron2disulfide 4y ago
baylessj 4y ago
It's neat to see this on the front page of HN -- I got the chance to take an Intro to Semiconductors class from the professor in the article a couple of years ago while getting my EE degree. Semiconductor design never really piqued my interest so I probably didn't get as much out of the class as I ought to have, but Lundstrom was clearly quite passionate about the subject and taught well. Looks like a neat program and it's one that I'm confident will have a lot of resources behind it.
bushbaba 4y ago
For those interested, but coming from a software background. Suggest looking into Georgia Tech's ECE 3056 course. There's lots of public material you can find online. https://oscar.gatech.edu/bprod/bwckctlg.p_disp_course_detail?cat_term_in=201502&subj_code_in=ECE&crse_numb_in=3056 https://oscar.gatech.edu/bprod/bwckctlg.p_disp_course_detail... https://moin.ece.gatech.edu/s13a/hw.html https://moin.ece.gatech.edu/s13a/hw.html
analognoise 4y ago
Yet another way to flood the zone with engineers and keep the wages down. You're much better off doing software.
sylware 4y ago
"non-China" Asia, they got all the top-notch foundries (Taiwan and South Korea). They don't manufacture some critical tools yet, but they should be able to if they want to. China wants its silicium automony and is seriously working on it, India too as it seems. US/america is actually restoring its silicium full autonomy. Meanwhile in EU, we buy intel fabs... amazing way to build EU silicium autonomy. At least, if RISC-V is a success, many chips from anywhere could move around and software should interoperate anywhere without toxic IP in the way or horrible compilers for abysmally complex computer language syntax. A part of the spectrum of chip types won't be able to move around due to "trust issues", but it should happen anyway for a still significant part of this spectrum.
xchaotic 4y ago
Most people here are dunking on this specific industry not paying enough for skilled labour but the problem is more generic- that’s how we build the society around capitalism and we still seem to value capital more than labour.
cvccvroomvroom 4y ago
Currently, it's typically a mixture of physics, material sciences, and/or EE. FYI: DeAnza College in Cupertino, CA has or had a small-scale wafer fab. There are also MOSIS and CEITEC types of fab services for small runs in education.
nickelpro 4y ago
Ha, I'm interning with their chip design team right now. They've done 7 tapeouts but there's a lot of mistakes and other issues down in the plumbing. I wouldn't say their program is significantly better or worse than any other, and my understanding is this focus on a "Semiconductor Degree" is just a reshuffling of courses already offered in EE and ECE degrees. Certainly there are teams far ahead of Purdue. The programs at UCSD and OSU that are pioneering the work on OpenROAD and Skywater 130 are the ones who are really ahead of the game. If I could be at any program in the US, those are where I would want to be. That said Purdue is absolutely ahead of the average ECE program. Very few undergrad programs are completing tapeouts on a regular basis, even at schools that would otherwise have the funding to accomplish it. There are plenty of schools that think of ECE as "EE plus some CS courses" and don't even teach much HDL, much less how to layout a standard cell or do timing analysis.
- Gollapalli 4y ago
  Is OSU Oklahoma or Ohio?
  - nickelpro 4y ago
    Oklahoma. I'm actually working with a kid from Ohio State who's constantly ragging on their program for not even teaching Verilog much less how to build an ASIC. Purdue's program is ok, but it's a veritable bastion of academic excellence compared to schools that have no staff that have ever performed a tapeout, which is most of them. Electrical Engineering departments have tons of faculty who know what they're talking about. CS departments have people who mostly kinda sorta know what they're talking about (even if they're 10 years out of date, which is an eternity in CS). I would wager most schools don't have a single faculty member who's performed a small tapeout, much less a big project for an industry leader. Actual ECE, VLSI, the building of chips, is a wasteland on the academic side of the house IMHO.
    - wcunning 4y ago
      Look at the people around SiFive and RISC-V at UC-Berkeley and look at the transistor guys at UMich. Both groups do lots of work that directly tapes out or works with companies who do. My digital logic prof at UMich took sabbatical to do a startup that netted him a bunch of money on… I forget the details now, but they did a smaller tape out to prove the concept before selling to Intel. It’s not that uncommon.
AshamedCaptain 4y ago
Intel is in hiring freeze right now. So much for the gazillions of needed engineers.
- nurspouse 4y ago
  Intel hired over 20,000 people this year alone (likely a record for them both in terms of absolute and relative percentage). The freeze is similar to that of other companies: Uncertainty over economic conditions.
- Rafuino 4y ago
  In the PC division apparently, not across the company or in data center focused areas. Gazillions still needed in those areas
  - AshamedCaptain 4y ago
    The PC division which is the largest chip group in Intel, and even includes their moonshot divisions like Labs. Nothing to worry about.
wly_cdgr 4y ago
Forget this nonsense and just go where the easy money is. You can work on all the hard and low-paying problems you like on your own terms once you have your fuck you money
hanszarkov 4y ago
I have fond memories of my semiconductor physics classes. The were not easy whatsoever, rather intense. As cvccvroomvroom had mentioned, I had my VLSI chip fabbed at the MOSIS facility in Westborough MA, during my EE tenure at UMASS Amherst in the 1990s as part of a state-wide chip design competition (yeah - didn't win..). There was much activity on VLSI and computer system design at that time, things have certainly changed in the US. I recall many entries were implementations of various (and obscure) mathematical algorithms, mostly in the frequency domain (hence DSP chips), that tried to solve problems that are now trivial in SW today. My school did win occasionally, others were mostly MIT and WPI - I think in a large part due to the excellent professors at all competting schools and the work ethic of the students. My final submission was the design for an Arithmetic Fourier Transform processor - trying to remove the need for expensive ROM by aliasing the signup up-frequency - which I did the barrel-based ALU for, and thank the grad students for including me in the project. cvccvroomvroom: https://news.ycombinator.com/item?id=31756704#31760353 https://news.ycombinator.com/item?id=31756704#31760353 MOSIS: https://en.wikipedia.org/wiki/MOSIS https://en.wikipedia.org/wiki/MOSIS Barrel ALU: https://en.wikipedia.org/wiki/Barrel_shifter https://en.wikipedia.org/wiki/Barrel_shifter (my ALU did much more than multiply/divide..) (edit - remove double paste)
- sitkack 4y ago
  Neat, what was your dev process like? Are you still in contact with those grad students?
- rjsw 4y ago
  The original Berkeley RISC chips were fabbed by MOSIS, would guess that Stanford MIPS ones were too but don't have any papers on that.
DeathArrow 4y ago
China, Taiwan, South Korea are heavily investing in semiconductor industry as they see it highly important for the future. US doesn't want to be left behind and takes action. Meanwhile, in Europe...
- ChuckNorris89 4y ago
  What about Europe? We habe plenty of trailing edge fabs there. Where we lack is leading edge fabs and top SW companies that can compete with US ones.
LdSGSgvupDV 4y ago
Well. I don't get the point of this program. Did they want to ease the semiconductor supply chain problem? I got my master degree on the field of condensed matter. In the past, our group has strong link to the semiconductor industry. Right now, there are more and more classmates tend to change the field from hardware to software after they graduated. WLB just sucks in semiconductor industry.
- mnadkvlb 4y ago
  what does WLB stand for ? sorry not from the hardware field
  - ChuckNorris89 4y ago
    It stands for work life balance and has nothing to to with the hardware field as is a general word.
boiler_up800 4y ago
Excited to see this. The computer engineering curriculum at Purdue was very high quality, including one of the few courses in the nation where multi-core CPU design was taught. Purdue also has strong chemical engineering and electrical engineering programs so there ought to be plenty of facility talent and student interest to make this work.
qwerty456127 4y ago
ROFLing of my own brain - I first misread "comprehensive" as "superexpensive" because what else can a degree program in U.S. be :-]

473 points by mindcrime 4y ago

Can someone explain how is this field of study different than already existing Electrical Engineering ? Sounds like a marketing ploy by Purdue.

Animats 4y ago
There's a lot more chemistry.

sameerkapur 4y ago

boiler up

OedipusRex 4y ago
Boiler Up!

soared 4y ago

Reading this all I could think was that it’s an excellent idea, and that the government should be tripping over itself to give this program scholarships. > The university has existing collaborations with the U.S. Department of Defense’s SCALE (Scalable Asymmetric Lifecycle Engagement) program, the American Semiconductor Academy, and other CHIPS Act workforce consortia

hnthrowaway0315 4y ago

As someone working full-time in Canada, wish I could roll back my life 10+ years and get into one of the semiconductor schools. Good luck to all who are admitted into this program, looks very interesting. Link to online degree: https://engineering.purdue.edu/semiconductors/degrees#online-breadth https://engineering.purdue.edu/semiconductors/degrees#online...

Bilal_io 4y ago
Semi-relates: Why don't universities offer online undergraduate programs? It's frustrating. I enrolled myself back to finish my bachelor's degree and my school offers very few or no online options for the classes I need.
- Victerius 4y ago
  Online programs may not be accredited by national credentialing bodies. Many STEM degrees require lab courses that can't be performed online. And non-STEM programs are based around the seminar (classroom discussion) model, where on-site attendance is always superior to a Zoom meeting. Forcing students to live on-premises also makes universities money through student housing and amenities. Universities have concerns that opening their programs to online instruction would lead to an exodus from the campus. You could have 70% of a 20,000 strong student body attend online, and all the expensive real estate of the campus would mostly be a waste of money.
- hnthrowaway0315 4y ago
  I'm frustrated too. My university has gone back to in-people and it forces me to drop 2 out of the 4 courses I registered, plus one of the kept course forces me to take a couple of hours off every week.
- nonethewiser 4y ago
  But this is an online program.
  - Bilal_io 4y ago
    I am happy that it is, but it's not my domain. I am trying to finish my degree in CS or a related field.
    - adamsmith143 4y ago
      Plenty of options out there. ASU, Arizona, Florida, etc all have online CS or SWE bachelor programs but there are many others as well. Good Luck!

echelon 4y ago

What other industries and critical supply chain components do we need to do this for? Anything at this scale?

Victerius 4y ago
Software engineering, statistics (to train data scientists), plane pilots.
- Datenstrom 4y ago
  Software engineering should really be separated from CS anywhere it isn't.
digb 4y ago
Doctors. The US is way understaffed for doctors.

deleted 4y ago

[deleted]

Linda703 4y ago

[dead]

smalley 4y ago

This seems like good marketing but reading this press release and looking at the courses in their degree program I feel like I'm missing what's different here (other than some reference to supply chain management). Most of the coursework here seems to be very similar to what was available over a decade ago at the state university I attended for graduate school (my concentration was semiconductor device theory related). While I think this material is very interesting I don't know that the demand is going to be there for this type of field. Companies like Intel have dedicated smaller departments for process development which do the more academic work (for example the D1X facility). My experience with fabrication organization is the need is much more process engineer and technician focused rather than semiconductor engineers. The high volume hires are in improving reliability, reducing cost etc. I don't think you really need the EE degree for this, more likely industrial engineering, chemical engineering or statistics. This said, Purdue has always had a very strong program in the more device oriented semiconductor courses (Until his passing Robert Pierret the fellow who wrote some of the best and most used grad textbooks on devices called it home).

avs733 4y ago
You are correct. This is clearly not the first…check out Rochester institute of technology…it’s just a branding exercise which is very in keeping with the current Purdue leadership.
- Jistern 4y ago
  - NeverFade 4y ago
    > LeetCode is the beginning of the process of standardized testing for engineers at Big Tech companies, better testing tools will probably soon supplant LeetCode LeetCode has been the de-facto screening standard for at least the past 15 years. As a hiring manager, I keep closely up to date with the screening field. I see nothing else coming to replace LeetCode any time soon. There isn't even a general consensus about what such a replacement would look like. LeetCode also isn't just used as an initial screen: in many processes it is effectively the only technical screen. You can pass many big tech screens if you just know LeetCode + System Design, and the latter is only required if you're a senior.

digb 4y ago

This seems like a smart cross-section of the existing ECE major and IE majors offered at Purdue, and would likely be a good way to lighten up the major (IE was considered easier than the other programs when I was in undergrad).

DonHopkins 4y ago

Lynn Conway, co-author along with Carver Mead of "the textbook" on VLSI design, "Introduction to VLSI Systems", created and taught this historic VLSI Design Course in 1978, which was the first time students designed and fabricated their own integrated circuits: >"Importantly, these weren’t just any designs, for many pushed the envelope of system architecture. Jim Clark, for instance, prototyped the Geometry Engine and went on to launch Silicon Graphics Incorporated based on that work (see Fig. 16). Guy Steele, Gerry Sussman, Jack Holloway and Alan Bell created the follow-on ‘Scheme’ (a dialect of LISP) microprocessor, another stunning design." THE M.I.T. 1978 VLSI SYSTEM DESIGN COURSE: https://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.html https://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.htm... A Guidebook for the Instructor of VLSI System Design: https://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/InstGuide.html https://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/InstG... That book and course catalyzed the "Mead–Conway VLSI chip design revolution": https://en.wikipedia.org/wiki/Mead%E2%80%93Conway_VLSI_chip_design_revolution https://en.wikipedia.org/wiki/Mead%E2%80%93Conway_VLSI_chip_... https://ai.eecs.umich.edu/people/conway/conway.html https://ai.eecs.umich.edu/people/conway/conway.html https://en.wikipedia.org/wiki/Lynn_Conway https://en.wikipedia.org/wiki/Lynn_Conway https://en.wikipedia.org/wiki/Carver_Mead https://en.wikipedia.org/wiki/Carver_Mead Lynn Conway's "Reminiscences of the VLSI Revolution: How a series of failures triggered a paradigm shift in digital design": https://ai.eecs.umich.edu/people/conway/Memoirs/VLSI/Lynn_Conway_VLSI_Reminiscences.pdf https://ai.eecs.umich.edu/people/conway/Memoirs/VLSI/Lynn_Co... Also: https://news.ycombinator.com/item?id=25964865 https://news.ycombinator.com/item?id=25964865 Here's some historic Vintage VLSI Porn that I posted 6 years ago, from Lynn Conway's famous VLSI Design course at MIT: https://en.wikipedia.org/wiki/Lynn_Conway https://en.wikipedia.org/wiki/Lynn_Conway https://ai.eecs.umich.edu/people/conway/conway.html https://ai.eecs.umich.edu/people/conway/conway.html https://news.ycombinator.com/item?id=8860722 https://news.ycombinator.com/item?id=8860722 DonHopkins on Jan 9, 2015 | on: Design of Lisp-Based Processors Or, LAMBDA: The Ul... I believe this is about the Lisp Microprocessor that Guy Steele created in Lynn Conway's groundbreaking 1978 MIT VLSI System Design Course: http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.html http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/MIT78.html My friend David Levitt is crouching down in this class photo so his big 1978 hair doesn't block Guy Steele's face: The class photo is in two parts, left and right: http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class2s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class2s.jp... http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class3s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Class3s.jp... Here are hires images of the two halves of the chip the class made: http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78chip%20photo-1%20L.jpg http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78c... http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78chip%20photo-2%20L.jpg http://ai.eecs.umich.edu/people/conway/VLSI/InstGuide/MIT78c... The Great Quux's Lisp Microprocessor is the big one on the left of the second image, and you can see his name "(C) 1978 GUY L STEELE JR" if you zoom in. David's project is in the lower right corner of the first image, and you can see his name "LEVITT" if you zoom way in. Here is a photo of a chalkboard with status of the various projects: http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Status%20Em.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Status%20E... The final sanity check before maskmaking: A wall-sized overall check plot made at Xerox PARC from Arpanet-transmitted design files, showing the student design projects merged into multiproject chip set. http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Checkplot%20s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Checkplot%... One of the wafers just off the HP fab line containing the MIT'78 VLSI design projects: Wafers were then diced into chips, and the chips packaged and wire bonded to specific projects, which were then tested back at M.I.T. http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Wafer%20s.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MIT78/Wafer%20s.... Design of a LISP-based microprocessor http://dl.acm.org/citation.cfm?id=359031 http://dl.acm.org/citation.cfm?id=359031 ftp://publications.ai.mit.edu/ai-publications/pdf/AIM-514.pdf Page 22 has a map of the processor layout: http://i.imgur.com/zwaJMQC.jpg http://i.imgur.com/zwaJMQC.jpg We present a design for a class of computers whose “instruction sets” are based on LISP. LISP, like traditional stored-program machine languages and unlike most high-level languages, conceptually stores programs and data in the same way and explicitly allows programs to be manipulated as data, and so is a suitable basis for a stored-program computer architecture. LISP differs from traditional machine languages in that the program/data storage is conceptually an unordered set of linked record structures of various sizes, rather than an ordered, indexable vector of integers or bit fields of fixed size. An instruction set can be designed for programs expressed as trees of record structures. A processor can interpret these program trees in a recursive fashion and provide automatic storage management for the record structures. We discuss a small-scale prototype VLSI microprocessor which has been designed and fabricated, containing a sufficiently complete instruction interpreter to execute small programs and a rudimentary storage allocator. Here's a map of the projects on that chip, and a list of the people who made them and what they did: http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jp... 1. Sandra Azoury, N. Lynn Bowen Jorge Rubenstein: Charge flow transistors (moisture sensors) integrated into digital subsystem for testing. 2. Andy Boughton, J. Dean Brock, Randy Bryant, Clement Leung: Serial data manipulator subsystem for searching and sorting data base operations. 3. Jim Cherry: Graphics memory subsystem for mirroring/rotating image data. 4. Mike Coln: Switched capacitor, serial quantizing D/A converter. 5. Steve Frank: Writeable PLA project, based on the 3-transistor ram cell. 6. Jim Frankel: Data path portion of a bit-slice microprocessor. 7. Nelson Goldikener, Scott Westbrook: Electrical test patterns for chip set. 8. Tak Hiratsuka: Subsystem for data base operations. 9. Siu Ho Lam: Autocorrelator subsystem. 10. Dave Levitt: Synchronously timed FIFO. 11. Craig Olson: Bus interface for 7-segment display data. 12. Dave Otten: Bus interfaceable real time clock/calendar. 13. Ernesto Perea: 4-Bit slice microprogram sequencer. 14. Gerald Roylance: LRU virtual memory paging subsystem. 15. Dave Shaver Multi-function smart memory. 16. Alan Snyder Associative memory. 17. Guy Steele: LISP microprocessor (LISP expression evaluator and associated memory manager; operates directly on LISP expressions stored in memory). 18. Richard Stern: Finite impulse response digital filter. 19. Runchan Yang: Armstrong type bubble sorting memory. The following projects were completed but not quite in time for inclusion in the project set: 20. Sandra Azoury, N. Lynn Bowen, Jorge Rubenstein: In addition to project 1 above, this team completed a CRT controller project. 21. Martin Fraeman: Programmable interval clock. 22. Bob Baldwin: LCS net nametable project. 23. Moshe Bain: Programmable word generator. 24. Rae McLellan: Chaos net address matcher. 25. Robert Reynolds: Digital Subsystem to be used with project 4. Also, Jim Clark (SGI, Netscape) was one of Lynn Conway's students, and she taught him how to make his first prototype "Geometry Engine"! http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/MPCAdv.html http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/MPCAdv.ht... Just 29 days after the design deadline time at the end of the courses, packaged custom wire-bonded chips were shipped back to all the MPC79 designers. Many of these worked as planned, and the overall activity was a great success. I'll now project photos of several interesting MPC79 projects. First is one of the multiproject chips produced by students and faculty researchers at Stanford University (Fig. 5). Among these is the first prototype of the "Geometry Engine", a high performance computer graphics image-generation system, designed by Jim Clark. That project has since evolved into a very interesting architectural exploration and development project.[9] Figure 5. Photo of MPC79 Die-Type BK (containing projects from Stanford University): http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jpg http://ai.eecs.umich.edu/people/conway/VLSI/MPCAdv/SU-BK1.jp... [...] The text itself passed through drafts, became a manuscript, went on to become a published text. Design environments evolved from primitive CIF editors and CIF plotting software on to include all sorts of advanced symbolic layout generators and analysis aids. Some new architectural paradigms have begun to similarly evolve. An example is the series of designs produced by the OM project here at Caltech. At MIT there has been the work on evolving the LISP microprocessors [3,10]. At Stanford, Jim Clark's prototype geometry engine, done as a project for MPC79, has gone on to become the basis of a very powerful graphics processing system architecture [9], involving a later iteration of his prototype plus new work by Marc Hannah on an image memory processor [20]. [...] For example, the early circuit extractor work done by Clark Baker [16] at MIT became very widely known because Clark made access to the program available to a number of people in the network community. From Clark's viewpoint, this further tested the program and validated the concepts involved. But Clark's use of the network made many, many people aware of what the concept was about. The extractor proved so useful that knowledge about it propagated very rapidly through the community. (Another factor may have been the clever and often bizarre error-messages that Clark's program generated when it found an error in a user's design!) 9. J. Clark, "A VLSI Geometry Processor for Graphics", Computer, Vol. 13, No. 7, July, 1980. [...] The above is all from Lynn Conway's fascinating web site, which includes her great book "VLSI Reminiscence" available for free: http://ai.eecs.umich.edu/people/conway/ http://ai.eecs.umich.edu/people/conway/ These photos look very beautiful to me, and it's interesting to scroll around the hires image of the Quux's Lisp Microprocessor while looking at the map from page 22 that I linked to above. There really isn't that much too it, so even though it's the biggest one, it really isn't all that complicated, so I'd say that "SIMPLE" graffiti is not totally inappropriate. (It's microcoded, and you can actually see the rough but semi-regular "texture" of the code!) This paper has lots more beautiful Vintage VLSI Porn, if you're into that kind of stuff like I am: http://ai.eecs.umich.edu/people/conway/VLSI/MPC79/Photos/PDFs/MPC79ChipPhotos.pdf http://ai.eecs.umich.edu/people/conway/VLSI/MPC79/Photos/PDF... A full color hires image of the chip including James Clark's Geometry Engine is on page 23, model "MPC79BK", upside down in the upper right corner, "Geometry Engine (C) 1979 James Clark", with a close-up "centerfold spread" on page 27. Is the "document chip" on page 20, model "MPC79AH", a hardware implementation of Literate Programming? If somebody catches you looking at page 27, you can quickly flip to page 20, and tell them that you only look at Vintage VLSI Porn Magazines for the articles! There is quite literally a Playboy Bunny logo on page 21, model "MPC79B1", so who knows what else you might find in there by zooming in and scrolling around stuff like the "infamous buffalo chip"? http://ai.eecs.umich.edu/people/conway/VLSI/VLSIarchive.html http://ai.eecs.umich.edu/people/conway/VLSI/VLSIarchive.html http://ai.eecs.umich.edu/people/conway/VLSI/VLSI.archive.spreadsheet.htm http://ai.eecs.umich.edu/people/conway/VLSI/VLSI.archive.spr...

binbag 4y ago

I think this is a great opportunity for young people and they should take the chance to enter a field that even for electrical engineers is tough to enter. Chip design and semiconductor engineering is a bit of a black art, kind of like analogue electronics in general. I've got a PhD in EE and I still marvel at the engineering that goes into chips. If I was starting again I'd seriously consider this opportunity.

bluedays 4y ago

And people always said that chickens were dumb.

iron2disulfide 4y ago

Skimmed the article; what's the difference between this program and what's already taught in electrical and computer engineering classes? I studied ECE for my BS and MS and there were already a couple of chip design-related courses: digital design, VLSI, FPGA, semiconductor physics, IC fabrication. I guess more specialized coursework on verification or manufacturing would have been nice, but I don't think that would warrant a whole new academic program. edit: forgot to mention that I worked as a chip designer for many years right out of school.

p_j_w 4y ago
I had the same thought. Upon reading, this sounds like it goes deeper on the semiconductor physics and fabrication parts. Relevant bit: "Courses will address supply chain issues in chemical engineering, mechanical engineering for tool development, thermal management, packaging, and material engineering as well as industrial engineering, logistics, and manufacturing optimization."
Dracophoenix 4y ago
Which company did you work for?
- iron2disulfide 4y ago
  In chronological order: a fabless IP company, FPGA company, FAANG company. I've since taken a hiatus from chip design.
j_walter 4y ago
There is a big difference between chip design and running a factory...which generally isn't taught anywhere. When I got my ChE degree many years ago we had like 3 or 4 courses for semiconductors and in one course we learned about the manufacturing aspect. Even then it was super outdated with respect to what I actually dealt with when working as a Process Engineer at a fab.
- iron2disulfide 4y ago

baylessj 4y ago

It's neat to see this on the front page of HN -- I got the chance to take an Intro to Semiconductors class from the professor in the article a couple of years ago while getting my EE degree. Semiconductor design never really piqued my interest so I probably didn't get as much out of the class as I ought to have, but Lundstrom was clearly quite passionate about the subject and taught well. Looks like a neat program and it's one that I'm confident will have a lot of resources behind it.

bushbaba 4y ago

For those interested, but coming from a software background. Suggest looking into Georgia Tech's ECE 3056 course. There's lots of public material you can find online. https://oscar.gatech.edu/bprod/bwckctlg.p_disp_course_detail?cat_term_in=201502&subj_code_in=ECE&crse_numb_in=3056 https://oscar.gatech.edu/bprod/bwckctlg.p_disp_course_detail... https://moin.ece.gatech.edu/s13a/hw.html https://moin.ece.gatech.edu/s13a/hw.html

analognoise 4y ago

Yet another way to flood the zone with engineers and keep the wages down. You're much better off doing software.

sylware 4y ago

"non-China" Asia, they got all the top-notch foundries (Taiwan and South Korea). They don't manufacture some critical tools yet, but they should be able to if they want to. China wants its silicium automony and is seriously working on it, India too as it seems. US/america is actually restoring its silicium full autonomy. Meanwhile in EU, we buy intel fabs... amazing way to build EU silicium autonomy. At least, if RISC-V is a success, many chips from anywhere could move around and software should interoperate anywhere without toxic IP in the way or horrible compilers for abysmally complex computer language syntax. A part of the spectrum of chip types won't be able to move around due to "trust issues", but it should happen anyway for a still significant part of this spectrum.

xchaotic 4y ago

Most people here are dunking on this specific industry not paying enough for skilled labour but the problem is more generic- that’s how we build the society around capitalism and we still seem to value capital more than labour.

cvccvroomvroom 4y ago

Currently, it's typically a mixture of physics, material sciences, and/or EE. FYI: DeAnza College in Cupertino, CA has or had a small-scale wafer fab. There are also MOSIS and CEITEC types of fab services for small runs in education.

nickelpro 4y ago

Ha, I'm interning with their chip design team right now. They've done 7 tapeouts but there's a lot of mistakes and other issues down in the plumbing. I wouldn't say their program is significantly better or worse than any other, and my understanding is this focus on a "Semiconductor Degree" is just a reshuffling of courses already offered in EE and ECE degrees. Certainly there are teams far ahead of Purdue. The programs at UCSD and OSU that are pioneering the work on OpenROAD and Skywater 130 are the ones who are really ahead of the game. If I could be at any program in the US, those are where I would want to be. That said Purdue is absolutely ahead of the average ECE program. Very few undergrad programs are completing tapeouts on a regular basis, even at schools that would otherwise have the funding to accomplish it. There are plenty of schools that think of ECE as "EE plus some CS courses" and don't even teach much HDL, much less how to layout a standard cell or do timing analysis.

Gollapalli 4y ago
Is OSU Oklahoma or Ohio?
- nickelpro 4y ago
  Oklahoma. I'm actually working with a kid from Ohio State who's constantly ragging on their program for not even teaching Verilog much less how to build an ASIC. Purdue's program is ok, but it's a veritable bastion of academic excellence compared to schools that have no staff that have ever performed a tapeout, which is most of them. Electrical Engineering departments have tons of faculty who know what they're talking about. CS departments have people who mostly kinda sorta know what they're talking about (even if they're 10 years out of date, which is an eternity in CS). I would wager most schools don't have a single faculty member who's performed a small tapeout, much less a big project for an industry leader. Actual ECE, VLSI, the building of chips, is a wasteland on the academic side of the house IMHO.
  - wcunning 4y ago
    Look at the people around SiFive and RISC-V at UC-Berkeley and look at the transistor guys at UMich. Both groups do lots of work that directly tapes out or works with companies who do. My digital logic prof at UMich took sabbatical to do a startup that netted him a bunch of money on… I forget the details now, but they did a smaller tape out to prove the concept before selling to Intel. It’s not that uncommon.

AshamedCaptain 4y ago

Intel is in hiring freeze right now. So much for the gazillions of needed engineers.

nurspouse 4y ago
Intel hired over 20,000 people this year alone (likely a record for them both in terms of absolute and relative percentage). The freeze is similar to that of other companies: Uncertainty over economic conditions.
Rafuino 4y ago
In the PC division apparently, not across the company or in data center focused areas. Gazillions still needed in those areas
- AshamedCaptain 4y ago
  The PC division which is the largest chip group in Intel, and even includes their moonshot divisions like Labs. Nothing to worry about.

wly_cdgr 4y ago

Forget this nonsense and just go where the easy money is. You can work on all the hard and low-paying problems you like on your own terms once you have your fuck you money

hanszarkov 4y ago

I have fond memories of my semiconductor physics classes. The were not easy whatsoever, rather intense. As cvccvroomvroom had mentioned, I had my VLSI chip fabbed at the MOSIS facility in Westborough MA, during my EE tenure at UMASS Amherst in the 1990s as part of a state-wide chip design competition (yeah - didn't win..). There was much activity on VLSI and computer system design at that time, things have certainly changed in the US. I recall many entries were implementations of various (and obscure) mathematical algorithms, mostly in the frequency domain (hence DSP chips), that tried to solve problems that are now trivial in SW today. My school did win occasionally, others were mostly MIT and WPI - I think in a large part due to the excellent professors at all competting schools and the work ethic of the students. My final submission was the design for an Arithmetic Fourier Transform processor - trying to remove the need for expensive ROM by aliasing the signup up-frequency - which I did the barrel-based ALU for, and thank the grad students for including me in the project. cvccvroomvroom: https://news.ycombinator.com/item?id=31756704#31760353 https://news.ycombinator.com/item?id=31756704#31760353 MOSIS: https://en.wikipedia.org/wiki/MOSIS https://en.wikipedia.org/wiki/MOSIS Barrel ALU: https://en.wikipedia.org/wiki/Barrel_shifter https://en.wikipedia.org/wiki/Barrel_shifter (my ALU did much more than multiply/divide..) (edit - remove double paste)

sitkack 4y ago
Neat, what was your dev process like? Are you still in contact with those grad students?
rjsw 4y ago
The original Berkeley RISC chips were fabbed by MOSIS, would guess that Stanford MIPS ones were too but don't have any papers on that.

DeathArrow 4y ago

China, Taiwan, South Korea are heavily investing in semiconductor industry as they see it highly important for the future. US doesn't want to be left behind and takes action. Meanwhile, in Europe...

ChuckNorris89 4y ago
What about Europe? We habe plenty of trailing edge fabs there. Where we lack is leading edge fabs and top SW companies that can compete with US ones.

LdSGSgvupDV 4y ago

Well. I don't get the point of this program. Did they want to ease the semiconductor supply chain problem? I got my master degree on the field of condensed matter. In the past, our group has strong link to the semiconductor industry. Right now, there are more and more classmates tend to change the field from hardware to software after they graduated. WLB just sucks in semiconductor industry.

mnadkvlb 4y ago
what does WLB stand for ? sorry not from the hardware field
- ChuckNorris89 4y ago
  It stands for work life balance and has nothing to to with the hardware field as is a general word.

boiler_up800 4y ago

Excited to see this. The computer engineering curriculum at Purdue was very high quality, including one of the few courses in the nation where multi-core CPU design was taught. Purdue also has strong chemical engineering and electrical engineering programs so there ought to be plenty of facility talent and student interest to make this work.

qwerty456127 4y ago

ROFLing of my own brain - I first misread "comprehensive" as "superexpensive" because what else can a degree program in U.S. be :-]