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hajile
searching PlanetScale…
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42 ms
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661.
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hajile
3y ago
Mindustry encourages compact designs due to limited space in levels where factorio has infinite space that encourages sprawling designs. In that context, the all-side output is critical for Mindustry's compact layouts. I find Mindustry
662.
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hajile
3y ago
Do you really think all of that is solely for the household and that the man is scrutinizing every single penny? Setting that aside, once you have a family, nobody is going to have much discretionary money and they’ll have even less with ju
663.
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hajile
3y ago
Women are responsible for 80% of the consumer spending. If we assume men and women have equal pay, then 3/5 of men's income is spent by women. If women make 20-30% less overall, then women are actually spending more than 3/4
664.
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hajile
3y ago
This depends on the implementation under the hood and I'd say that the ability to use SIMD even at less than peak efficiency is better than not being able to use it at all.
665.
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hajile
3y ago
PoE (power over ethernet) spec specifies 48 volts, so if you want to use off-the-shelf stuff, you need to use 48 volts.
666.
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hajile
3y ago
This is less cyclical and more common sense changes. AMD used to have 5-wide VLIW. Theoretical performance was massive, but NOTHING could take advantage of 5-wide parallelism consistently. When they switched to VLIW-4, essentially zero perf
667.
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hajile
3y ago
TSMC is building a lot of new 28nm production with plans to shut down all their older nodes and move everyone over in the next few years. GlobalFoundries (formerly AMD fabs) created a brand-new 22nm planar process specifically for older chi
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hajile
3y ago
AMD's use of chiplets matters here. There is overhead, but they also not only get higher yields, but also have many more chips that can hit their highest target clockspeed meaning they can ship far more high-end chips. This is the same
669.
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hajile
3y ago
> A linked list is almost never the right answer. And yet a subset of the linked list called a tree is usually the right answer to problems.
670.
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hajile
3y ago
F# is a very under-appreciated language.
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hajile
3y ago
He had a contained, super-slow growing pancreatic cancer with a high-90s survival rate if he got his pancreas removed. Instead, he waited years until it had metastasized everywhere and it was too late simply because he couldn't bear th
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hajile
3y ago
HX77G is a LOT cheaper than the HX99G ($650 barebones instead of $740 for basically identical performance).
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hajile
3y ago
I want a Steamdeck with four Zen4c cores and 16 CUs.
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hajile
3y ago
Because of that management style, it has been bitrotting for FOUR YEARS and has even gotten forked by a couple people involved so at least some progress could continue.
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hajile
3y ago
CPU is just one part. You're probably adding your own coprocessor and whatever other IO to the FPGA. If the CPU uses a different interconnect/protocol design, you'll have to redesign and debug your entire interface which will
676.
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hajile
3y ago
With each recent node step, you basically get +10-15% clockspeed or -30% power consumption. They just blew their entire node on a small clockspeed ramp. Now, if they want a wider core for M4, that means more transistors and more heat. They
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hajile
3y ago
Actual IPC increase is 1-2%. The rest is from ramping the clockspeeds. This is a problem because power consumption goes up exponentially with frequency. Go up too high and they'll be doing what AMD or Intel does where a single core is
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hajile
3y ago
The GPU is critical to future profits though. Apple really wants your monthly subscription to Apple Arcade and they want to expand in other game areas which is why they've been paying AAA companies to optimize for Mac. This also ties i
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hajile
3y ago
I think it's more accurate to say that M3 favors smaller chips because N3B has atrocious yields (not to mention cost savings). When they switch to N3E and get better yields, I imagine that we'll see chip size grow. As we're g
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hajile
3y ago
You could design a CPU to accept WASM as an input... https://www.destroyallsoftware.com/talks/the-birth-and-death...
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hajile
3y ago
Native devs need to start always cross-compiling their apps for multiple ISAs from the start. Outside of a very tiny amount writing their own SIMD assembly, this isn't usually a huge deal. WASM is also finally becoming a decent solutio
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hajile
3y ago
Next year isn't great timing as they'll be going up against Qualcomm's new Oryon CPU which looks to be both powerful and tiny (165mm2 with 12 full-size cores).
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hajile
3y ago
It depends on what you're using your system for. I want something I can use as a light Steam Laptop in addition to other workloads.
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hajile
3y ago
They need to ship these in a better SKU. 2 P-core and 4 E-core just isn't that great in today's market. The lousy 4 CU iGPU is even worse. At a minimum, I'd like to see 4 P-cores and 4 E-cores plus 8 CU (preferably 16-24 CU).
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hajile
3y ago
The acceleration is unlike anything ARM has ever had. x86 ARM RISC-V Introduction 8008 (1974) ARM1 (1985) Raven-1 (2011) first
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hajile
3y ago
SiFive would practically give away their latest P870 cores (close to A78 performance levels) to get them shipping by the millions in the Pi because of the free advertising, free exposure, and massive boost it would give to the development o
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hajile
3y ago
"We'll pay you to not switch to those cheap RISC-V cores coming down the pipeline".
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hajile
3y ago
It seems like Apple is learning from Intel here. Apple made their E-cores a lot faster the past couple generations. Despite being a tiny fraction of the size, they get nearly 50% of the performance (yay diminishing returns) while using arou
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hajile
3y ago
Oryon seems like it's going to be very competitive with the very underwhelming M3 design.
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hajile
3y ago
Oryon seems to have caught up in performance despite being on N4 (which is just 5nm++), but it's an ARM design from the guys who made M1 in the first place. M3 seems like it generally underwhelms. A17 had like a 3% increase in IPC. The
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