5 ms·

A new way to build chips: Sequentially stacking silicon to extend Moore's Law

83 points by hhs 4mo ago

applfanboysbgon 4mo ago
> Microelectronics manufacturing has been driven for the past 60 years by Moore’s law, which states that the density of transistors on a chip should double every two years. The electronics industry has adopted this principle as a production goal to increase the power and efficiency of computer processors. It has proven successful and steady for decades, but there are signs that the trend is starting to stall. "Signs it's starting to stall"? Moore's 'law' has been dead for a decade at minimum at the literal interpretation, and for over two decades if observable performance is what you actually cared to measure. What does this even have to do with the research the article is about? It's not clear to me why the author felt the need to shoehorn this into the headline.
- andrewflnr 4mo ago
  Especially since "restarting Moore's law" would be an even more badass headline, as long as you're exaggerating for clicks anyway.
- guelo 4mo ago
  I disagree, as far as transistor density it's not completely dead. Looking at the following logarithmic graph there's an inflection point around 2005, it slowed down but it still looks like we're on an exponential growth path. https://ourworldindata.org/cdn-cgi/imagedelivery/qLq-8BTgXU8yG0N6HnOy8g/bb24f8e6-ef3c-46dd-b0fe-39a2a3a9b200/w=1350 https://ourworldindata.org/cdn-cgi/imagedelivery/qLq-8BTgXU8...
  - marcosdumay 4mo ago
    There's no cost on your graph, so you don't know what is the most economical package. The fact that the width of the distribution became so much larger after that inflection is evidence against your point. Your graph points suggestively into Moore's law being dead. (But we do know it died when fabs started making 3D transistors. No need to look at suggestions.)
  - p1necone 4mo ago
    It feels odd that that graph includes some CPUs with integrated GPUs, but otherwise only focuses on CPU transistor count. I wonder what a graph of 'biggest/mean/median retail CPU + dedicated GPU combo transistor count' would look like - presumably the graph would be a decent amount steeper? I definitely think counting GPU as part of the compute package makes sense given how much of modern computing is now delegated to it outside of just rendering.
  - Retric 4mo ago
    Mores law is talking density on a silicon wafers. When you start stacking layers or using larger chips it no longer applies.
    - RealityVoid 4mo ago
      Which of the Moore's laws would that be? It seems people talk about Moore's law without actually specifying what the law says. Transistor per SQ mm? Transistor count in a chip overall? Transistors built in the world at all? General hand-wavy performance of compute? You never know what the counterpart is saying when claiming it dead or alive and people seem to have _ wildly_ different concepts what it means. The original quote seems to be: "The complexity for minimum component costs has increased at a rate of roughly a factor of two per year" - I think this held up pretty well. Wikipedia says: "Moore's law is the observation that the number of transistors in an integrated circuit (IC) doubles about every two years, with minimal increase in cost." Notice nowhere any mention of area. It's more related to cost?
      - Retric 4mo ago
        The original use was in terms of transistors in an integrated circuit doubling every year at identical cost. That rate was revised down by Moore multiple times. So it doesn’t have a firm definition, but ever larger and more expensive chips isn’t what it was referring to.
        bonesss 4mo ago
        “Moore’s Rule of Thumb” is a descriptor I read in a hard print magazine back when my phone had buttons and we all wore onions tied to our belts. A critical insight for its time, but not quite a thermodynamic principle our great-grand kids will be able to verify on their fancy new modern phones that finally got buttons.
- Ballas 4mo ago
  Well, Mooress original statement coupled transistor density to cost. With the current RAM pricing, it looks to me like Moore's law is not only dead, but in fact reversed - the cost of a fixed density of DRAM cells double roughly every 12? Months.
  - bell-cot 4mo ago
    RAM price booms & busts have been a thing since at least the early 1980's, when Andy Grove got Intel out of the memory manufacturing business - because he didn't like the financial aspects, nor the sort of big competitors who were establishing themselves there.
chasil 4mo ago
Heat is a huge problem? Heat radiation elements must be designed as part of the structure? Sophie Wilson has famously said how easy it is for active silicon to get hotter than a nuclear reactor.
- pfdietz 4mo ago
  > Sophie Wilson has famously said how easy it is for active silicon to get hotter than a nuclear reactor. The center of a fuel rod in a PWR reaches more than 1000 C. Perhaps Wilson was talking about the thermal power/area of chips vs. the surface of fuel rods. I believe the former can exceed the latter.
  - monocasa 4mo ago
    Poorly designed or managed chips can reach the point that hot spots in the silicon literally melt, which happens at ~1400C. Thermodynamics sitting on an insulator (relative to the metal portions of the chip at least) on very small scales is very weird and can reach wild spot temps. That's why chip thermals is its own whole subfield of physical design.
    - pfdietz 4mo ago
      Sure, but the center of a PWR fuel rod reaches high temperature in normal operation. Uranium dioxide is not a great conductor of heat. Chips have the advantage that the workings are right at the surface, mere microns from it. So the heat can easily get out. The power density in that thin surface layer can be very high. Perhaps similarly, the power density of a PV cell can be very high, if one just looks at the active layer where light is being absorbed. In CdTe this layer is < 1 micron thick. The energy delivered over the life of the cell per atom in this layer can approach that of nuclear reactions.
    - pfdietz 4mo ago
      I will add that if we're talking about abnormal operation, say in a reactor meltdown, uranium dioxide can reach its melting point, 2865 C. Anyway, it's a promising comparison, since the core of a PWR can reach volumetric power density of ~100 MW/m^3 (and probably higher in naval reactors). Servers can potentially be made very compact.
dvh 4mo ago
The solution is simple. In our universe we have to dump heat through at least one dimension. That is inefficient and leaves only 2 remaining dimensions for the chip, hence all our chips are 2d rectangles. Simply add one dimension so that you can either build 3d chip and dump heat in 4th dimension, or keep chip 2d but dump heat throughout 2 extra dimensions much more efficiently.
- adrian_b 4mo ago
  In living beings things can be 3-dimensional, like a brain, because they are penetrated by a fine network of tubes through which fluid is circulated, taking the heat away. This is likely to also be the only solution for truly 3D integrated circuits (i.e. of unlimited thickness), but it is very difficult to ensure that such a solution has high reliability, because at least for now it cannot be self-repairable, like living tissues, so the cooling network can become clogged or it can start leaking.
  - don_esteban 4mo ago
    This does not scale, due to square/cube law (the energy is generated in a volume, but has to leave via surface -> the energy evacuated per surface area has to grow)
    - zamadatix 4mo ago
      It doesn't scale forever in the extra dimension but it does at least scale a hell of a lot better than just using the envelope of the volume or using a single flat layer.
    - adrian_b 4mo ago
      It scales, because the surface of the network of tubes that fills the volume also grows with the volume, unlike the external surface that encloses that volume. When the volume is scaled, the tubes (i.e. capillaries) are not scaled in size, but they grow in number per a given fraction of the volume. So the scaled devices are not geometrically similar, thus the law of variation of the area per volume with scaling does not apply. This is why a brain or a muscle can scale from a mite with a volume of one thousandth of cubic millimeter to a whale. The scaling is not ideal because the smallest capillaries must be aggregated into vessels of increasing size, so some part of the volume becomes wasted, but still the ratio of area per volume does not decrease linearly, as in the case when the external surface is used for cooling. The same technique is applied in many engineering domains. For instance, the maximum current for a power transistor depends on the perimeter of the source or emitter, not on the die area. Therefore, if one would scale a power transistor maintaining geometric similarity, the switched power per die area would drop quickly, leading to very high costs for the devices. Instead of this, a bigger power transistor does not have bigger sources or emitters, but it has more of them, with the same size as in the smallest transistors, which keeps constant the power switched per die area.
RobotToaster 4mo ago
So we're doing really tiny cordwood construction now? https://en.wikipedia.org/wiki/Printed_circuit_board#Cordwood_construction https://en.wikipedia.org/wiki/Printed_circuit_board#Cordwood...
- RealityVoid 4mo ago
  Nifty link, I learned something new today. I know it's much more convenient building pcb's the way we do today, but maybe there are certain advantages we could get by exploring non-conventional layout strategies at the PCB level. I remember seeing some interesting applications with strategically milled PCB's to get flex on the PCB to fit it some specific confines.
Havoc 4mo ago
Sounds similar to the idea huawei is talking about.
ilaksh 4mo ago
Also look into Mythic AI, and also the recent (ultimately tragic) story of the wurtzite ferroelectric device breakthrough at the University of Michigan.

83 points by hhs 4mo ago

> Microelectronics manufacturing has been driven for the past 60 years by Moore’s law, which states that the density of transistors on a chip should double every two years. The electronics industry has adopted this principle as a production goal to increase the power and efficiency of computer processors. It has proven successful and steady for decades, but there are signs that the trend is starting to stall. "Signs it's starting to stall"? Moore's 'law' has been dead for a decade at minimum at the literal interpretation, and for over two decades if observable performance is what you actually cared to measure. What does this even have to do with the research the article is about? It's not clear to me why the author felt the need to shoehorn this into the headline.

andrewflnr 4mo ago
Especially since "restarting Moore's law" would be an even more badass headline, as long as you're exaggerating for clicks anyway.
guelo 4mo ago
I disagree, as far as transistor density it's not completely dead. Looking at the following logarithmic graph there's an inflection point around 2005, it slowed down but it still looks like we're on an exponential growth path. https://ourworldindata.org/cdn-cgi/imagedelivery/qLq-8BTgXU8yG0N6HnOy8g/bb24f8e6-ef3c-46dd-b0fe-39a2a3a9b200/w=1350 https://ourworldindata.org/cdn-cgi/imagedelivery/qLq-8BTgXU8...
- marcosdumay 4mo ago
  There's no cost on your graph, so you don't know what is the most economical package. The fact that the width of the distribution became so much larger after that inflection is evidence against your point. Your graph points suggestively into Moore's law being dead. (But we do know it died when fabs started making 3D transistors. No need to look at suggestions.)
- p1necone 4mo ago
  It feels odd that that graph includes some CPUs with integrated GPUs, but otherwise only focuses on CPU transistor count. I wonder what a graph of 'biggest/mean/median retail CPU + dedicated GPU combo transistor count' would look like - presumably the graph would be a decent amount steeper? I definitely think counting GPU as part of the compute package makes sense given how much of modern computing is now delegated to it outside of just rendering.
- Retric 4mo ago
  Mores law is talking density on a silicon wafers. When you start stacking layers or using larger chips it no longer applies.
  - RealityVoid 4mo ago
    Which of the Moore's laws would that be? It seems people talk about Moore's law without actually specifying what the law says. Transistor per SQ mm? Transistor count in a chip overall? Transistors built in the world at all? General hand-wavy performance of compute? You never know what the counterpart is saying when claiming it dead or alive and people seem to have _ wildly_ different concepts what it means. The original quote seems to be: "The complexity for minimum component costs has increased at a rate of roughly a factor of two per year" - I think this held up pretty well. Wikipedia says: "Moore's law is the observation that the number of transistors in an integrated circuit (IC) doubles about every two years, with minimal increase in cost." Notice nowhere any mention of area. It's more related to cost?
    - Retric 4mo ago
      The original use was in terms of transistors in an integrated circuit doubling every year at identical cost. That rate was revised down by Moore multiple times. So it doesn’t have a firm definition, but ever larger and more expensive chips isn’t what it was referring to.
      - bonesss 4mo ago
        “Moore’s Rule of Thumb” is a descriptor I read in a hard print magazine back when my phone had buttons and we all wore onions tied to our belts. A critical insight for its time, but not quite a thermodynamic principle our great-grand kids will be able to verify on their fancy new modern phones that finally got buttons.
Ballas 4mo ago
Well, Mooress original statement coupled transistor density to cost. With the current RAM pricing, it looks to me like Moore's law is not only dead, but in fact reversed - the cost of a fixed density of DRAM cells double roughly every 12? Months.
- bell-cot 4mo ago
  RAM price booms & busts have been a thing since at least the early 1980's, when Andy Grove got Intel out of the memory manufacturing business - because he didn't like the financial aspects, nor the sort of big competitors who were establishing themselves there.

chasil 4mo ago

Heat is a huge problem? Heat radiation elements must be designed as part of the structure? Sophie Wilson has famously said how easy it is for active silicon to get hotter than a nuclear reactor.

pfdietz 4mo ago
> Sophie Wilson has famously said how easy it is for active silicon to get hotter than a nuclear reactor. The center of a fuel rod in a PWR reaches more than 1000 C. Perhaps Wilson was talking about the thermal power/area of chips vs. the surface of fuel rods. I believe the former can exceed the latter.
- monocasa 4mo ago
  Poorly designed or managed chips can reach the point that hot spots in the silicon literally melt, which happens at ~1400C. Thermodynamics sitting on an insulator (relative to the metal portions of the chip at least) on very small scales is very weird and can reach wild spot temps. That's why chip thermals is its own whole subfield of physical design.
  - pfdietz 4mo ago
    Sure, but the center of a PWR fuel rod reaches high temperature in normal operation. Uranium dioxide is not a great conductor of heat. Chips have the advantage that the workings are right at the surface, mere microns from it. So the heat can easily get out. The power density in that thin surface layer can be very high. Perhaps similarly, the power density of a PV cell can be very high, if one just looks at the active layer where light is being absorbed. In CdTe this layer is < 1 micron thick. The energy delivered over the life of the cell per atom in this layer can approach that of nuclear reactions.
  - pfdietz 4mo ago
    I will add that if we're talking about abnormal operation, say in a reactor meltdown, uranium dioxide can reach its melting point, 2865 C. Anyway, it's a promising comparison, since the core of a PWR can reach volumetric power density of ~100 MW/m^3 (and probably higher in naval reactors). Servers can potentially be made very compact.

dvh 4mo ago

The solution is simple. In our universe we have to dump heat through at least one dimension. That is inefficient and leaves only 2 remaining dimensions for the chip, hence all our chips are 2d rectangles. Simply add one dimension so that you can either build 3d chip and dump heat in 4th dimension, or keep chip 2d but dump heat throughout 2 extra dimensions much more efficiently.

adrian_b 4mo ago
In living beings things can be 3-dimensional, like a brain, because they are penetrated by a fine network of tubes through which fluid is circulated, taking the heat away. This is likely to also be the only solution for truly 3D integrated circuits (i.e. of unlimited thickness), but it is very difficult to ensure that such a solution has high reliability, because at least for now it cannot be self-repairable, like living tissues, so the cooling network can become clogged or it can start leaking.
- don_esteban 4mo ago
  This does not scale, due to square/cube law (the energy is generated in a volume, but has to leave via surface -> the energy evacuated per surface area has to grow)
  - zamadatix 4mo ago
    It doesn't scale forever in the extra dimension but it does at least scale a hell of a lot better than just using the envelope of the volume or using a single flat layer.
  - adrian_b 4mo ago
    It scales, because the surface of the network of tubes that fills the volume also grows with the volume, unlike the external surface that encloses that volume. When the volume is scaled, the tubes (i.e. capillaries) are not scaled in size, but they grow in number per a given fraction of the volume. So the scaled devices are not geometrically similar, thus the law of variation of the area per volume with scaling does not apply. This is why a brain or a muscle can scale from a mite with a volume of one thousandth of cubic millimeter to a whale. The scaling is not ideal because the smallest capillaries must be aggregated into vessels of increasing size, so some part of the volume becomes wasted, but still the ratio of area per volume does not decrease linearly, as in the case when the external surface is used for cooling. The same technique is applied in many engineering domains. For instance, the maximum current for a power transistor depends on the perimeter of the source or emitter, not on the die area. Therefore, if one would scale a power transistor maintaining geometric similarity, the switched power per die area would drop quickly, leading to very high costs for the devices. Instead of this, a bigger power transistor does not have bigger sources or emitters, but it has more of them, with the same size as in the smallest transistors, which keeps constant the power switched per die area.

RobotToaster 4mo ago

So we're doing really tiny cordwood construction now? https://en.wikipedia.org/wiki/Printed_circuit_board#Cordwood_construction https://en.wikipedia.org/wiki/Printed_circuit_board#Cordwood...

RealityVoid 4mo ago
Nifty link, I learned something new today. I know it's much more convenient building pcb's the way we do today, but maybe there are certain advantages we could get by exploring non-conventional layout strategies at the PCB level. I remember seeing some interesting applications with strategically milled PCB's to get flex on the PCB to fit it some specific confines.

Havoc 4mo ago

Sounds similar to the idea huawei is talking about.

ilaksh 4mo ago

Also look into Mythic AI, and also the recent (ultimately tragic) story of the wurtzite ferroelectric device breakthrough at the University of Michigan.