6 ms·

What's the elevator pitch for RISC-V? My intuition is that RISC was dead for good reason.

RobotToaster 4y ago
>My intuition is that RISC was dead for good reason. ARM cores run most phones, routers, etc, and it's an acronym for Acorn RISC Machine.
- KMag 4y ago
  Last I checked, most hard drives contain ARM cores, so some x86 machines actually contain more ARM cores than x86 cores. An ICE car likely has one or more ARM cores managing the engine and one or more ARM cores running the entertainment system.
- imtringued 4y ago
  Yeah but technically the brand has moved on from being an acronym. Now it is just Arm or "arm". There is no ARM.
snvzz 4y ago
>RISC was dead Dead how? I don't get it. They're literally everywhere, dominating the numbers both shipping right now and cumulative. Every new ISA of any significance in the last 3+ decades is RISC. The only pre-RISC legacy ISA in use is x86, and it is only losing market share.
- cesarb 4y ago
  > The only pre-RISC legacy ISA in use is x86, and it is only losing market share. The only pre-RISC legacy ISA in wide use is x86, but AFAIK the legacy ISA from IBM mainframes (s390/s390x), which is still supported by mainstream enterprise Linux distributions, is also a pre-RISC one.
- error503 4y ago
  > The only pre-RISC legacy ISA in use is x86, and it is only losing market share. And for many generations now, x86 machines are basically RISC processors with a CISC frontend. Empirically it seems that CISC has 'failed' as a way to design processors, and it's better to let the compiler do that job when you're building a general purpose computer.
  - marcosdumay 4y ago
    Well, to be fair, this was easy to predict. RISK was only created because CISC did already fail at that time; people were already letting their compilers do the job and left the specialized instruction basically unused.
    - error503 4y ago
      In hindsight, sure, it seems obvious, but I don't think it was that obvious that CISC performance wouldn't end up scaling. What wasn't obvious, to me anyway, is that even with all of that complicated decode, register renaming and whatnot, these CISC processors managed to stay competitive for so long. Maybe it's just the force of inertia, though, and if there'd been a serious investment in high-performance RISC machines in the 2000s, x86 would've been left in the dust.
      - marcosdumay 4y ago
        Oh, I'd say it is still not really obvious. Sure, RISC has a complete win now, but there is no reason to thing that the ultimate architecture for computers won't be based on complex instructions. We even had some false starts: when vector operations were first created, they were quite complex, then they were simplified into better reusable components; also when encryption operators started to appear, they were very complex, then they broken into much more flexible primitives. There is nothing really saying that we will be able to break down all kinds of operations forever. But still, I wouldn't bet on any CISC architecture on this decade. Anyway, the reason x86 lasted for so long was Moore's law. This is patently clear on retrospect, and obvious enough that a lot of people called it forward since the 90's. Well, Moore's law is gone now, and we are watching the consequences.
NoThisIsMe 4y ago
Isn't ARM a RISC? So no, far from dead, RISC is already hugely successful.
- solarkraft 4y ago
  Some argue it has actually become a CISC (special instructions for JavaScript and so on), but I don't know how RISC-V compares.
  - monocasa 4y ago
    ARM's JavaScript instruction is actually a pretty good example of RISC philosophy. The instruction is a single cycle floating point conversion to integer using x86 abi default rounding modes rather than the rounding modes in the flag register. It's a great example of the RISC filtration test of 'what's a single cycle instruction that can be noticed in instruction traces as something that will give an actual perf improvement'.
  - Sirened 4y ago
    RISC is not about the number of instructions but rather what the instructions do. The famous example of CISC gone to its logical extreme is the VAX's polynomial multiply instruction, which ended up being almost a full program in a single instruction. RISC tends to go the other way, focusing on things that are easy for hardware to do and leaving anything else to software.
- marcosdumay 4y ago
  ARM, MIPS, Power are all RISC. The only real CISC processor in mainstream usage seems to be the PICO, and of course, the x86 and amd64 are currently RISC processors with a CISC interpreter in front of them.
  - snvzz 4y ago
    >the x86 and amd64 are currently RISC processors with a CISC interpreter in front of them. CISC or RISC is a characteristic of the ISA. Usage of microops doesn't change the ISA. It is an opaque microarchitecture artifact.
GoOnThenDoTell 4y ago
Not dead at all, its now a (conceptual) rocket ship No ISA/architecture licensing fees, no restrictions on what you can do with it - you can build an open source core or you could sell your design to others. ARM/x86 doest have this, its all locked up behind lawyers.
audunw 4y ago
Dead simple base ISA and easily extensible means it's an obvious choice if you want a custom processor with your own custom instructions. Scalable so the same ISA (with/without certain extensions) can be used from the smallest microprocessor to high end CPUs. Compressed instructions gives very high code density (and unlike ARM Thumb doesn't require weird mode switching and is available for 64-bit ISA) It's not the first popular open ISA. There was OpenRISC before it, but it was fatally flawed (branch delay slots). So RISC-V is arguably the first good popular open ISA.
- erk__ 4y ago
  There is also OpenPOWER (under the Linux foundation) which I assume is also good? Or is RISC-V stictly better than it?
  - panick21_ 4y ago
    OpenPOWER simply wasn't open, it was simply marketing. Only years after RISC-V started to grow did they change their licensing. RISC-V is more modular and and by now has far more support behind it.
    - classichasclass 4y ago
      OpenPOWER is also an open, royalty-free ISA. You're right that PowerPC and Power ISA didn't start open, but they weren't called OpenPOWER.
      - panick21_ 4y ago
        Even when it was called OpenPOWER it was not as open as RISC-V. Its only much later that it became so.
  - classichasclass 4y ago
    I have several OpenPOWER systems, including the POWER9 I use as my usual desktop. Besides IBM and other server manufacturers like Tyan and Wistron, you can get them as Raptor workstations and servers. If you want an OpenPOWER design to play with, look at Microwatt ( https://github.com/antonblanchard/microwatt https://github.com/antonblanchard/microwatt ) which is complete enough to boot Linux.
mozball 4y ago
Compressed instructions (https://en.wikipedia.org/wiki/Compressed_instruction_set https://en.wikipedia.org/wiki/Compressed_instruction_set) negate one of the "good reason"s
- deleted 4y ago
  [deleted]
gchadwick 4y ago
Licensing innovation - The open licensing model, anyone can make a RISC-V implementation, there's some rules/costs involved if you want to use the RISC-V trademark with it: https://riscv.org/about/risc-v-branding-guidelines/ https://riscv.org/about/risc-v-branding-guidelines/ but certainly a lot cheaper and permissive than arm's architectural licensing model. This enables far more competing RISC-V implementations, with more choice and more ability to modify things to your needs. On the downside you could see eco-system fragmentation and lots of subtle incompatibilities causing issues for broad software support. Ultimately anything technical happening is secondary to this, this is the reason RISC-V is taking off, not anything to do with technical superiority (it simply needs to be good enough).
- hakfoo 4y ago
  "Good enough" is an incredibly big thing. RISC-V doesn't have to displace M2/Epyc/Xeon to be important. There are a trillion cores a year being shipped in embedded devices where "cheap and configurable" is more important than raw performance. What surprises me is that we haven't seen more "built to emulate" designs yet. Many of those "trillion cores" are zombie architectures with terrible price/performance ratios, but nobody wants to rewrite their software or retool things (anything 8051, AVR or PIC seems vulnerable). I could see replacement modules using a cheap-due-to-scale RISC-V core that just emulates the old chip in baked-in firmware.
rwmj 4y ago
"Permissionless development" - want to develop a RISC-V core? Just download one from github or design your own from the freely available specs. No legal agreements to enter or licensing fees to pay. Very different model from Arm (sign a legal agreement before you start and pay for licensing) or x86 (you want a license? LOL) RISC is hardly dead. It more accurate to say it won so comprehensively that it's pervasive. The design principles are now used in every significant chip (including x86).
jasonwatkinspdx 4y ago
In addition to the permissionless model as mentioned, another consideration is to standardize all the boring common bits. RISC-V incorporates a lot of industry learning about how to handle extensions, compression, etc. If a company is considering RISC-V vs a proprietary design for an accelerator or such, getting debugged versions of those features in the ISA vs whatever gets cooked up in house in crunch mode could be pretty big.

>My intuition is that RISC was dead for good reason. ARM cores run most phones, routers, etc, and it's an acronym for Acorn RISC Machine.

KMag 4y ago
Last I checked, most hard drives contain ARM cores, so some x86 machines actually contain more ARM cores than x86 cores. An ICE car likely has one or more ARM cores managing the engine and one or more ARM cores running the entertainment system.
imtringued 4y ago
Yeah but technically the brand has moved on from being an acronym. Now it is just Arm or "arm". There is no ARM.

snvzz 4y ago

>RISC was dead Dead how? I don't get it. They're literally everywhere, dominating the numbers both shipping right now and cumulative. Every new ISA of any significance in the last 3+ decades is RISC. The only pre-RISC legacy ISA in use is x86, and it is only losing market share.

cesarb 4y ago
> The only pre-RISC legacy ISA in use is x86, and it is only losing market share. The only pre-RISC legacy ISA in wide use is x86, but AFAIK the legacy ISA from IBM mainframes (s390/s390x), which is still supported by mainstream enterprise Linux distributions, is also a pre-RISC one.
error503 4y ago
> The only pre-RISC legacy ISA in use is x86, and it is only losing market share. And for many generations now, x86 machines are basically RISC processors with a CISC frontend. Empirically it seems that CISC has 'failed' as a way to design processors, and it's better to let the compiler do that job when you're building a general purpose computer.
- marcosdumay 4y ago
  Well, to be fair, this was easy to predict. RISK was only created because CISC did already fail at that time; people were already letting their compilers do the job and left the specialized instruction basically unused.
  - error503 4y ago
    In hindsight, sure, it seems obvious, but I don't think it was that obvious that CISC performance wouldn't end up scaling. What wasn't obvious, to me anyway, is that even with all of that complicated decode, register renaming and whatnot, these CISC processors managed to stay competitive for so long. Maybe it's just the force of inertia, though, and if there'd been a serious investment in high-performance RISC machines in the 2000s, x86 would've been left in the dust.
    - marcosdumay 4y ago
      Oh, I'd say it is still not really obvious. Sure, RISC has a complete win now, but there is no reason to thing that the ultimate architecture for computers won't be based on complex instructions. We even had some false starts: when vector operations were first created, they were quite complex, then they were simplified into better reusable components; also when encryption operators started to appear, they were very complex, then they broken into much more flexible primitives. There is nothing really saying that we will be able to break down all kinds of operations forever. But still, I wouldn't bet on any CISC architecture on this decade. Anyway, the reason x86 lasted for so long was Moore's law. This is patently clear on retrospect, and obvious enough that a lot of people called it forward since the 90's. Well, Moore's law is gone now, and we are watching the consequences.

NoThisIsMe 4y ago

Isn't ARM a RISC? So no, far from dead, RISC is already hugely successful.

solarkraft 4y ago
Some argue it has actually become a CISC (special instructions for JavaScript and so on), but I don't know how RISC-V compares.
- monocasa 4y ago
  ARM's JavaScript instruction is actually a pretty good example of RISC philosophy. The instruction is a single cycle floating point conversion to integer using x86 abi default rounding modes rather than the rounding modes in the flag register. It's a great example of the RISC filtration test of 'what's a single cycle instruction that can be noticed in instruction traces as something that will give an actual perf improvement'.
- Sirened 4y ago
  RISC is not about the number of instructions but rather what the instructions do. The famous example of CISC gone to its logical extreme is the VAX's polynomial multiply instruction, which ended up being almost a full program in a single instruction. RISC tends to go the other way, focusing on things that are easy for hardware to do and leaving anything else to software.
marcosdumay 4y ago
ARM, MIPS, Power are all RISC. The only real CISC processor in mainstream usage seems to be the PICO, and of course, the x86 and amd64 are currently RISC processors with a CISC interpreter in front of them.
- snvzz 4y ago
  >the x86 and amd64 are currently RISC processors with a CISC interpreter in front of them. CISC or RISC is a characteristic of the ISA. Usage of microops doesn't change the ISA. It is an opaque microarchitecture artifact.

GoOnThenDoTell 4y ago

Not dead at all, its now a (conceptual) rocket ship No ISA/architecture licensing fees, no restrictions on what you can do with it - you can build an open source core or you could sell your design to others. ARM/x86 doest have this, its all locked up behind lawyers.

audunw 4y ago

Dead simple base ISA and easily extensible means it's an obvious choice if you want a custom processor with your own custom instructions. Scalable so the same ISA (with/without certain extensions) can be used from the smallest microprocessor to high end CPUs. Compressed instructions gives very high code density (and unlike ARM Thumb doesn't require weird mode switching and is available for 64-bit ISA) It's not the first popular open ISA. There was OpenRISC before it, but it was fatally flawed (branch delay slots). So RISC-V is arguably the first good popular open ISA.

erk__ 4y ago
There is also OpenPOWER (under the Linux foundation) which I assume is also good? Or is RISC-V stictly better than it?
- panick21_ 4y ago
  OpenPOWER simply wasn't open, it was simply marketing. Only years after RISC-V started to grow did they change their licensing. RISC-V is more modular and and by now has far more support behind it.
  - classichasclass 4y ago
    OpenPOWER is also an open, royalty-free ISA. You're right that PowerPC and Power ISA didn't start open, but they weren't called OpenPOWER.
    - panick21_ 4y ago
      Even when it was called OpenPOWER it was not as open as RISC-V. Its only much later that it became so.
- classichasclass 4y ago
  I have several OpenPOWER systems, including the POWER9 I use as my usual desktop. Besides IBM and other server manufacturers like Tyan and Wistron, you can get them as Raptor workstations and servers. If you want an OpenPOWER design to play with, look at Microwatt ( https://github.com/antonblanchard/microwatt https://github.com/antonblanchard/microwatt ) which is complete enough to boot Linux.

mozball 4y ago

Compressed instructions (https://en.wikipedia.org/wiki/Compressed_instruction_set https://en.wikipedia.org/wiki/Compressed_instruction_set) negate one of the "good reason"s

deleted 4y ago
[deleted]

gchadwick 4y ago

Licensing innovation - The open licensing model, anyone can make a RISC-V implementation, there's some rules/costs involved if you want to use the RISC-V trademark with it: https://riscv.org/about/risc-v-branding-guidelines/ https://riscv.org/about/risc-v-branding-guidelines/ but certainly a lot cheaper and permissive than arm's architectural licensing model. This enables far more competing RISC-V implementations, with more choice and more ability to modify things to your needs. On the downside you could see eco-system fragmentation and lots of subtle incompatibilities causing issues for broad software support. Ultimately anything technical happening is secondary to this, this is the reason RISC-V is taking off, not anything to do with technical superiority (it simply needs to be good enough).

hakfoo 4y ago
"Good enough" is an incredibly big thing. RISC-V doesn't have to displace M2/Epyc/Xeon to be important. There are a trillion cores a year being shipped in embedded devices where "cheap and configurable" is more important than raw performance. What surprises me is that we haven't seen more "built to emulate" designs yet. Many of those "trillion cores" are zombie architectures with terrible price/performance ratios, but nobody wants to rewrite their software or retool things (anything 8051, AVR or PIC seems vulnerable). I could see replacement modules using a cheap-due-to-scale RISC-V core that just emulates the old chip in baked-in firmware.

rwmj 4y ago

"Permissionless development" - want to develop a RISC-V core? Just download one from github or design your own from the freely available specs. No legal agreements to enter or licensing fees to pay. Very different model from Arm (sign a legal agreement before you start and pay for licensing) or x86 (you want a license? LOL) RISC is hardly dead. It more accurate to say it won so comprehensively that it's pervasive. The design principles are now used in every significant chip (including x86).

jasonwatkinspdx 4y ago

In addition to the permissionless model as mentioned, another consideration is to standardize all the boring common bits. RISC-V incorporates a lot of industry learning about how to handle extensions, compression, etc. If a company is considering RISC-V vs a proprietary design for an accelerator or such, getting debugged versions of those features in the ISA vs whatever gets cooked up in house in crunch mode could be pretty big.