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AMD Discloses Initial Zen 2 Details
- pmoriarty 8y agoIs it going to support ECC memory?
- deleted 8y ago[deleted]
- clhodapp 8y agoAlmost certainly. Zen 1 supported ECC on everything down to low-end consumer chips. It's unlikely but within the realm of possibility that ECC support will move up-market slightly with Zen 2 but is almost unthinkable that Zen 2 won't support it at an architectural level.
- throwaway2048 8y agoAll AMD processors have supported ECC for a very long time, its trivial to support it, Intel have just decided to gate it as a premium feature.
- tolien 8y agoSort of - they let mainboard vendors decide whether to support it or not, which means it can be a crapshoot. For example, MSI's been known in the past to kill ECC support with a BIOS update; some vendors have tested that you can use ECC RAM but won't enable any of the error correction (for example, Gigabyte say this in [1]: "non-ECC mode".) Selfishly I really wish they would make it easier, because I'm in the market for a new personal-use storage machine and I've spent far too long researching all this crap but it's looking like I'll have much more certainty that it'll all just work if I buy a Xeon E3/E-2000 series and that's unfortunate. 1: http://download.gigabyte.eu/FileList/Manual/mb_manual_ga-h110m-s2h(gsm)(ddr3)_e.pdf http://download.gigabyte.eu/FileList/Manual/mb_manual_ga-h11...
- deleted 8y ago[deleted]
- snuxoll 8y agoIf you’re wanting a storage box usually it’s just less headache to buy used server gear off eBay. Plenty of bays, DDR3 RDIMM’s are cheap, and power efficient ivy/sandy bridge systems are finally in affordable price ranges. I’m the kind of person that lurks in /r/homelab though - so I’ve also got a 25U rack to keep all my gear. If you want a tower to stuff in a corner things get more dicey.
- blattimwind 8y ago2011-1 systems really aren't that power efficient. 16 DIMMs, 2 sockets will draw ~120 W idle.
- snuxoll 8y agoDon’t populate all 16 DIMM’s unless you need that much memory? Both my single-socket R320 and dual-socket R520 idle at 70W each with 6 DIMM’s installed. Most people probably don’t need the gobs of memory I have either. A R520 with one socket populated and 2x8 or 16GB dual-ranked RDIMM’s would be more than sufficient.
- blattimwind 8y agoI actually misspoke. The system above was configured with only 8 DIMMs (8 GB each) at the time. That's the lower limit for this platform before performance is degraded.
- snuxoll 8y agoSingle socket Ivy/Sandy Bridge-EN servers exist and only need three DIMM’s for max performance, that’s what I run FreeNAS on (R320 with a E5-2450L, mind you I have six DIMM’s).
- 8y ago
- Rychard 8y agoI recall hearing that certain motherboard manufacturers were disabling ECC for their lower-end AMD boards. Does anyone know if this was ever confirmed or not?
- fierarul 8y agoMy newly purchased Gigabyte B450M DS3H, says clearly 'Dual Channel Non-ECC Unbuffered DDR4, 4 DIMMs'. https://www.gigabyte.com/us/Motherboard/B450M-DS3H-rev-10#kf https://www.gigabyte.com/us/Motherboard/B450M-DS3H-rev-10#kf It also mentions that: >Support for ECC Un-buffered DIMM 1Rx8/2Rx8 memory modules (operate in non-ECC mode) Note the operate in non-ECC mode remark. Seems pretty clear to me. The CPU might allow ECC but now it's the motherboard playing tricks.
- pgeorgi 8y agoplaying tricks as in not routing the extra lines
- fierarul 8y agoI don't know the hardware details, but as a buyer this is like moving the goalpost. It was always the CPU that didn't have ECC, but now apparently your whole system has to be designed to be a fancy workstation. Everybody keeps repeating AMD supports ECC out of the box, but the fact that you will most likely not have an AM4 motherboard which does have ECC enabled is new to me.
- llampx 8y agoI also have a Gigabyte motherboard. Pretty disappointed that it doesn't have ECC support. For my next machine I will look more closely.
- agumonkey 8y agothe irony ..
- bhouston 8y ago64 cores with 128 threads. Hope that comes to threadripper. I love and for bringing back competition to the CPU market. We've bought a ton of amd machines in the last year, great bargains in our space.
- ianai 8y agoI really think this is necessary for exascale computing. The core floodgate would have never opened without Intel getting several kicks in the pants.
- tanderson92 8y agoYou can do the math but my estimates are that the energy costs would still be too high for exascale with pure-CPU compute. Accelerators are the way anyone actually planning to build an exascale machine is getting there.
- ianai 8y agoI think it’s doable with tightly integrated compute nodes, ie specially engineered.
- s3cur3 8y agoBenchmarks on the 32-core TR are... disappointing, to say the least.[1] If you’re purely compute bound, it can be a win over the 16-core version, but if memory access is a factor, it’s a wash due to the extra hops to memory. And to my mind, there are very few pure-compute applications that wouldn’t benefit more from AVX2 and the like... in which case a cheaper Intel CPU would still wipe the floor with the 32-core chip. I’m a huge fan of the Threadripper concept, just wish they hadn’t neutered the 32-core chip compared to its Epyc counterpart. [1]: https://www.anandtech.com/show/13124/the-amd-threadripper-2990wx-and-2950x-review https://www.anandtech.com/show/13124/the-amd-threadripper-29...
- snuxoll 8y agoThreadripper’s 4 die variant had to be “neutered” to remain compatible with the TR4 socket without splitting memory bandwidth. The new I/O chiplet would solve that issue entirely, assuming it comes to Threadripper 3.
- gruez 8y ago>On the security side, Zen 2 introduces in-silicon enhanced Spectre mitigations that were originally offered in firmware and software in Zen. does intel have something comparable on their roadmap?
- wmf 8y agohttps://www.anandtech.com/show/13450/intels-new-core-and-xeon-w-processors-fixes-for-spectre-meltdown https://www.anandtech.com/show/13450/intels-new-core-and-xeo...
- beatgammit 8y agoThis is a pretty bold change and really makes Intel chips less appealing. With the recent kernel changes for Intel's Spectre issues and this chip coming up, I think it's a distinct possibility that AMD will take back a ton of marketshare in the server space. If these chips really do have a ~25% performance gain over Ryzen (not counting IPC gains), I might just upgrade, and I think a lot of other people are in the same boat. This could be a fantastic win for AMD. I was worried that Zen 2 was going to be a moderate improvement, but this seems to be pretty significant. It's been a while since AMD has been first to market with a big winner...
- yboris 8y agoI humbly request in every conversation whenever someone uses "distinct possibility" that they quantify it with a number. This phrase may be worse-than-useless: it creates the impression between people that they agree, but could mean a discrepancy between 0.0001% to 10%. I know this isn't central to what you're saying, I just want a better conversational norm around probabilities during conversations in the world.
- celrod 8y agoMost of what I do is floating point operations, so I'll see >100% performance gains with the avx boost. I will upgrade.
- bluecalm 8y agoDamn, with 64core/128 threads becoming widely available a lot of Windows software will have to be updated to use that because of "64 bits should be enough for everybody" kind of decision in Windows when implementing affinity. You can't get more than 64 threads in OpenMp when compiling with MinGW and you can get it with Clang but the implementation wasn't very efficient when tested it. I suspect the problem is there in most Windows thread pool implementations.
- anticensor 8y agoJust run 2 Windows instances. Problem solved.
- blattimwind 8y agoWindows can use more than 64 hardware threads, but a single process kinda can't.
- anticensor 8y ago[dropped]
- quotemstr 8y agoNo, it most definitely is not.
- deleted 8y ago[deleted]
- bhengaij 8y agoNo such inherent limitation on windows
- bluecalm 8y agoIt can but you have to take care too change process affinity groups every time you want to work with threads in another group as a group is limited to 64 virtual cores. It complicates thread pool implementation significantly.
- deleted 8y ago[deleted]
- baybal2 8y agoAre there any more concrete proofs for the HBM2 on package possibility?
- tutanchamun 8y agoDo you mean the comment under the article that mentions HBM? If so I think they refer to these papers by AMD: https://www.computermachines.org/joe/publications/pdfs/hpca2017_exascale_apu.pdf https://www.computermachines.org/joe/publications/pdfs/hpca2... https://seal.ece.ucsb.edu/sites/seal.ece.ucsb.edu/files/publications/2017-iccad-stow-activepassiveinterposers.pdf https://seal.ece.ucsb.edu/sites/seal.ece.ucsb.edu/files/publ...
- djsumdog 8y agoI hope AMD has something on their video chip line-up against nVidia as well. I'm curious if they knew nVidia was working on ray-tracing and plan to implement the same API or if they have some other tech they have up their sleeve they've been working on vendors with. I hate how nVidia has such a monopoly on the video chip market. Who knows, maybe Intel will finally get back into the gamer 3D market and we might finally have three options again.
- screye 8y agoI hate the Cuda monopoly in machine learning right now. I hope some of the mature libraries (TF, Pytorch) start officially supporting AMD GPUs. Nvidia is looting customers that want to use GPUs for Machine Learning on the cloud (like AWS, GCP)
- shmerl 8y agoThere are some efforts to improve the situation: https://www.phoronix.com/scan.php?page=news_item&px=Red-Hat-Plumbing-Compute-Stack https://www.phoronix.com/scan.php?page=news_item&px=Red-Hat-...
- nabla9 8y agoNvidia is cashing in their investments for software and integration. It's AMD's job to make machine learning work in their GPU's. If they don't believe in it and spend the necessary time and effort, nobody else will. Radeon Open Compute Platform (ROCm) has existed for years but apparently it's not good enough. ps. Tensorflow has ROCm backend support. https://hub.docker.com/r/rocm/tensorflow/ https://hub.docker.com/r/rocm/tensorflow/ but is MI25 competitive? https://www.amd.com/en/products/professional-graphics/instinct-mi25 https://www.amd.com/en/products/professional-graphics/instin...
- ll01 8y agoNo clue but if consumer vega is competitive http://blog.gpueater.com/en/2018/04/23/00011_tech_cifar10_bench_on_tf13/ http://blog.gpueater.com/en/2018/04/23/00011_tech_cifar10_be... MI25 has a chance of being
- piinbinary 8y agoDoes 1.25x performance at the same power refer to clock speed? Does that mean that we can expect 5 Ghz in Ryzen 3000?
- clircle 8y agoI don't know a lot about CPUs, but my guess is No. That just sounds too good to be true. I'd love to be wrong though.
- m_mueller 8y agoLook up Dennard Scaling and how it broke.
- dragontamer 8y agoDennard Scaling would have been 2x clock-rate from an improved node. 1.25x scaling from an improved node is way, way, way worse than Dennard Scaling of the past. Intel Pentium III Coppermine (1999) went from 733 MHz on the 180nm node to Pentium III Tualatin (2001) 1400 MHz on the 130nm node. THAT was Dennard scaling. Today, we "only" get double-digit gains from an improved process node. Dennard Scaling was triple-digit gains. Furthermore, most CPU makers focus on the power-saving aspects (which seem to be scaling somewhat well still).
- m_mueller 8y agoIf you look at GP's question, (s)he was asking about 5Ghz in Zen2. Since Epyc 1 is ~3Ghz, a 1.6x increase in clock speed for a ~1.4x smaller process size (AFAIK "7nm" is overselling it compared to 14nm) to me smells like Dennard scaling and thus cannot be expected anymore (if you disregard tricks like turbo boost where a bunch of hardware gets disabled such that the rest can be boosted).
- Dylan16807 8y agoThey're asking about a 1.25x increase on a 1.4x smaller process. Even if you completely ignore boost clocks, the 1900X has a base clock of 3.8GHz, so interpret it as "4.75GHz base clock on a non-Epyc part" if you must. But I don't think you should ignore boost clocks. They're not a trick to make the silicon seem more capable. The silicon really is that capable and boost clocks are a trick to cap power draw. It's entirely fair to look at the 4.2 boost clock on the 2990WX and conclude that the silicon is capable of 4GHz under non-exotic conditions.
- mbell 8y agoAnyone know why we aren't seeing Intel/AMD go the 'ultra-wide' route that we've seen in ARM processors? (Apple's in particular) e.g. we've seen Apple's A12 processor expand ALU's from 4->6 and what seems like a strong focus on cache latency and these changes seem to be rather beneficial in real code. Why aren't we seeing the same from Intel / AMD? As someone whom isn't particularly well informed on the topic my guess is that AMD/Intel are scared of selling a wider-core but lower clocked CPU given how much marketing is attached to clock speed, but I imagine there are architectural issues as well.
- hmottestad 8y agoIs Apple ahead of x86/64 on width? The A10X article on anandtech seemed to imply that every other ARM architecture was far behind on width while Apple was mostly on par (or slightly behind) x86/64.
- mbell 8y agoApple doesn't release the details but Anandtech estimates A12 has 13 execution ports (https://www.anandtech.com/show/13392/the-iphone-xs-xs-max-review-unveiling-the-silicon-secrets/3 https://www.anandtech.com/show/13392/the-iphone-xs-xs-max-re...). I'm guessing the numbers for 6 ALU ports are more accurate than the overall since it's hard to blackbox determine the port sharing structure. Recent Intel / Zen have 4 ALU ports AFAIK.
- coder543 8y agoA10X or A12X? But there are a number of benchmarks showing the A12X outperforming most of Apple's laptop lineup and many competitors. The A12X doesn't have the liberty of a desktop form factor, so it is definitely a mobile part, but it seems reasonable that Apple could make another chip that scales the performance up even further if they wanted to, without really altering the underlying architecture.
- BeeOnRope 8y agoWell AMD has gone wider - to 5 or 6 wide depending on how you count it in Ryzen. Intel hasn't really been able to make any changes to make any major uarch changes in years, since they've been stuck on Skylake (and all the various Skylake++ variants that followed which were Skylake in name only). In Skylake, most of the effort seemed focused on bringing AVX-512 to bear, and outside of that the basic design is largely the same as Haswell. Here's hoping that Apple's chips portend an increase in width in mainstream x86 chips as well.
- ChuckMcM 8y ago"Oh the places you'll go" :-) Assuming this chip doesn't trip all over itself moving things around, it will be an astonishing amount of computer power in a reasonably sized package. This is for me, the only reason to work at an internet giant; because they will build a tricked out motherboard with two sockets and up to 8TB of RAM and with say a petabyte of attached non-volatile storage available, field solvers, CFD apps, EM analysis would just melt away. Whether it is designing a rocket engine, or folding a protein, or annealing a semiconductor on the quantum level. So often these programs use approximations to allow them to run in finite time, and now more and more of the approximations are replaced with exact numerical solutions making the models more and more accurate. Five years from now when people are throwing out these machines to replace them with Zen3 or Zen4 machines, I'm going to be super glad to get one and play with it.
- majewsky 8y ago> exact numerical solutions Isn't that an oxymoron? Numerical solutions always involve some sort of rounding errors because of limited floating-point precision, so they cannot be exact.
- ChuckMcM 8y agoReminds me of the mathematician joke, "We know that one side of one house is painted brown." :-) You are correct in that most of these systems don't have a closed form solution that would yield an exact result, and they rely on either an interpolated value which is inexact depending on deviation or numerical solutions which typically iterate to the nearest point, that the system can represent in its limited 80 or 128 bit floating point system.
- zamadatix 8y agoA computer can be however exact you want it to be, that it supports floating point in hardware doesn't mean that is as accurate as it can get. It is far more apt to bring up most "interesting" solutions do not have an exact closed-form expression.
- ptero 8y ago
- zdw 8y agoThe most interesting thing about this is the speculation about the I/O die being flexible enough to take other workloads - it's basically the "chipset" of old. I wonder if they'll license it - with Apple's A12 already on the 7nm TSMC process, building a Xeon crushing ARM monster for the new Mac Pro by swapping the Ryzen dies for ARM dies seems like a great bit of leverage, assuming Cook and Su could arrange it.
- deleted 8y ago[deleted]
- Const-me 8y ago> meaning 256-bit AVX operations no longer need to be cracked into two 128-bit micro-ops per instruction The instruction set stayed the same. And in the current instruction set, a lot of these AVX instruction still operate on 128 bit lanes. Instructions like vpshufd, vshufps, vpblendw only shuffle/blend/permute within 128-bit lanes, so do AVX512 equivalents.
- Tuna-Fish 8y agoYes, but that was not what the article was referring to. Zen1 CPUs only have 128-bit FPU lanes, and execute wider instructions by splitting them into two in the frontend.
- _emacsomancer_ 8y agoGiven that AMD has introduced their own version of Intel's IME, there's very little incentive for me to consider their CPUs. At least there are workarounds for some of Intel's CPUs.
- burner222 8y agoI'm in the same boat as you.. me_cleaner.py
- _emacsomancer_ 8y agoYeah, I've got a Libreboot'ed X200 and an X230 that I've Coreboot'ed+me_clean'ed. My desktops aren't in such good shape w.r.t. BIOS firmware though.
- stamps 8y agoTalos using POWER is about the only option for us.
- _emacsomancer_ 8y agoI know, and I have my eye on it. But it's a bit out of my price range at the moment.
- MegaDeKay 8y agoYou can disable the PSP in newer BIOSes. I can do it on my X370 Taichi. The link below is old but accurate. Go AMD and don't look back. https://www.phoronix.com/scan.php?page=news_item&px=AMD-PSP-Disable-Option https://www.phoronix.com/scan.php?page=news_item&px=AMD-PSP-...
- aseipp 8y agoThat doesn't really change much in all honesty; it just disables support for things like the fTPM, secure sleep states, and some communication mailbox primitives (that allow things like offloading encryption to the PSP coprocessor, through the Linux crypto API subsystem -- this is all supported in upstream Linux.) The PSP is still essential to the boot process and many probably other things (power management, etc), and you aren't going to just magically turn it off with a UEFI option. If your concern is that the PSP is a blackbox covert channel, it probably changes almost nothing. Both AMD and Intel are functionally equivalent here, as far as I'm concerned. (My ASRock X399 board also has this UEFI option and specifically calls out that it only disables a few key features.)
- caycep 8y agoFrom a desktop/casual system builder/potential new macbook pro buyer question but will these surpass Intel's core i5/i7 offerings in single thread + power efficiency, given Intel is stuck on 14 nm for a while? Thinking of upgrade my 2014 era stuff due to massive improvements in SSD, memory etc. but not sure its worth dropping so much money for coffee lake or just waiting for something better x86 (or ARM...)-wise.
- rawoke083600 8y agoLooks good. Sidenote would love to see some ml-benchmarks in future cpu comparison articles.