throwaway4590

3 ms·

1.
by throwaway4590 3y ago
A bit unorthodox to have a public throwaway and an anonymous-ish main account, I suppose ;)
2.
by throwaway4590 3y ago
> I'm actually a hardware engineer. <...> You can easily validate any specific idea using cycle accurate simulators If anything, I'm less convinced than before that you understand how complex a modern CPU is. Perhaps you
3.
by throwaway4590 3y ago
Having worked in both software and hardware, I understand and appreciate this sentiment in software. But most software engineers don't understand the amount of time and compute that would be required to mock up a novel, yet sufficientl
4.
by throwaway4590 3y ago
I believe my contributions start at Image 25 on Google. Images 1-24 are generic CPU boilerplate images that the lawyers add to most patents in the field.
5.
by throwaway4590 3y ago
Whenever I see talk about Intel's FPGA unit, I link back to an invention I submitted to Intel while I was an intern there [0]. I went through the patent pipeline, but to my knowledge they never did anything with it. This was during the
6.
by throwaway4590 6y ago
They have the patents to do even better than that and create hierarchies of miniature programmable fabric, similar to the concept of L1-L4 caches except for FPGA designs [0]. Unfortunately, they don't have the organizational willpower
7.
by throwaway4590 9y ago
There needs to be a marrying of software and hardware -- and processor instructions to support that. This is hierarchical reconfigurable cache-based architecture I designed a while ago at Intel; I doubt they have touched it but they do own