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tails4e
searching PlanetScale…
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81 ms
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391.
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tails4e
8y ago
I've a similar experience with my CPO Tesla, though in my case it's limited to the previous owners Spotify music being still there, and I've had lots of trouble trying to remove it - random shuffle picks their music as often
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tails4e
8y ago
That's not a fix it's a workaround. The pitch being off is the problem. Turning off mcas solves it but it does no4 fix mcas
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tails4e
8y ago
Memory controllers can be implemented in the soft logic, so should not require a hard memory controller or SoC FPGA.
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tails4e
8y ago
Taiwan has some leading tech companies, most notably TSMC who fabricate a huge portion of all ICs (chips) in the world. China has been investing a lot in building up it's own fabs, with some success - but still well behind TSMC. I wond
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tails4e
8y ago
This is a very good and detailed intro into the basics of FPGA debugging, or specifically in this case using the FPGA to stimulate and monitor an external device. Using the ILA core would allow you to monitor the outputs in real time and dr
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tails4e
8y ago
Sure, however the problem I'm highlighting is most programmers are not aware this std library function is not like the other str[n] functions. There are plenty of solutions, but it was an objectively poor decision to define strncat the
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tails4e
8y ago
strncat is another good example. It's a buffer overflow waiting to happen, and worse it's the 'safe' version of strcat. The trick is the parameter you pass is not the length of the destination buffer, but the remaining l
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tails4e
8y ago
Does anyone know of a good guide to the Minecraft versions? My daughter wants to get mods and maybe venture into scripting, but it seems confusing as to what each version is capable of. We have it on Xbox and android but it seems none of t
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tails4e
8y ago
I'm not sure about resources but I can explain the basics. BTI happens when there is a constant voltage across the gate/source of a transistor for a long time. An example for a digital circuit could be an inverter held in one stat
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tails4e
8y ago
Good question, it depends on a few factors - e.g. BTI is aging that alters the transistor performance over time when a transistor has a fixed bias, so if you've loads of margin for this it should not impact you, or you can mitigate by
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tails4e
8y ago
I work in chip design, and we certainly don't design for planned failure, but we do design for 20 year reliability. This means we over-design to ensure reliability up to 20 years. If a market does not need such longevity then it would
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tails4e
8y ago
It's different for sure. It has a lot of very nice features that make it less easy to shoot yourself in the foot for design. It is more expressive, especially woth multidimensional types and real number modelling, plus a whole host
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tails4e
8y ago
Icarus is great, but I'd still recommend the free to use simulators from the fpga vendors (e.g. xilinx xsim) as they support more of the modern system verilog and VHDL language. Restricting yourself to the older subset of verilog icaru
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tails4e
8y ago
So you not only want open source hardware specs but open source existing tools? I don't see intel open sourcing icc, or other software devlopment centric companies open sourcing their IDEs - ao why shoukd FPGA vendors? The original poi
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tails4e
8y ago
Can you give example of a verilog code snippet vivado actually mis compiles? I've found it incredibly reliable and often use it to double check other tools' results.
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tails4e
8y ago
verilog has behavioural and synthesizable subsets. One is intended for testing, the other for hardware generation. Once you understand this you can learn which constructs, though syntactically correct, should not be used for hardware genera
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tails4e
8y ago
Perhaps it's the case that EDA sucks full stop. I think in the general case that's true, but FPGA based EDA tools, by and large, are better than ASIC EDA tools, and much better than any open-source tool available - and they are es
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tails4e
8y ago
Don't get me wrong, Verilator and Icarus are very impressive in their own right, but neither support the full standard of SV 2005 - either choosing to support most of Verilog (pre SV) or only the synthesizable sub-set. Unfortunately th
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tails4e
8y ago
You can use it batch or in GUI mode. The vivado gui is very good for design visualisation and interactive feedback, but as it's tcl driven you can run headless for regular builds/ regressions. Personally I use the GUI more often t
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tails4e
8y ago
This is completely false. The toolchain is now tcl driven, and all commands are fully documented in programming guide: https://www.xilinx.com/support/documentation/sw_manuals/xili... Basically: synth_design;
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tails4e
8y ago
Webtalk sends usage statistics and nothing more (i.e. device, resources, number of luts, runtime, etc). ISE has bee deprecated since 2012 as vivado has replaced it.
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tails4e
8y ago
Do you use Viado or ISE? They are like night and day. Vivado is amazing, and constantntly innovating how to make hardware design more tractable and robust. Check out a video of Vivado IP integrator and tell me you're not impressed. I&#
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tails4e
8y ago
I believe it's just an account and immediate download - I did it so long ago I can't remember. Either way there's no way you'd be refused access as it's intended be a free to use version so I can't imagine any
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tails4e
8y ago
When did you last use an FPGA or the tools? Linux is fully supported on all tools from Xilinx (and I'm sure altera). Vivado is an amazing tool, and has a very intuitive UI, with great design visualizations and cross-pobing, ip-integrat
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tails4e
8y ago
I'm not sure why this meme is constantly repeated - the modern tools are not terrible. I guess it underscores how difficult it is to shake a bad first impression - ten+ years ago they were very poor, but today they are very impressive.
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tails4e
8y ago
The Xilinx SW has a free edition called webpack that works for the lower end devices (basically it will cover all of these starter boards) and it includes all the SW you need, including a simulator. Interestingly I didn't see the Ultra
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tails4e
8y ago
Have You used non fpga EDA, like ASIC tools? Compared to those Vivado is amazing. There is clearly a concerted effort to continually improve usability and performance. Check out the YouTube videos released with each version outlining the ma
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tails4e
8y ago
Agreed it's a very well designed gui, but seems to gobble memory. If you have a 32gb linux machine it's excellent.
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tails4e
8y ago
Vivado us actually very good for EDA, and especially for one you can get for free (webpack). Compare it to design compiler for basic synthesis- now that is an ugly gui! Vivado had made great strides to integrate ip/rtl/synthesis&#
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tails4e
8y ago
Are you kidding or have you never used other EDA tools? Vivado is a breath of fresh air compared to many synthesis / PnR tools, including the defacto industry standard ones. It's exceptionally intuitive compared to others. Perhaps
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