rsaxvc

8 ms·

31.
by rsaxvc 3y ago
This was excellent debugging and a great write up. If the SHAREABLE bit is like on ARM, it won't effect a system running only one core. On some systems this causes memory ordering to that shareable IO memory to be ordered across multip
32.
by rsaxvc 3y ago
All back now.
33.
by rsaxvc 3y ago
Looks like I got hit, nothing showing after Jun 1.
34.
by rsaxvc 3y ago
My cat did this, but only started after I was gone for three weeks. The night I got home he was so happy he started bringing me his toys on bed. All of his toys. Eventually various household objects. Finally a wooden spoon to my face! I was
35.
by rsaxvc 3y ago
> Right. They're going to get all the streetlights in an entire city to blink in unison. Sure they are. The article states they use GPS for synchronization. I wish they went into it further, but a number of affordable chipset can do
36.
by rsaxvc 3y ago
They need phase locked too. Edit: article says they're using GPS, probably using PWM-aligned-to-PPS.
37.
by rsaxvc 3y ago
You could probably do something simpler now since the new ARMs have good hardware virtualization support.
38.
by rsaxvc 3y ago
> Moreover there's also the instruction cache, and I'm not sure if you can disable caching for that in a meaningful way? Intels used to boot with their caches disabled, but I haven't worked with them in forever, and never
39.
by rsaxvc 3y ago
You're right! I can think of two cases I've run into where bypassing the cache can be faster compared to a miss. On some caches the line must be filled before allowing a write(ignoring any write buffer at the interface above the c
40.
by rsaxvc 3y ago
I don't know for x86. But for things that really matter, I've tested by configuring the MMU to disable caching for the memory that the realtime code lives in and uses to emulate 0% hitrate. And there's usually still a fair am
41.
by rsaxvc 3y ago
>That's particularly interesting because at one time years ago, I saw suggestions that Linux could run as a task on an RTOS. I've worked with systems that ran Linux as a task of uITRON as well as threadX, both on somewhat obscu
42.
by rsaxvc 3y ago
I thought it was a marketing gimmick to get big iron competitors off homebrew risc solutions. Because Intel.
43.
by rsaxvc 3y ago
Three appropriately spaced antennas will give you azimuth and elevation of a ray to the transmitter, but not distance. But using two of the above in different, known locations would allow you to compute the intersection to a 3D location.
44.
by rsaxvc 3y ago
If you want to get really spicy, you can use two antennas and an SDR to compute angle of arrival using nothing but a BLE advertisement's data . This is different from BLE AoA as it doesn't require a cooperative transmitter.
45.
by rsaxvc 3y ago
You could use the BLE AoA extension as well to derive an angle: https://www.bluetooth.com/blog/new-aoa-aod-bluetooth-capabil...
46.
by rsaxvc 3y ago
You could mount one at each corner and use a directional antenna to help.
47.
by rsaxvc 3y ago
Back in the days before Oracle, Sun would sell you a dual socket Opteron desktop and you could add your own FPGA right on the hypertransport in the second socket. Exciting to see that capability becoming more standardized with CXL. Edit: ph
48.
by rsaxvc 3y ago
> Under the circumstances, SBF’s wisest course would have been to just say yes—or yep—to her questions. Why did he take the stand at all?
49.
by rsaxvc 3y ago
To continue the analogy: probably, you're just not on the right subnet. In the US many states collect DNA samples at birth, as well as for citizens born abroad.
50.
by rsaxvc 3y ago
That's a good question, I don't know. I suspect the specific case of sdiv may be practically handled already for post-div Armv7a and ARMv8a AARCH32 on dynamically loaded operating systems, either by the dynamic loader or the compi
51.
by rsaxvc 3y ago
It seems a lot like photoplethysmograph (PPG), in that you get a time domain signal of something related to instantaneous capillary blood pressure, and you process that signal to derive heart rate, and sometimes HRV and other things. The AP
52.
by rsaxvc 3y ago
Ext4 has changed their binary format twice with only forward compatibility. Mounting a new, large ext4 partition often won't work on old machines. Source: had to patch yaboot(PowerPC Mac bootloader) to update ext4 to boot with /bo
53.
by rsaxvc 3y ago
I think you're right that it serves only as a way to communicate to the kernel that userspace wants MTCP socket.
54.
by rsaxvc 3y ago
See also: Intel SKX102, whose documentation has nice diagrams.
55.
by rsaxvc 3y ago
I had assumed that since IPPROTO_MPTCP(262)!=IPPROTO_TCP(6), they were using another protocol number for everything, but you're right that there's a TCP option involved too. But also, plenty of stateful firewalls will strip unknow
56.
by rsaxvc 3y ago
If I understand correctly, the protocol stack is built on TCP, but they use different IP protocol numbers, so a router or firewall may easily pass TCP, but not MPTCP(either by configuration or age).
57.
by rsaxvc 3y ago
> I think an example is something like opcodes crossing I-cache lines Consider also a 16-bit aligned 32-bit instruction crossing a page boundary, potentially with different access permissions. This type of bug allowed userspace applicat
58.
by rsaxvc 3y ago
Do you know if Pi5 has SD/A2 support?
59.
by rsaxvc 3y ago
> What never happened is local, highly parallel algorithms. GPUs maybe? Also, excellent answer.
60.
by rsaxvc 3y ago
This. Every one of these attacks I've worked were loud due to the volume of logins and ratio of failures.

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