my123

35 ms·

451.
by my123 5y ago
> Previously you had to interact with it through proprietary Nvidia APIs That was never the case, OptiX was never intended for use in games. VK_NV_ray_tracing and DXR 1.0 were pretty much there since launch for the former and quite soon
452.
by my123 5y ago
> specially since OpenCL 3.0 dropped SPIR- It's not dropped, it's optional. An OpenCL 3.0 impl with SPIR-V support would be able to run such binaries on top - but Intel are the ones who care.
453.
by my123 5y ago
> OneAPI is focused on [SYCL], which is targeted at C++ and backend agnostic, it does nothing for Fortran oneAPI L0 supports SPIR-V's OpenCL profile, which is a language agnostic IR. oneAPI Fortran offload to GPUs is supported with
454.
by my123 5y ago
On some OpenCL implementations (as in, the ones supporting the SPIR-V OpenCL profile instead of just OpenCL C), this is possible. Intel has a cleaned up variant of OpenCL for the purpose of running SPIR-V binaries called oneAPI L0, and Zlud
455.
OpenCL on Metal – what if clvk works?(threedots.ovh)
25 points by my123 5y ago|9 comments
456.
by my123 5y ago
So they are on Linux, macOS and other platforms. In fact the DirectX in kernel model used by Windows XP and earlier was the anomaly by modern terms.
457.
by my123 5y ago
Unsupported layers will transparently fall back to CPU execution. You can then choose to implement those who can be as TPC kernels. It's fundamentally much less flexible than a GPU. Efficiency of Habana hardware isn't that great e
458.
by my123 5y ago
For NVIDIA? More than one. The Tegra stack uses a totally separate out-of-tree but GPLv2 kernel module (which also works on some dGPU SKUs). It's available at https://nv-tegra.nvidia.com/r/gitweb?p=linux-nvgpu.git;
459.
by my123 5y ago
Habana has their own SynapseAI layer that their TF/PyTorch port runs on. Custom ops are supported too, via a compiler targeting the TPCs, using a C language variant. Oh, and they have an open-source UM software stack for those but it&#
460.
by my123 5y ago
AFAIK that doesn't run on ANE but on the GPU. ANE is used for inference only w/ CoreML.
461.
by my123 5y ago
Using CoreML has some catches, like having to use FP16 instead of integer formats notably.
462.
by my123 5y ago
The ANE is accessible via the CoreML framework, it's a high level interface for ML inference. It however turns out that a _lot_ of customer apps today don't use those accelerators at all. (and about the attempt at using BNNS funct
463.
by my123 5y ago
> Just releasing something competitive with Graviton that's accessible to the whole industry Ampere Altra, which has even more cores. > Where are the ARM instances on Google and Azure? Not to mention Oracle and IBM and other smal
464.
by my123 5y ago
Grace is a very big Tegra, it's just not intended for that. NVIDIA has small Tegra chips too, with the Jetson Nano next coming next year. That might use the same SoC as an upcoming Switch. (and Orin/Atlan as more medium-sized Tegr
465.
by my123 5y ago
The NVIDIA statement about it: > For now, DPX ISA details are available to early access partners. We anticipate broader info availability aligned with CUDA 12.0 release later this year.
466.
by my123 5y ago
Yup, in a semi-related field, NVIDIA has 3xTF32 for cases needing higher precision: https://github.com/NVIDIA/cutlass/discussions/361
467.
by my123 5y ago
Orin uses the Cortex-A78AE core for the CPU complex instead of NVIDIA-designed cores.
468.
by my123 5y ago
Tegra X2 and Xavier are still sold today and contain NVIDIA-designed CPU cores. The team behind those is building new designs too, I wonder when they’re going to announce something.
469.
by my123 5y ago
https://twitter.com/benbajarin/status/1506296302971334664?s=... 396MB of on-chip cache… (198MB per die) That’s a significant part of it too.
470.
by my123 5y ago
Modern Tegras can boot arm64 Windows. But yeah without a licensable Windows Server arm64 SKU, practical uses are quite limited.
471.
by my123 5y ago
It’s a server CPU that runs any OS really (Arm SystemReady with UEFI and ACPI). However, the price tag will be too high for a lot of desktop buyers. (There are smaller Tegras around though)
472.
by my123 5y ago
It was partially from their acquisition. Adreno started by using the fixed function blocks from the Imageon acquisition from AMD but combined them with the programmable blocks of the Qualcomm Qshader GPU architecture.
473.
by my123 5y ago
Internally, Apple uses a totally different mechanism to boot Linux, with the silicon validation firmware stack (that runs OpenFirmware of all things) chainloaded from iBoot.
474.
by my123 5y ago
> being dragged to the lowest common denominator It's rather the reverse. How macOS handles it is by asking for user credentials on a security policy downgrade, and enforcing that by the Secure Enclave. (and if you have user creds,
475.
by my123 5y ago
> But it's impossible to get without giving Google money, and without dealing with a massive warning every time you boot - if you're model even lets you install something other than Chrome OS. That's not even the most pain
476.
by my123 5y ago
It's emulated. That brings down GPU perf by a noticeable amount on its own. (more barriers to be able to run with existing GPU API semantics)
477.
by my123 5y ago
> I'd be surprised if a ton of applications in the wild aren't violating Apple's register x18 requirement macOS outright zeroed x18 on each context switch for a bit, and it's zeroed on each context switch as part of t
478.
by my123 5y ago
Strictly 4 bits. For the Morello prototype architecture with full CHERI, it’s 1 bit for each 16 bytes region. (capability valid bit)
479.
by my123 5y ago
> they need a LLVM 3.7 to 3.8 bitcode translator. LLVM IR provides upwards compatibility, that’s not what the issue is. The issue is rather having your game binaries not work at all on older OS/driver releases when built with a newe
480.
by my123 5y ago
Arm MTE uses a 4-bit tag for each 16 bytes region.

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