klelatti

47 ms·

751.
by klelatti 4y ago
> > Nobody, other than a company that makes only CPUs or CPU IP, adds value in the CPU. Errr Apple?
752.
by klelatti 4y ago
> This essentially forces someone else to purchase the company, as the total license fees for a company like Google/Apple could outstrip the straight acquisition cost. The value of fees paid by these companies is nowhere near the va
753.
by klelatti 4y ago
The title should really be 'Qualcomm claims ARM to prohibit proximity of CPU w 3rd-party modules in one chip'. As others have pointed out Arm disputes these claims. As to the wider dispute Nuvia developed technology using Arm IP u
754.
65 Reasons to Celebrate the 6502(thechipletter.substack.com)
4 points by klelatti 4y ago|0 comments
755.
Adam Tooze on Writing and Productivity(thechipletter.substack.com)
1 points by klelatti 4y ago|0 comments
756.
by klelatti 4y ago
Yes I think cache was an important motivator for some early designs (eg the IBM 801 - shameless plug below! [1]) as the central idea was that fast instruction cache would replace fast microcode store thus removing any code size penalty. In
757.
by klelatti 4y ago
I find it very frustrating. There are nuggets of interesting and relevant historical info and the central message of 'ISA isn't the most important thing for high end CPUs' is something I'd broadly agree with. But it&#x27
758.
by klelatti 4y ago
Here is the JS reference in the article. > For example, they added a lot of great JavaScript features, cognizant of the ton of online and semi-offline apps that are written in JavaScript. In contrast, Intel attempts to optimize a chip si
759.
by klelatti 4y ago
He talks about it for microcontrollers but conveniently ignores a whole range of CPUs between this class and OoO because they don't fit his argument. eg from Wiki: > The Cortex-A53 is the most widely used architecture for mobile SoC
760.
by klelatti 4y ago
The author seems to have been quite wound up by claims that "my high end desktop / server (insert ARM / RISC-V to taste) is better than your x86 because 'RISC'". Fair enough. It's an 80's debate reall
761.
by klelatti 4y ago
I'd generally agree with you on subscriptions but not sure in this case. I think the subscription actually creates an incentive for them to keep the machine updated and working well and its set at a low level. I've seen too much h
762.
Chip Letter Links: RISC Pioneers,Sophie Wilson,ASML Book,Home Made Chips(thechipletter.substack.com)
1 points by klelatti 4y ago|0 comments
763.
by klelatti 4y ago
Broadly agree that for the highest end CPUs other things matter as much and probably more. This article though it has lots of valid points sprinkled with inconsistencies and things that just plain miss the point. One example: not every core
764.
by klelatti 4y ago
In fairness Mr B has 100m subscribers vs YT had 100m daily views in 2006.
765.
by klelatti 4y ago
So Arm won on mobile because: > When they upgraded their instruction-set to support 64-bit instead of just 32-bit, they went back and redesigned it from scratch. This allowed them to optimize the new instruction-set for the OoO pipeline,
766.
David Patterson Speech on RISC at Draper Prize(thechipletter.substack.com)
2 points by klelatti 4y ago|0 comments
767.
TSMC: The Taiwanese chipmaker caught up in the tech cold war(ft.com)
2 points by klelatti 4y ago|1 comments
768.
The mainframe in your pocket running minicomputer software(thechipletter.substack.com)
126 points by klelatti 4y ago|27 comments
769.
by klelatti 4y ago
Thanks - really appreciate that. S/360 is something else!
770.
by klelatti 4y ago
I actually owe you a huge thank you for pointing out how bad the experience was! I genuinely had no idea how awful it was - of course you don't see pop-ups if you are logged in. To be fair to Substack the control to turn off pop-ups wa
771.
by klelatti 4y ago
I can think of at least two of the RISC pioneers who have cited buggy CISC architectures / microcode as a key motivating reason for adopting RISC. I actually cited an example of a major CISC design that basically failed because it was
772.
by klelatti 4y ago
The key word in my comment is ‘early’. You’re right about architectures today but that explicitly wasn’t what I was talking about. Caches we’re important in the IBM 801 but your orher points don’t apply to early RISC designs.
773.
by klelatti 4y ago
Thanks for letting me know. It’s a Substack thing not something I’ve chosen to do - I’ve tried to see if I could could turn off all pop-ups in the past without success. I didn’t know it was quite that bad so will have another look and poss
774.
by klelatti 4y ago
I think 'easy to write assembly code for them' might be stretching it a little bit. Some instructions were pretty complex and I would expect be quite hard to use in practice. What is certainly true is that a single instruction cou
775.
60-Bit Computing(thechipletter.substack.com)
2 points by klelatti 4y ago|0 comments
776.
by klelatti 4y ago
Nitpick accepted - you're absolutely right. To be precise they licensed the relevant patents of course.
777.
by klelatti 4y ago
Largely agree with you here but I think there were two other factors in RISC's early success: 1. As microprocessors became dominant freezing complex microcode - with possible bugs - on an IC was a really bad idea. Better to run with si
778.
by klelatti 4y ago
Signal boxes! https://historicengland.org.uk/images-books/publications/iha...
779.
by klelatti 4y ago
A minor historical quibble: > RISC was a set of design principles developed in the 1980’s that enabled hardware to get much faster and more efficient. There is a strong argument that RISC as a set of design principles (if not as an acron
780.
by klelatti 4y ago
The Intel 8087 and iAPX432 could store 2 bits per transistor in ROM https://twitter.com/kenshirriff/status/1046436838146113536

More ›