I can think of at least two of the RISC pioneers who have cited buggy CISC architectures / microcode as a key motivating reason for adopting RISC. I actually c

I can think of at least two of the RISC pioneers who have cited buggy CISC architectures / microcode as a key motivating reason for adopting RISC. I actually cited an example of a major CISC design that basically failed because it was so buggy. The early microprocessors all had hard coded microcode - Intel only had upgradeable microcode with P6 in the mid 1990s. I didn't say that it was the reason - there were many reasons - but that it was one factor. It was absolutely the case that original RISC designs were simpler to design and that helped them to get traction. Edit - just to add that caches enabled RISC to get decent performance but they were not by themselves a reason for choosing RISC over CISC.