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searching PlanetScale…
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44 ms
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631.
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by
crest
4y ago
Pick one in a suitable jurisdiction with a track record of sending such records and requests for them to the bit bucket?
632.
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crest
4y ago
I would argue that RPC systems shouldn't be burdened down with features like this. If you want to exchange more date than either endpoint can buffer comfortably in memory split it up into several RPC messages e.g. create large object,
633.
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by
crest
4y ago
sigh It still checksums everything it touches and can read damaged file systems in most cases. More importantly it can tell you which parts have been corrupted and which haven't. Because all live data on disk is checksummed and the
634.
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by
crest
4y ago
Oh cry me a river. This is criminals applying the codified "law" against each-other for their temporary enrichment and the entertainment of the spectators.
635.
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by
crest
4y ago
To argue that a company's only duty is to its shareholders does open one up to the argument that nobody but the shareholders (and maybe the employees) owes any duty to companies (e.g. respecting their property). Why should anyone pay f
636.
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by
crest
4y ago
Have you found #forth-hardware-projects and #mecrisp?
637.
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by
crest
4y ago
LMDB is a really great read optimized key-value, transactional key-value store, but you have to be careful with when benchmarking memory mapped files. The problem is that a thread touching paged out memory just blocks without performing any
638.
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by
crest
4y ago
Instruction placement and scheduling is still important on OoO cores e.g. splitting a function intentionally over multiple pages to keep the commonly used parts of functions used together in less pages which helps with instruction cache uti
639.
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by
crest
4y ago
What's wrong with letting (or helping) an untenable business model externalising costs to society at large crash and burn? I've neither created a Facebook account nor consented to their tracking (and other practices). Why is it un
640.
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by
crest
4y ago
Facebook intentionally abuses its captive audience. Reducing the profit they extract from this harm is fully justified. Their combined abuses (not just invasive tracking) should hurt their revenue stream enough to thoroughly reform or break
641.
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by
crest
4y ago
Just patch your compiler/macro assembler to insert HCF instruction before any conditional control flow instructions.
642.
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by
crest
4y ago
It can't replace a normal password manager, but the idea has other applications and it's nice that they already included support deriving a public key pairs from a password and realm. Add a zero-knowledge password proof and you&#x
643.
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by
crest
4y ago
And if TSMC pushes them from 40nm to 28nm the M0+ cores and SRAM should scale to even higher clock rates without drawing too much power. While the RP2040 is "only" specified at up to 133MHz it has been reported stable at over twic
644.
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by
crest
4y ago
Looks like they're just missing a usable Bluetooth driver under an acceptable license.
645.
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by
crest
4y ago
You want your "smart" lamp to respond quickly to reduce power consumption and air time. Just a short sprint once is a while instead of a slower 8 bit cpu crunching on algorithms designed around 32 bit operations. The wider ALU and
646.
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by
crest
4y ago
The 6809 had two 16 bit index registers, PC-relative addressing, and upper half of the stack and data page address was taken from special purpose registers instead of hardwired. It should be a fairly straight forward compiler target. On the
647.
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by
crest
4y ago
How much of that code has to be resident in SRAM or XIP cache once a session key has been established to handle the common TLS record types? Is it feasible to execute the whole TLS session setup code either in place from serial flash or at
648.
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by
crest
4y ago
The AMO aren't NOPs in the presence of any other bus master like DMA engines found on all but the cheapest microcontrollers.
649.
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by
crest
4y ago
Are there really (enough) RISC V cores having no microcode sequencer at all and would have to add one just to implement a 1 bit per cycle microcoded divide instruction?
650.
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by
crest
4y ago
Apple has established a pattern of haphazardly offering partial and late security updates for the two more releases (e.g. Big Sur, Monterey, Ventura).
651.
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by
crest
4y ago
You can already run Docker on Linux running as a guest on FreeBSD's own bhyve hypervisor. Pick a small Linux distro and go for it if you're prepared to accept the overhead.
652.
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by
crest
4y ago
Afaik MacOS X didn't boot on old world PPC machines with NuBus slots, but 10.2.x can be installed on a PowerMac 9500 with a G3 upgrade and with a 32MB PCI Radeon GPU the UI was even usable. It helped that the box was also upgraded with
653.
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by
crest
4y ago
The wireguard kernel module is available from ports and the 13.1 kernel should include the open crypto framework changes required allow if_wg(4) to make use of its fast SIMD-enabled multithreaded ChaCha20+Poly1305. Let's hope the next
654.
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by
crest
4y ago
It immerses you into the world of amoral high level accountants of large cooperations.
655.
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by
crest
4y ago
Nobody will notice a little red line to turn `F` into `A` it worked from them in high school after all ;).
656.
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by
crest
4y ago
The bullshit "AES-1024" is quoted from the product description and repeated in the title as clickbait.
657.
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by
crest
5y ago
You‘ve been given enough details to get your shop in order. Your processes are broken by design if support staff is provided neither with the means to escalate nor resolve issues. It’s time to let your actions or lack of there of speak inst
658.
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by
crest
5y ago
Where will you get your supply of custom chipsets? Do you want to reverse engineer Apple's already badly documented chipsets and reimplement them on fast enough FPGAs maybe even support more modern RAMs or improved off-chip caches? It
659.
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by
crest
5y ago
Modern UIs with all the bloated animations are painful to use with the 30Hz limit imposed on by most USB(-C) to HDMI or DisplayPort adapters. The USB-C alt modes except Thunderbolt just lack the raw bandwidth for 4K@60Hz.
660.
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by
crest
5y ago
The code could be improved by using DMA channel chaining instead of an interrupt to reload the two DMA channels.
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