bytefire

6 ms·

1.
by bytefire 1y ago
Main problem with regular (forward-only time) debugging is a state -- memory, CPU, cache etc -- which is contributed to the bug but is completely lost. With time travel debugging that can be saved which is great but now you have a bunch of
2.
System Call Table in Linux(binarydebt.wordpress.com)
3 points by bytefire 8y ago|0 comments
3.
Kernel (kprobes)-based System Call Tracer (2017)(github.com)
2 points by bytefire 8y ago|0 comments
4.
Linux Kernel Symbols(binarydebt.wordpress.com)
2 points by bytefire 8y ago|0 comments
5.
by bytefire 8y ago
It's interesting how little known this exception handling mechanism is: https://stackoverflow.com/questions/51761688/linux-driver-tr...
6.
Exception Handling Inside Linux Kernel(binarydebt.wordpress.com)
4 points by bytefire 8y ago|1 comments
7.
by bytefire 8y ago
Thanks. I am actually using this inside a kernel module whose job is to inspect Intel's virtualisation state: https://github.com/bytefire/vmtool
8.
Try/catch in Linux Kernel(binarydebt.wordpress.com)
5 points by bytefire 8y ago|2 comments
9.
by bytefire 8y ago
i see, makes sense. may be a different team from V86 worked on it? Conways law :)
10.
by bytefire 8y ago
good point. may be the central idea of how it's implemented isn't too bad: i see hypervisor as a sort of OS kernel for VMs and the transitions from VM to hypervisor - VM exits - akin to syscalls. of course there is more but the ab
11.
by bytefire 8y ago
hi userbinator :) isn't the purpose of virtual 8086 mode somewhat different? i.e. to run real mode applications while the cpu is in protected mode? or did you mean that virtual 8086 could be generalised into a wider virtualisation syst
12.
by bytefire 8y ago
very good, thank you. i'll try to tidy it up
13.
by bytefire 8y ago
very interesting and creative use if EPT, will read the link. thanks for sharing
14.
by bytefire 8y ago
thank you that means a lot! please do add any information you think is relevant :)
15.
How Intel Virtualisation Works(binarydebt.wordpress.com)
160 points by bytefire 8y ago|30 comments
16.
by bytefire 8y ago
no you didn't overlook. the article doesn't discuss actual mechanics of DRAM init, so thank you for adding this info :) i know there is a process of memory training whose aim is to arrive at the right parameters for that DRAM. the
17.
by bytefire 8y ago
you're right, MRC is a major part of FSP but i think FSP does more work than just initialise memory. it also performs some CPU init and also ICH.
18.
by bytefire 8y ago
@userbinator thanks for clarification! this is indeed useful and helps understand contradictions.
19.
by bytefire 8y ago
> The instruction pointer is the IP register. It is zero. it is 0xfff0, at least according to Intel Software Developer's Manual Volume 3, section 9.1.4 "First Instruction Executed". regarding 12 address lines being asserte
20.
by bytefire 8y ago
this is interesting! i am not aware of how this logic is implemented, i.e. the logic of initial state where 12 most significant bits but thanks for enlightening
21.
by bytefire 8y ago
@burfog i have updated the post with explanation of how the reset vector address is calculated. thanks for pointing out :)
22.
by bytefire 8y ago
ah i see your point. here asserted defines a state and not a way of ensuring a certain condition is met (as in higher level languages). yes "initialised to 1" would also convey same meaning. i hope it's clearer now. the term
23.
by bytefire 8y ago
sorry could you explain what pinned or fixed mean in this context. by asserted, i mean the corresponding bits being set. similar thing to when one says an interrupt line is asserted, or gpio is asserted :)
24.
by bytefire 8y ago
yes CS not SS. i should fix that. regarding how the CPU addresses 0xffff.fff0 is not exactly specified in the post. actually CS register is loaded with 0xf000 and normally this would yield a segment selector address of 0x000f.0000 (CS left-
25.
by bytefire 8y ago
yes true. the article deliberately focuses on reset-vector onwards steps. perhaps it should make that clear in the beginning. the ME mention is just to create a context for the starting point. of course ME is a huge topic in itself
26.
by bytefire 8y ago
it's a good point. the article doesn't say classic BIOS hands off to bootloader in 32-bit mode. most systems now-a-days leave off the system in 32-bit mode and that's the point this article makes. the only mention to classic
27.
How Does an Intel Processor Boot?(binarydebt.wordpress.com)
178 points by bytefire 8y ago|47 comments