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How Does an Intel Processor Boot?
- sebazzz 8y agoDoesn't this article confuse BIOS and UEFI? UEFI starts the bootloader in 32-bit mode, however, the classic BIOS still jumps through the bootloader in 16-bit mode.
- bytefire 8y agoit's a good point. the article doesn't say classic BIOS hands off to bootloader in 32-bit mode. most systems now-a-days leave off the system in 32-bit mode and that's the point this article makes. the only mention to classic BIOS is as an example of boot firmware. having said that it is perhaps worth clarifying in the article that classic BIOS would hand off in 16-bit mode :)
- JoshTriplett 8y ago> UEFI starts the bootloader in 32-bit mode Or 64-bit mode, on most current systems.
- hyperman1 8y agoThat's a hard question to answer. On the original PC, ROM BIOS (Basic I/O System) was the name for both the (EEP)ROM-based firmware sitting at address F0000 and the INT based interface it provided to the OS. This included how the system handed of control to the OS. BIOS just loaded the first disk sector and executed whatever it found there. MBR-based partition tables were a DOS-convention, the BIOS couldn't care less what the first disk sector did once it was in control. When UEFI, the new boot interface, was invented, we needed a name for the old boot conventions. So we called them BIOS. It's hard to claim the article confuses anything if the original word BIOS has such a confused meaning to begin with. If you say BIOS=PC firmware except the option ROMs, the article is correct.
- JdeBP 8y agoThe use of "BIOS" to name the PC, PC/AT, PC98, and suchlike firmwares long pre-dates the existence of EFI, and was not a reaction to it. And the name is even more confusing than you paint it to be. The "BIOS" was also the bottom-half of MS/PC/DR-DOS, contained in IO.SYS in (pre version 6) MS-DOS and in IBMBIO.COM in PC-DOS and (post version 3) DR-DOS.
- hyperman1 8y agoTo clarify: The name BIOS was used for the very first PC, but there was no clear distinction made (or necessary) between firmware, boot protocol, interface, ... When the old boot protocol needed a name, it got BIOS. This situation arose as reaction to the existence of the new UEFI boot protocol. AFAIK, IO.sys/IBMBIO.COM was the interface used by DOS to the hardware (some kinde of HAL). Microsoft seemed to think every PC-clone vendor would implement its own firmware, and they would have to port IO.SYS for every platform. Happily, after I thinc Compaq reverse engineered the IBM BIOS, this turned out to be unnecesary: IO.sys was only ever implememented for BIOS.
- JdeBP 8y agoRepeating that this was a reaction to EFI does not make it the case. That remains an ahistorical explanation. And this despite the change of tack from from naming the firmware to naming the boot mechanism. The name used for the boot mechanism, also adopted long before EFI existed, was a "boot record" or "boot sector", subdivided by type into volume boot records and master boot records, terminology that goes back to the 1980s. The boot protocol was not actually named "BIOS" at all. IO.SYS/IBMBIO.COM was the Basic Input/Output System, nomenclature (alongside the names of the other parts of the operating system: the BDOS, the command processor, and the housekeeping utilities) that MS-DOS got from CP/M. It was one of two things called that, the other being the machine firmware. Neither was in any way influenced by something that did not exist until decades later. And although there was confusion between the two, it was not some generalized confusion about parts of the system in general. "BIOS" was not a name for a boot sector/record, even though one of the things contained within a boot record was a BIOS Parameter Block, which people had to regularly explain meant "the other thing that is called a BIOS". And people regularly distinguished in the 1980s between such things as "BIOS services" and the "ROM BIOS".
- hlandau 8y agoIt's a bit light on details in the ME and pre-real mode stages. For example, it omits to mention the 'Authenticated Code Module' which now executes before the BIOS reset vector.
- bytefire 8y agoyes true. the article deliberately focuses on reset-vector onwards steps. perhaps it should make that clear in the beginning. the ME mention is just to create a context for the starting point. of course ME is a huge topic in itself
- userbinator 8y agoEmphasis on the before. AFAIK this is a completely new behaviour and only for newer versions of ME; the older versions still boot the main CPU like a 386 did, and the ME processor is a separate thing (Don't quote me on this; just information I gathered from brief research.)
- ajross 8y agoLots of those details are vendor-specific. Really the specifified behavior exists in the modern world not to enable "boot" (which as you point out is mostly the job of firmware running on the ME and not the application CPUs), but to clearly define the initialization sequence for SMP startup (i.e. how do the auxilliary CPUs start -- Yes, that's right, they start in real mode) and some other minutiae like mode switching for legacy interaction with BIOS calls.
- burfog 8y agoThis part is a bit of a mess: "16-bit Real Mode with insruction pointer pointing to address 0xffff.fff0, the reset vector. In this initial mode, the processor has first 12 address lines asserted, so any address looks like 0xfffx.xxxx. This fact combined with how addressing using segment selector (SS) register works, allows the CPU to access instruction at reset vector address 0xffff.fff0" SS is the Stack Segment register. CS is for code. In real mode, the instruction pointer is only 16-bit and can not hold a value in excess of 0xffff. Ignoring those issues, the explanation still doesn't match what I've seen before in the documentation. If things have changed, when did that happen? The old explanation: The CS base is set to something like -16, that is with all but the lower 4 bits set. This covers all of physical address space, with any higher bits just being ignored. The instruction pointer is set to 0. The result is execution that starts 16 bytes below the first address that is beyond the end of the physical address space. For example, with 44-bit physical addresses this would be at 0x00000ffffffffff0.
- bytefire 8y agoyes CS not SS. i should fix that. regarding how the CPU addresses 0xffff.fff0 is not exactly specified in the post. actually CS register is loaded with 0xf000 and normally this would yield a segment selector address of 0x000f.0000 (CS left-shifted by 4 bits). but on a reset, like the post mentions, first 12 address lines are asserted so the base address ends up being 0xffff.0000. these address lines remain asserted until a long jump is made, after which the first 12 address lines are de-asserted and normal CS segment selector calculation resumes. instruction pointer contains -16 as you mentioned, the resulting address is: base address + IP = 0xffff.0000 + 0xfff0 = 0xffff.fff0 i am not sure if this is worth adding to the post but it is definitely useful.
- garganzol 8y agoHey, thanks for the great article on an intricate topic. It is nice to see the resurgence of WordPress blog posts recently. Back in the day it was the primary source of sacred knowledge for me and many other people around the world.
- asianpopupwork 8y agoIf the memory initialize code is released as a binary blob, it is called as FSP (which usually is used with Coreboot). Why not just call it as the original name - memory reference code(MRC)?
- bytefire 8y agoyou're right, MRC is a major part of FSP but i think FSP does more work than just initialise memory. it also performs some CPU init and also ICH.
- bogomipz 8y agoI have a suggestion and a question. The article makes numerous references to "memory initialization" but I didn't see anywhere where its explained what it means to "initialize" DRAM hardware. If I overlooked this I apologize. My understanding has always been that initializing DRAM consisted of two things: The BIOs had to enumerate how much physical memory that motherboard had installed. And then to test that that memory is working by writing a bit to each location and reading it back. Would this be accurate? Would also be worth noting that many BIOSes allow you to hit the space bar to skip memory initialization presumably because it somewhat time-consuming.
- bytefire 8y agono you didn't overlook. the article doesn't discuss actual mechanics of DRAM init, so thank you for adding this info :) i know there is a process of memory training whose aim is to arrive at the right parameters for that DRAM. the way i see it, it is sort of in-field caliberation. boot firmware can then store those parameters inside BIOS chip and then on next reboot just use those parameters, because memory training is a time-consuming process.
- usr1106 8y agoIt would be interesting to understand the fundamental difference why ARM systems can even boot without a BIOS and a BIOS chip. Of course they also need to have their DRAM configured, but when compiling U-Boot I don't recall any complication like stackless code. Just that your address space is extremely small in the beginning.
- zaarn 8y agoIIRC from my Embedded Linux course, ARM has a small amount of SRAM embedded in the chip that is available during boot and is later disabled in favor of the bigger DRAM chips once the controller is initialized. Uboot is responsible for this in some chips.
- usr1106 8y agoYes, ARM has this small amount of SRAM. Having a bit of memory available was such a trivial concept that I did not even think of that the much more complicated x86 processor could just lack it. But I guess this might not be the only fundamental difference. (I have thought to utilize the SRAM for some optimization later at system runtime because it should be incredibly fast. At least if you don't have to care about power consumption that should be possible or does the specification require to turn it off?)
- zaarn 8y agoWell, as the article mentions, Intel uses Cache during Boot as an early SRAM memory, difference seems to be (probably for legacy reasons) that this is not the default. Most of the boot process is just swinging from one legacy mode to the next until you hit the modern parts.