Marat_Dukhan

12 ms·

61.
by Marat_Dukhan 11y ago
nVidia Kepler and Maxwell (i.e. the two latest archs ATM) use VLIW instruction encoding
62.
by Marat_Dukhan 11y ago
Forms with immediate operands were removed in MIPS Release 6, but the register-register forms are still there.
63.
by Marat_Dukhan 11y ago
There is an assembler that does more intelligent things - https://github.com/Maratyszcza/PeachPy
64.
by Marat_Dukhan 11y ago
MIPS has arithmetic instructions which trap on overflow. And guess what - gcc & clang use variants which DO NOT trap on overflow.
65.
by Marat_Dukhan 11y ago
There was time when Google Search didn't make money either: http://www.zdnet.com/article/can-googles-search-engine-find-...
66.
by Marat_Dukhan 11y ago
>> I mean server and backend systems, HPC systems In HPC x86-64 (in fact, Intel x86-64) is the only thriving architecture: here is the breakdown from the last Top500: - 445 systems are Intel x86-64 - 21 systems are AMD x86-64 - 19 sys
67.
by Marat_Dukhan 11y ago
Thanks! I updated the link
68.
by Marat_Dukhan 11y ago
Another example of a short peer-reviewed paper (and related to Computer Science, yay!) is "Counterexample to Euler's conjecture on sums of like powers": http://fermatslibrary.com/s/counterexample-to-euler
69.
by Marat_Dukhan 11y ago
The X-Gene 1 processor is made on 40nm process, so it is hardly competitive
70.
by Marat_Dukhan 11y ago
I am not interested in working on FreeBSD support, but I would accept the patch if somebody contributes it.
71.
by Marat_Dukhan 11y ago
Probably I didn't make it clear enough: - The old version of PeachPy (on BitBucket and PyPI) supports ARM, but can't directly generate machine code. - The new version of PeachPy (on GitHub) can directly encode instructions into ma
72.
by Marat_Dukhan 11y ago
Yeppp! supports Xeon Phi, and includes binaries for it, albeit without hand-tuned kernels. Support for GPUs is unlikely: Yeppp! is a single-threaded library by design, and GPUs programming models are intrinsically multi-threaded. The R bind
73.
by Marat_Dukhan 11y ago
The only supported OS are Linux, Windows, OS X, Android, and Blue Gene/Q OS.
74.
by Marat_Dukhan 11y ago
Because there is more to performance optimization than just using SIMD types. Well-optimized assembly code tries to hide instruction latency and balance load on different execution units. Both instruction latency and sets of execution units
75.
by Marat_Dukhan 11y ago
Earlier versions of PeachPy generated assembly source that had to be compiled with NASM or GNU assembler. Now PeachPy can directly generate object files, and it would be fair to call it a compiler, but I like the old name
76.
by Marat_Dukhan 11y ago
This is a re-write of an older version of PeachPy (you will find it at https://bitbucket.org/MDukhan/peachpy ), which supported x86-64 and ARM, but didn't generate object files directly. The new PeachPy currently o
77.
by Marat_Dukhan 11y ago
Author here. AMA. Note to mods: it would be fair to add (2013) to the link, as the site wasn't updated since Yeppp 1.0.0 release
78.
by Marat_Dukhan 11y ago
Yes, on most platforms types map to intX_t/uintX_t.
79.
by Marat_Dukhan 11y ago
There are bindings for Julia - https://github.com/JuliaLang/Yeppp.jl
80.
Show HN: PeachPy – x86-64 assembler in Python, with Go support(github.com)
4 points by Marat_Dukhan 11y ago|0 comments
81.
by Marat_Dukhan 11y ago
According to /proc/cpuinfo, CPU Implementer is 0x56 ('V' = Marvell) and CPU part is 0x584 (Marvell Armada XP). This is most likely not Cortex A9 (which would have CPU Implementer == 0x41 and CPU part == 0xC09), but Marve
82.
by Marat_Dukhan 11y ago
To think different
83.
by Marat_Dukhan 11y ago
A new C standard does not triumph by convincing Microsoft and making them see the light, but rather because Microsoft eventually dies and a new generation grows up that is familiar with it
84.
by Marat_Dukhan 11y ago
In yet another alternate universe, Google sold to Excite for under $1M in 1999; Tesla sold to Excite in 2013; in 2014 Excite is named the best employer for the fifth time in a row!
85.
In-Browser Memory Latency Benchmark (PNaCl/Asm.js)(maratyszcza.github.io)
2 points by Marat_Dukhan 12y ago|0 comments
86.
by Marat_Dukhan 12y ago
In the kernel: 1. Access to hardware performance counters and energy counters 2. Easily loadable custom drivers 3. File system that is not slow as hell ("Getting the modification time of a file ... seems to be about 100 times slower on
87.
by Marat_Dukhan 12y ago
>>Modern GPUs don't even have SIMD units per core any more; both NVidia and AMD are completely scalar now. This is factually incorrect. Let me quote Vasily Volkov [1]: "Earlier GPUs had a 2-level SIMD architecture — an SIMD
88.
by Marat_Dukhan 12y ago
Sorry, I don't buy the argument that "code is terrible to read and hence maintain" from a GLibC developer. CRLibM does have a bunch or tricky macros to work-around bugs in decade-old compilers for architectures no one cares a
89.
by Marat_Dukhan 12y ago
Implementations in CRLibM are correctly rounded (i.e. as accurate as possible) and are, in my benchmarks, faster than GNU LibM. Thus, they are a Pareto improvement over GNU LibM.
90.
by Marat_Dukhan 12y ago
Why not just merge the CRLibM implementations?

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