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>>Modern GPUs don't even have SIMD units per core any more; both NVidia and AMD are completely scalar now. This is factually incorrect. Let me quote Vasily Vol
by Marat_Dukhan 12y ago
>>Modern GPUs don't even have SIMD units per core any more; both NVidia and AMD are completely scalar now.
This is factually incorrect. Let me quote Vasily Volkov [1]: "Earlier GPUs had a 2-level SIMD architecture — an SIMD array
of processors, each operating on 4-component vectors. Modern
GPUs have a 1-level SIMD architecture — an SIMD array of
scalar processors. Despite this change, it is the overall SIMD
architecture that is important to understand."
[1] http://parlab.eecs.berkeley.edu/sites/all/parlab/files/LU,%20QR%20and%20Cholesky%20factorizations%20using%20vector%20capabilities%20of%20GPUs.pdf http://parlab.eecs.berkeley.edu/sites/all/parlab/files/LU,%2...
- ANTSANTS 12y agoI'm aware of AMD's terminology here, and I disagree with it. They say "SIMD array of scalar processors" where "SIMT" makes much more logical sense to me. I believe the only reason that they maintain this "2-level vs. 1-level SIMD" distinction is because NVidia coined the term SIMT, so they refuse to use it due to marketing concerns/some possible trademark or other IP law liability/pride. ...and now I read your paper, and I need to eat humble pie, because it apparently predates NVidia's use of the term "SIMT." Apparently, even if it makes more logical sense, SIMT is the buzzword! Either way, I think it's a stretch to say I'm "factually incorrect" just because I used different terminology. Whether you think of it as an "SIMD array of scalar processors", or (to use NVidia terminology) an "SIMT warp of scalar threads" the important thing here is that the execution units in the bundle with the shared instruction pointer operate on scalar values now, rather than 4-element vectors.