Const-me

55 ms·

721.
by Const-me 4y ago
I agree about Python or PHP. However, for Java or modern C#, in my experience the performance is often fairly close. When using either of them, very often one doesn’t need C++ to be good enough. Here’s an example, a video player library for
722.
by Const-me 4y ago
I only use AF_UNIX sockets when I need to pass open file handles between processes. I generally prefer message queues: https://linux.die.net/man/7/mq_overview I haven’t measured myself, but other people did, and t
723.
by Const-me 4y ago
Let’s not pretend all conceivable applications are, or should be, written in C++. People mostly stopped using C++ to develop web servers which handle web requests, because they moved to Java, C#, PHP, Ruby, Python, etc. People mostly stoppe
724.
by Const-me 4y ago
> Which doesn't mean that they are any better than the provided standard implementations. That standard implementation is a thin wrapper over malloc(). That standard malloc() is not necessarily good enough. The performance is not gr
725.
by Const-me 4y ago
> it ends up breaking down as soon as you need to interact with anything outside of that specific language's ecosystem. It works OK in nuget on Windows, due to the different approach taken by the OS maintainer. A DLL compiled 25 yea
726.
by Const-me 4y ago
Not sure about formatting code, I think that's a job for IDE or text editor, not the runtime. Absolutely agree about the rest of them.
727.
by Const-me 4y ago
There’s a simpler explanation of the algorithm, without complex numbers. That value being computed is a signed angle of the curve, as viewed from the points on the plane. When the point is inside the curve, that viewing angle is full circle
728.
by Const-me 4y ago
That thread-local MXCSR register is particularly entertaining in a thread pool environment, such as OpenMP. OSes carefully preserve that piece of thread state across context switches. I tend to avoid touching that value, even when it means
729.
by Const-me 4y ago
I think C# did it right in 2000. Regardless of CPU architecture, integer types like short, int, or ulong have fixed size of 16, 32 and 64 bits respectively. There're couple special types with machine-dependent size, like IntPtr, but th
730.
by Const-me 4y ago
I don't know the answer to your questions. But IMO these joint ventures are believable. AFAIK companies like McDonalds and Pepsi started local operations during the last years of the Soviet Union. It's possible that for at least a
731.
by Const-me 4y ago
> Europeans give up decimal comma and US gives up imperial measurements. I’m a European, and I hate decimal comma. When consuming data saved by MS Excel or similar, dealing with decimal commas is an ongoing source of annoyance and compat
732.
by Const-me 4y ago
I wonder why doesn't that stuff run some ARM-based Linux? Do they actually need a CPU as fast as that Adler Lake? I have made embedded software for industrial equipment with mid-range ARM SoCs, things went rather well. I would probably
733.
by Const-me 4y ago
Whenever you need a lookup table with vectors, remember the instructions like _mm256_cvtepu8_epi32 or _mm256_cvtepi8_epi64 can zero extend or sign extend integer lanes, and they can load source directly from memory. The OP needs a vector wi
734.
by Const-me 4y ago
Ukraine wasn't Putin's first military offence: https://en.wikipedia.org/wiki/Russo-Georgian_War It's reasonable to assume if we fail to stop Russians in Ukraine, they continue restoring Russian empire wi
735.
by Const-me 4y ago
> run four instances of the loop in parallel Indeed, here’s an example which uses even higher latency FMA instructions to accumulate: https://stackoverflow.com/a/59495197/126995 The example uses 4 independent a
736.
by Const-me 4y ago
Yeah, cvtsi2sd has 3-9 cycles or latency on Zen3, but throughput ain’t too bad. The table on uops.info says on Zen3, cvtsi2sd has 1 cycle throughput, meaning a core can complete these instructions every cycle. There’s no other dependencies
737.
by Const-me 4y ago
> about 3x the overhead to convert from int to float. That 3x overhead has nothing to do with converting types. A CPU can't compute x += y before it has the old value of the x. This is called "data dependency chain". Moder
738.
by Const-me 4y ago
> We now also have explicit SIMD vectorisation.. So say on an AVX512 enabled architecture you can compute the dot product of two vectors I wonder will it be good? Computing dot product efficiently is harder than it seems, example: https
739.
by Const-me 4y ago
Zen 2 cores have 4 execution units which run arithmetical and logical SIMD instructions: https://en.wikichip.org/wiki/amd/microarchitectures/zen_2#Fl... Apparently 3 out of 4 units can add integers, but all 4
740.
by Const-me 4y ago
That’s often a good way, but not necessarily the best one. On my computer with Zen3 CPU, cvtdq2ps and cvttps2dq have 3 cycles of latency each, divps up to 10 cycles, results in 16 CPU cycles in total. When the divisor’s the same for all lan
741.
by Const-me 4y ago
I sometimes write optimized low-level code, but many of these books, and internet articles, are rather old. CPU architectures have converted to just two, AMD64 and ARM64. They have tons of useful instructions like sign extension and integer
742.
by Const-me 4y ago
I think the compiler tricks are reasonably transparent to any developer who knows both C and assembly, thanks to godbolt.org. Couple times I even back-ported these tricks from clang-generated assembly back into C++ intrinsics.
743.
by Const-me 4y ago
An example is AMD Zen 2. The latency of both vpaddd and vpxor is 1 cycle, but throughput is different, 0.33 versus 0.25 cycles. BTW, Zen 2 CPUs are used in both Xbox S/X, and PS5.
744.
by Const-me 4y ago
> simply add 128 (or however much—depending on the sizes at hand) to each of your inputs before comparing On many CPUs, bitwise XOR is slightly more efficient than addition. But you still need the magic number. > and you are in a host
745.
by Const-me 4y ago
The best palette-reducing algorithm I know is the one by Xiaolin Wu: https://www.ece.mcmaster.ca/~xwu/cq.c That particular implementation is less than ideal. It has issues with correctness (the precision of FP32 accumu
746.
by Const-me 4y ago
I have 2 computers with AMD, sleep glitches on both. On desktop, sometimes there's no video signal after wake up. The laptop doesn't support sleep at all, it's either connected standby = not sleeping, or hybernate. Windows sa
747.
by Const-me 4y ago
Well, I’m afraid for your case there’s no silver bullet, neither hardware nor software. If you really need to improve things, you should refactor code, and especially data structures, for performance. Couple tips. I recommend staying away f
748.
by Const-me 4y ago
Don’t browsers already have similar update logic implemented in their HTML DOM? If the DOM tree stays but a property of some element changes, if that property affects size or layout or other visual state of things, the browser will re-rende
749.
by Const-me 4y ago
I’ve read that comment but I still don’t understand what it is you’re computing. It seems you have substantial amount of complicated C++ written without much thoughts about performance, and now you want to improve performance without spendi
750.
by Const-me 4y ago
> which influence future branches If you mean “future branches on other threads”, I recommend re-thinking your algorithm and/or data structures. If the hardware has strong memory order like AMD64, on a massively-multicore CPU your c

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