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Intel delays chip-making changes

145 points by willvarfar 11y ago

MCRed 11y ago
I saw another article that referred to this as a sign of the slowing of Moore's law. However, Moore's law has its variances so I'm not really worried about that. What I do wonder about is why we are not seeing more cores as we go down to smaller nodes. 2 and 4 cores are common now, but have been seemingly for a decade. Why aren't we seeing 8, 16, 32 and 64 cores? If you reduce the feature size and effectively thus double the surface area available, why not increase the cores? It seems the new area is going into integrated GPUs (never as good as discrete GPUs, but certainly cheaper) and cache. Cache can improve performance but not like more cores. While intel does a tick/tock design revision, each core seems to grow to fit the available space, with only adding a few instructions, which only add marginal utility. Not the same as doubling the number of cores, which would double theoretical performance. Under Erlang/Elixir, we are able to get close to linear speedup from additional cores. I understand other languages struggle with multi-threaded programming, but should CPU designs be hobbled simply because the software industry is not where it should be? Am I missing something?
- sfilipov 11y ago
  I think you found the answer already. Already there are server processors with a lot of cores (i.e. 20) - if you can utilise them all then buy one. However, for most client workloads, more cores does not translate to better performance because many of those cores will just idle. Single-threaded performance is still the king.
- hmottestad 11y ago
  18 cores seems to be the best that Intel does. Which is fairly decent. http://ark.intel.com/products/84683/Intel-Xeon-Processor-E7-8880-v3-45M-Cache-2_30-GHz http://ark.intel.com/products/84683/Intel-Xeon-Processor-E7-... In laptops, there has been a trend for thinner, lighter and long battery life. So the easiest is to lower power demand. If you increase the number of transistors (by adding more cores), power consumption wouldn't go down enough.
  - robin_reala 11y ago
    Xeon Phi currently has 61 cores[1] (62 on-die, 1 deactivated for yield reasons), and the next generation coming soon pushes that to 72 cores. [1] http://www.intel.com/content/www/us/en/processors/xeon/xeon-phi-detail.html http://www.intel.com/content/www/us/en/processors/xeon/xeon-...
- yareally 11y ago
  We do have 8, 12 and 18 core CPUs made by Intel. They're just expensive and not made for the typical consumer. My PC at work has the 12 core Xeon. It's nice for compiling large projects, but at home I'm content with a 4 core i7. http://ark.intel.com/m/products/75283/Intel-Xeon-Processor-E5-2697-v2-30M-Cache-2_70-GHz#@product/specifications http://ark.intel.com/m/products/75283/Intel-Xeon-Processor-E... http://ark.intel.com/m/products/81061/Intel-Xeon-Processor-E5-2699-v3-45M-Cache-2_30-GHz http://ark.intel.com/m/products/81061/Intel-Xeon-Processor-E...
- HappyTypist 11y ago
  Smaller die areas have complications of its own -- heat has less space to travel. It's not as simple as "half the die area, double the cores" -- if you do that, you will end up overheating. But I think the main issue, as you mentioned, is multi-thread programming. Everyday users spend most of their time in a browser, running Javascript which is mostly synchronous. There are web workers, etc, but the vast majority of sites are still running single threaded JS.
  - jsprogrammer 11y ago
    People may want to run multiple simultaneous threads though, which is what additional cores excel at.
    - pixl97 11y ago
      No, you may want to run multiple threads, most people want to use their computer. Most people are not limited by their CPU (or even memory these days), the limits are IOPs which an SSD can help with or the speed of their internet connection. Most computers can run 2 or 4 threads at the same time already. Just look at your average Windows computer, even when it's busy, it's probably because 1 core is in use and the program doesn't multithread in a decent manner because it is very hard to program that way.
      - jsprogrammer 11y ago
        >No, you may want to run multiple threads, most people want to use their computer. Whether most people know how their computer works or not, many want to be able to simultaneously: listen to music and/or watch a streaming video, browse multiple web pages, use text editors, specialized business applications, IDE's, and more. You are going to have a bad time trying to do all of that on a single core, much less a single thread.
        MCRed 11y ago
        I have something useful to say to this but fuck it. I get nothing but down votes here, so why bother investing time in "Hacker" news? You shouldn't be downvoted like you are, this site is full of assholes apparently. Have an upvote.
- jsprogrammer 11y ago
  We do see 8 and 16 cores. Newegg currently lists 10 different 8-core desktop processors and 120 different 8-core server processors. There are also 10-, 12-, 14-, and 16-core processors available to purchase right now.
- habitue 11y ago
  Two things I can think of: for consumers, applications don't currently make the best use of multiple cores. There just isn't enough work to do on them. For gaming at least, DirectX 12 will remove a limitation that only one CPU core can control the GPU at a time. That may push demand for more cores upwards over time. Second is that cache coherence gets really ugly the more cores you have with a single shared memory. From what I understand, this is a limitation of assumptions in the x86 architecture. A completely new architecture might sidestep the problem, and indeed I've heard of 1024 core machines etc, which I doubt have just brute-forced cache coherence.
  - socceroos 11y ago
    DX12 - catching up to Mantle and Vulcan but ahead in marketing.
- marcosdumay 11y ago
  You are missing that yes, CPU designs are hobbled by the software industry shortcomings. Also, you are overlooking that on the traditional architectures memory access becomes slower the more cores you add. Better integrated GPU and better power consumption on PCs will win on almost all scores until the integrated GPU becomes good enough, and power consumption gets near the theoretical minimum. Then we'll probably see alternative architectures (more alternative than a GPU).
  - pjc50 11y ago
    Clearly we should boot the operating system straight onto the GPU. (Joking, but also a great project if you have an army of graduate students to keep busy)
    - monocasa 11y ago
      The PowerVR guys appear to be running a full RTOS w/ memory protection on their GPU FWIW.
- detaro 11y ago
  for desktop systems, small number of fast cores is still better than multiple slower ones, since a lot of the software that would profit most isn't very well optimized for making use of many cores. IMHO there is not that much demand for better performance in bread-and-butter CPUs anyways, things like embedded graphics, power saving etc matter more. The top desktop CPUs have 6 or 8 cores, and Intel Xeons go up to 18. And there are the Intel Xeon-D and Atom Cxxxx, which go in the direction of having (at the moment up to 8) smaller cores and low energy usage, for tightly packed servers and networking devices. I guess once they get more established they might get higher-power counterparts with more cores. And the Xeon Phi might get there, if Intel manages to do what they promise for future generations. > each core seems to grow to fit the available space, with only adding a few instructions, which only add marginal utility. Not the same as doubling the number of cores, which would double theoretical performance. The progress between generations isn't big enough to allow doubling the core count in the same envelope with the same per-core performance. So they only make the cores a bit better & slowly add a few cores (mostly to the high end). high-end phones actually have quite a few cores in the meantime, but there they are staggered for different usage scenarios: a few slow, efficient cores combined with faster and more energy-hungry ones for high-performance tasks. But for most x86 systems that would "waste" to much of the chip I guess. > but should CPU designs be hobbled simply because the software industry is not where it should be? Designing CPUs for "the perfect software" is nice, but not what sells to the vast majority of the market. As listed above, there are quite a few niche lines that go in that direction, even if you just look at only Intels offerings.
  - TheOtherHobbes 11y ago
    There's no demand for better performance given current architectures and applications. It's not hard to imagine more interesting architectures and applications - for example associative language processing, supercomputer-powered robotics, games and UIs that have true cinematic 3D photorealism, or gestural 3D interfaces with very large retina displays. The problem is really the pace of OS and UI design. We're still using the Xerox Parc GUI model forty years after it was invented, the POSIX OS model some fifty years after it was invented, and the sequential Von Neumann architecture sixty years after it was invented. These were all breakthroughs at the time, but they should never have become the last word. Research of equivalent creativity seems to have stalled now. IMO it's not just because the low-hanging fruit has been picked, but because there are commercial, academic, and political pressures holding it back. There may be a game changer generation ten or twenty years from now. But it looks like the pace will be slow until then.
- dragonwriter 11y ago
  > Why aren't we seeing 8, 16, 32 and 64 cores? Intel has 8-core i7s, up to 18-core Xeon processors, and up to 61 cores in Xeon Phi coprocessor packages. > If you reduce the feature size and effectively thus double the surface area available, why not increase the cores? Because, outside of narrow domains, software that can effectively use lots of cores doesn't exist, so you don't provide good bang for the customers buck by doing that. For most customers, there's no utility for that. > Cache can improve performance but not like more cores. And vice versa -- more cores can improve performance, but not like cache. Which is more useful depends on software and workloads. > Under Erlang/Elixir, we are able to get close to linear speedup from additional cores. On the right kind of workloads. And, the people with those kind of workloads, have many-core processors available.
  - cft 11y ago
    Any web server that serves at scale can readily use 1024 cores... Nginx, servers built in Go, Erlang and many more. It would reduce hosting costs and complexity substantially.
    - deleted 11y ago
      [deleted]
    - dragonwriter 11y ago
      Lets say, for the sake of argument, that's true; what percentage of computers are "web servers that serve at scale". What's the cost of setting up production lines for 1024-core chips for just that market -- and how many chips are you going to be able to amortize that cost over. Even if it was possible, I think the costs would be exhorbitant, even if the marginal cost per chip wasn't.
    - JoachimSchipper 11y ago
      It's not as easy as you seem to think to e.g. (de-)multiplex a single TCP port to/from 1024 cores, and that's before you actually try to keep any application state in sync. Lots of stuff breaks at that level of concurrency.
- adwn 11y ago
  > Under Erlang/Elixir, we are able to get close to linear speedup from additional cores. The two main obstacles with parallelization are 1) dividing a problem into a large number of sufficiently parallel tasks, and 2) communication costs. Erlang isn't a magical bullet that solves these problems. An inherently sequential algorithm doesn't become parallel only because you can cheaply spawn thousands of green threads, and inter-core communication doesn't become faster just by having a convenient message passing mechanism. Regarding the downvotes: My guess is that you're not being downvoted because of your dissenting opinion, but because you're presenting a misinformed opinion as fact.
narrator 11y ago
If Moores law ends with 14nm, I wonder what we'll be doing 10 years from now.
- fdej 11y ago
  I guess we'll be removing cruft from the web.
  - astrodust 11y ago
    Porting to HTML6.
    - roghummal 11y ago
      HTML5 was an improvement. HTML6?
- minthd 11y ago
  Maybe(in 10-20 years) We'll build analog imitations of the brain , with similar density and high power efficiency. Or maybe we'll build other types of compute machines using analog electronics. Maybe we'll replace digital multiplies with pseudo digital multipliers that use analog computation the background, and with other forms of non-exact computation. Or We'll use photonics to analogically compute FFT's to multiply matrixes. Or maybe we'll finally seriously and successfully invest in optical digital computing. Or we'll crack quantum computing.
  - pjc50 11y ago
    Analog and "non-exact" computation is not something that sounds very useful. The only reason we've been able to minimise so much is the tremendous noise rejection of binary systems. Besides, modern computers are spending most of their time on actions of marginal or negative utility, mostly data-bureaucratic rather than computational.
    - minthd 11y ago
jolan 11y ago
I hope Intel uses this pause to implement things like DJB's suggestions for the Intel instruction set: http://blog.cr.yp.to/20140517-insns.html http://blog.cr.yp.to/20140517-insns.html
- notatoad 11y ago
  When a company delays a product launch, it's usually because they have too much work to do, not not enough.
  - fukhnmods 11y ago
    Or the production runs are even more shite and buggy that the usual crap they produce and no amount of downclocking and microcode updates can hide it (yet)?
  - RandomBK 11y ago
    No, it means that some departments have too much work. Other teams and task forces can use this time to experiment with new stuff.
  - awalton 11y ago
    Intel didn't delay a product launch, they delayed a PROCESS launch, which is a much bigger deal given their previous cadence towards the bottom. Physics is kicking the silicon industry's ass. Meanwhile, the guys doing HDL and verification at Intel don't even notice the process delay, they just go about what they're doing, leaving them plenty of time to implement whatever (namely GPU improvements, which is what most of the industry has been requiring for newer Windows/Mac OS Xes).
- pbsd 11y ago
  They already have. The upcoming AVX-512 extensions [1] introduce the VPMADD52LUQ and VPMADD52HUQ instructions, which add the high or low 52 bits of a 52x52-bit multiplication to a 64-bit integer. Presumably this is done via the preexisting double precision floating-point multipliers. [1] https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf https://software.intel.com/sites/default/files/managed/0d/53...
higherpurpose 11y ago
> When first formulated by Intel co-founder Gordon Moore 50 years ago, this suggested that chip power could double every 12 months. What? I don't think it was ever 12 months, but 18-24 months. > Now, improvements are expected approximately every 24 months. No, they said it will take 2.5 years now instead of two. http://seekingalpha.com/article/3329035-intels-intc-ceo-brian-krzanich-on-q2-2015-results-earnings-call-transcript http://seekingalpha.com/article/3329035-intels-intc-ceo-bria... I wouldn't expect the 10nm chips at least until mid-2017, which should put Intel neck in neck with TSMC and Samsung's 10nm processes, which at most might be launched a few months later. It also looks like IBM and its partners (Samsung/Global Foundries) will actually beat Intel to 7nm (probably early/mid 2019 for Samsung/GF - late 2019/early 2020 for Intel). While IBM is talking about EUV lithography, Intel still seems to be complaining about multi-pattern lithography, so it seems pretty clear that Intel is behind IBM for 7nm. They also haven't said anything yet about what materials they'll use for 7nm transistors, just that they will require something different than Silicon. The best part about this is that now Intel can't hide the x86 baggage in mobile behind its one generation ahead process node, which made Atom more or less competitive (at least in performance and power consumption, but not in price). With ARM chips on very similar process nodes and arriving at the same time on the market, there should be no contest for the ARM chips in mobile.
- robin_reala 11y ago
  Also it’s not ‘chip power’ but ‘number of transistors’. Common misunderstanding.
  - deleted 11y ago
    [deleted]
  - jfoutz 11y ago
    Yeah, even without the step to 10nm, the third generation 14nm chips will probably be a bit faster than the second generation. Density can't be improved but there is surely efficiency to be realized.
- qdog 11y ago
  Not clear what IBM doing 7nm means, really. They no longer own a foundry, and don't have any chips in normal products that compete with Intel. IBM also demonstrated some really high clock speeds previously, but the Power8 is still a 4GHz part and is built on 22nm. Now, if Global Foundry actually starts making full 14nm chips this year (which it doesn't sound like it, seems to be a 20nm back end), that might things pretty interesting. I previously worked for a company that used both TSMC and UMC, the jump to the next process level is always extremely hard, and the biggest deal is yield. Until the yields are high enough to actually get to a profit a lot of companies with specialized chips will stick to the older process (set-top box chips for instance) where it's good enough. FD: I'm at Intel (not hardware), cannot comment on Intel itself.
saosebastiao 11y ago
But will it have non-disabled HTM? EDIT: Its a real question. Working HTM would negate pretty much any bad news from Intel in my mind.
aburan28 11y ago
I just read about how they were delaying the AVX512 until 'Knights Landing' (Xeon Phi) and with Haswells mediocre improvements Intel has really not come up with anything substantial in years. Hopefully the recent Altera acquisition will help them innovate
- chinhodado 11y ago
  > with Haswells mediocre improvements Intel has really not come up with anything substantial in years Not really. This statement is true regarding desktop CPUs, but we all know for at least five years now Intel's focus is not desktop CPU performance anymore, but mobile. Hence most of the improvements we see are for mobile, like better embedded graphic (Sandy/Ivy Bridge forward) and improved power consumption (Haswell).
  - wtallis 11y ago
    Intel really shouldn't get credit for the Sandy Bridge IGP, because that's just where they caught up to the NVidia IGPs that they'd banned. The first generation of Core series mobile chips represented a major step backwards from the user's perspective because Intel would no longer let NVidia make chipsets, so Intel's IGPs no longer had to compete against the GeForce 9400M and 320M. Ivy Bridge was the first time Intel actually moved the market forwards in terms of mobile IGP performance.
- vardump 11y ago
  > with Haswells mediocre improvements Intel has really not come up with anything substantial in years Unlocking Haswell's performance (up to 2x integer/FPU) requires using AVX2 instructions. Which means at least recompiling and to truly extract the performance, optimizing to AVX2 intrinsics or assembler.
oldmanjay 11y ago
Did the BBC forget a comma in the title? I'm having a hard time parsing it. Edit: or perhaps a dash? Really it's just a horrible title all around.
- mikeash 11y ago
  I don't think so. They are delaying changes to their chip making process.
- Cyph0n 11y ago
  Yes, a dash; “chip-making changes” makes much more sense. Horrible title indeed.
aburan28 11y ago
Moore's law plateaued years ago. Sure they are adding more cores but thats because they have made no progress on the clock speed in nearly a decade. FPGA's are going to be the next go to for performance until cpu clock speeds improve
- mikeash 11y ago
  Moore's Law is about transistor count, not clock speed. They used to go together, now they don't, but Moore's Law is still doing OK. This is an indication that it may be coming to an end, finally.
  - bargl 11y ago
    Richard from DotNetRocks does an Awesome show on this. https://www.dotnetrocks.com/default.aspx?showNum=1130 https://www.dotnetrocks.com/default.aspx?showNum=1130
- singlow 11y ago
  I thought Moore's law had more to do with density than clock speed. I thought that increased density helped to increase clock speed but that was not really Moore's Law. Recent increases in density have not helped clock speed as much due to other constraints on clock speed, but the density has still been increasing, hasn't it?
  - astrodust 11y ago
    Smaller transistors can flip state more quickly with less energy, so usually a die-shrink allows higher frequencies. There's a limit to how much you can crank these things before power consumption becomes ridiculous and heat dissipation is impossible. You can make a 10GHz CPU if you're prepared to require a massive liquid helium cooling system and have a power consumption of 15KW.
- JohnBooty 11y ago
  Sure they are adding more cores but thats because they have made no progress on the clock speed in nearly a decade. Per-core IPC (instructions executed per clock cycle) have soared since then. That's why a modern 4-core Core i7 is roughly 20-30x faster than a "Netburst" Pentium 4 from 10 years ago. Looked at another way, each individual core of a modern i7 is about 5x-7x faster than those old Pentium 4 CPUs. http://ark.intel.com/products/27495/Intel-Pentium-4-Processor-supporting-HT-Technology-2_80-GHz-512K-Cache-800-MHz-FSB http://ark.intel.com/products/27495/Intel-Pentium-4-Processo... FPGA's are going to be the next go to for performance until cpu clock speeds improve Maybe. What would also be cool is decreasing the latency of main memory. That is the current single biggest bottleneck in processors today. A cache miss usually means that the CPU sits around doing nothing for hundreds of cycles while it's waiting for data to be fetched from main memory.
dragonwriter 11y ago
> When first formulated by Intel co-founder Gordon Moore 50 years ago, this suggested that chip power could double every 12 months. Actually, when first formulated by Moore, it was that transistor density doubled every 12 months (he later revised it to 2 years.) Per Wikipedia, it was David House who applied it to performance (and, when he did, it was with an 18 month timeframe.)
- tedsanders 11y ago
  >Actually, when first formulated by Moore, it was that transistor density doubled every 12 months No, it was the number of integrated components on a chips, not transistor density. Anyway, I think the article's statement is fine. Doubling the number of components would suggest that performance doubles too.
  - brianwawok 11y ago
    Does a car with 12 cylinders drive twice as fast as one with 6? Or accelerate? Performance is too complicated to just say "CPU X doubles perf".. because likely some perf cases stayed the same, some got better, but some got worse (think deep pipelines).
walterbell 11y ago
Bunnie Huang on Moore's Law, http://www.wired.co.uk/magazine/archive/2015/08/features/moores-law/viewall http://www.wired.co.uk/magazine/archive/2015/08/features/moo... “.. WIRED buys the iPhone 6 schematic book (above) for 25 RMB (£2.70) .. It's like getting a master class on circuit design .. for £2.70, engineers in China can get a leg up on the best and brightest university-educated kids by studying these designs .. .. there are established, legitimate businesses that earn their keep creating schematics from circuit boards. As the pace of Moore's law diminishes, learning through reverse engineering will become increasingly effective, as me-too products will have a larger market window to amortise reverse-engineering efforts before the next new thing comes along. .. Even a modest deceleration of Moore's law can have a dramatic effect: a five per cent reduction in the pace of gate-length shrinkage -- from 16 percent to 11 per cent per year -- increases the available time to develop products within a technology generation by 50 per cent, from two years up to three. .. Instead of running in fear of obsolescence, open-source hardware developers now have time to build communities around platforms; we can learn from each other, share blueprints and iterate prototypes before committing to a final design.”
- benjaminl 11y ago
  .. Even a modest deceleration of Moore's law can have a dramatic effect: a five per cent reduction in the pace of gate-length shrinkage -- from 16 percent to 11 per cent per year -- increases the available time to develop products within a technology generation by 50 per cent, from two years up to three. Great observation except a reduction of 16% to 11% a year is closer to a 30% reduction in pace. Although this only makes the point stronger. If we are indeed on a 3 year cadence instead of 2. This is a significant change in the rate of More's law.
- ghoul2 11y ago
  Does that also not imply that the this "freedom" to clone would start coming under increasing pressure from IP owners? Till now, chip companies were too busy upgrading and innovating their products - as long as that was profitable (cause clones were always a few steps behind), they weren't too intent on IP action. But with the clones catching up, maybe we will see increasing RIAA-style actions? No more easy imports of clones from aliexpress, etc?
harshreality 11y ago
Chris Mack has been vocal on this. And not only was he probably right about Moore's Law (defined as scaling that decreases the cost per transistor) being dead last year[1] (the cost per transistor curve has been flattening out), but now Intel can't even keep pace with process shrinks at any price the market will bear. That doesn't mean progress will stop, however[2], but rather that progress (and a revised definition of Moore's Law) will be defined by chip redesigns and particularly specialized functionality that doesn't take many gates to implement but makes chips more valuable. [1] https://www.youtube.com/watch?v=IBrEx-FINEI#t=1m13s https://www.youtube.com/watch?v=IBrEx-FINEI#t=1m13s [2] http://spectrum.ieee.org/semiconductors/processors/the-multiple-lives-of-moores-law http://spectrum.ieee.org/semiconductors/processors/the-multi...
Animats 11y ago
Putting huge numbers of ordinary CPUs on a chip only helps until the memory bus runs out of bandwidth. For GPU-type devices, the computation/memory request ratio is higher, so GPUs can have many more compute units. GPUs are now used for lots of other parallel computations, and there's room for expansion in pure-computation GPU-like devices that don't drive a display. Historically, unusual massively parallel architectures have been commercial failures. "Build it and they will come" doesn't work there. There's a long history of weird supercomputer designs, starting with the ILLIAC IV and continuing through the Ncube. The only mass-market product in that space was the PS3's Cell, which was too hard to program and didn't have enough memory per CPU. (The Cell had only 256KB (not MB) per Cell CPU.) The next big thing may be parts optimized for machine learning. That's massively parallel. We may, at last, see "AI chips".
- nickpsecurity 11y ago
  I mainly agree with that sentiment. What do you think about the TOMI tech, though? http://www.venraytechnology.com/Making%20a%20Frosted%20Cake%20and%20Processor%20in%20Memory.htm http://www.venraytechnology.com/Making%20a%20Frosted%20Cake%... I think it was a brilliant reframing of the problem: move CPU's to memory with its cost-benefit analysis rather than vice versa (status quo). The design also achieves what some exascale proposals are trying to achieve with R&D in terms of better integrating CPU & memory with lower energy. It's also massively parallel (128 cores) and optimized for big data. Close to your next big thing. It's main risk right now is that DRAM vendors are more conservative and mass market than most fabs. There's not all this MOSIS, multi-project runs, and so on. Their low-volume cost is currently high (tens of thousands). They might be facing a chicken-and-egg problem in terms of hitting enough volume to get a nice, production deal. I do like their tech and think it has far more potential than what they're doing right now.
  - ak217 11y ago
    Except you still need a fast bus for the CPUs to talk to each other and to access shared memory. So for all but the most embarrassingly parallel workloads, you just move the bottleneck from the memory bus to the shared cache bus, do you not?
nickpsecurity 11y ago
It doesn't really bother me as we've seen it coming for years. Anyone playing smart is not relying on a process node jump rather than better architected systems. I think the fact that they bought Altera and might do on-board FPGA logic more than balances out here. I'll take an FPGA-accelerator on their on-chip NOC over an incremental increase in performance/energy any day. Even big companies such as Microsoft are wisening up to the fact that a proper split between CPU and FPGA logic has significant advantages. I'm curious to see what AMD will do in response to both the delays and Altera acquisition. Wait, a quick Google shows AMD to be so bad off that a FPGA company (Xilinx) might buy them. Lol. Ok, well the market is about to get interesting again one way or the other.
- ep103 11y ago
  Isn't IBM announcing they've discovered how to build 7nm chips? Things are still progressing
  - nickpsecurity 11y ago
    They'll certainly progress. Far as IBM's announcement, they said they could do it in a lab but not mass manufacturing. Intel says they can't mass manufacture things yet. So, the two could be in a similar situation where they have lab-proven concepts but nothing further. Too little data for me to know at this point.
  - deleted 11y ago
    [deleted]
- AnimalMuppet 11y ago
  I don't even want to think about the antivirus implications of running FPGA code.
  - nickpsecurity 11y ago
    It could get interesting. Of course, for secure CPU developers, FPGA's have been the solution for stopping malware rather than the problem. Too bad we only have prototypes to work with so far. Remember, though, that there's always anti-fuse (write-once) FPGA's available for a design you don't plan to change.
whazor 11y ago
I think the current techniques are becoming too complicated and Intel is now fully going to focus on EUV. The new EUV machines are reaching 70% availability on average, according to the producer ASML[1]. [1] http://www.asml.com/asml/show.do?lang=JA&ctx=5869&rid=52080 http://www.asml.com/asml/show.do?lang=JA&ctx=5869&rid=52080
manis404 11y ago
IT'S HAPPENING
RockyMcNuts 11y ago
Kind of wondering what this means relative to competitors. Intel is at 14nm now since 2014 and Samsung recently got to 14nm in Galaxy S6? And Samsung and TSMC have similar roadmaps for 10nm? So conceivably others might be catching up to Intel in fab? Say it ain't so? (I'm asking because I don't follow these things closely but that was the picture I got.) If Intel doesn't maintain their big edge in fab I'm not sure they can charge the kind of premium they have been. 64-bit ARM is going to start looking mighty attractive for a lot of use cases.
- amaranth 11y ago
  Samsung's 14nm isn't as dense as Intel's because it's sort of a hybrid of a 20nm process and a 14nm one. TSMC's 16nm is apparently just their 20nm process but with FinFETs so will be the least dense of the three. I suspect their 10nm will also end up less dense than what Intel puts out but we'll have to wait and see on that. As far as timetables for production, recent rumors put TSMC's 10nm plans at 2017 as well, delayed from their original Q4 2016 goal. Haven't see anything about delays on Samsung's side so they might actually get there first.

145 points by willvarfar 11y ago

MCRed 11y ago

I saw another article that referred to this as a sign of the slowing of Moore's law. However, Moore's law has its variances so I'm not really worried about that. What I do wonder about is why we are not seeing more cores as we go down to smaller nodes. 2 and 4 cores are common now, but have been seemingly for a decade. Why aren't we seeing 8, 16, 32 and 64 cores? If you reduce the feature size and effectively thus double the surface area available, why not increase the cores? It seems the new area is going into integrated GPUs (never as good as discrete GPUs, but certainly cheaper) and cache. Cache can improve performance but not like more cores. While intel does a tick/tock design revision, each core seems to grow to fit the available space, with only adding a few instructions, which only add marginal utility. Not the same as doubling the number of cores, which would double theoretical performance. Under Erlang/Elixir, we are able to get close to linear speedup from additional cores. I understand other languages struggle with multi-threaded programming, but should CPU designs be hobbled simply because the software industry is not where it should be? Am I missing something?

sfilipov 11y ago
I think you found the answer already. Already there are server processors with a lot of cores (i.e. 20) - if you can utilise them all then buy one. However, for most client workloads, more cores does not translate to better performance because many of those cores will just idle. Single-threaded performance is still the king.
hmottestad 11y ago
18 cores seems to be the best that Intel does. Which is fairly decent. http://ark.intel.com/products/84683/Intel-Xeon-Processor-E7-8880-v3-45M-Cache-2_30-GHz http://ark.intel.com/products/84683/Intel-Xeon-Processor-E7-... In laptops, there has been a trend for thinner, lighter and long battery life. So the easiest is to lower power demand. If you increase the number of transistors (by adding more cores), power consumption wouldn't go down enough.
- robin_reala 11y ago
  Xeon Phi currently has 61 cores[1] (62 on-die, 1 deactivated for yield reasons), and the next generation coming soon pushes that to 72 cores. [1] http://www.intel.com/content/www/us/en/processors/xeon/xeon-phi-detail.html http://www.intel.com/content/www/us/en/processors/xeon/xeon-...
yareally 11y ago
We do have 8, 12 and 18 core CPUs made by Intel. They're just expensive and not made for the typical consumer. My PC at work has the 12 core Xeon. It's nice for compiling large projects, but at home I'm content with a 4 core i7. http://ark.intel.com/m/products/75283/Intel-Xeon-Processor-E5-2697-v2-30M-Cache-2_70-GHz#@product/specifications http://ark.intel.com/m/products/75283/Intel-Xeon-Processor-E... http://ark.intel.com/m/products/81061/Intel-Xeon-Processor-E5-2699-v3-45M-Cache-2_30-GHz http://ark.intel.com/m/products/81061/Intel-Xeon-Processor-E...
HappyTypist 11y ago
Smaller die areas have complications of its own -- heat has less space to travel. It's not as simple as "half the die area, double the cores" -- if you do that, you will end up overheating. But I think the main issue, as you mentioned, is multi-thread programming. Everyday users spend most of their time in a browser, running Javascript which is mostly synchronous. There are web workers, etc, but the vast majority of sites are still running single threaded JS.
- jsprogrammer 11y ago
  People may want to run multiple simultaneous threads though, which is what additional cores excel at.
  - pixl97 11y ago
    No, you may want to run multiple threads, most people want to use their computer. Most people are not limited by their CPU (or even memory these days), the limits are IOPs which an SSD can help with or the speed of their internet connection. Most computers can run 2 or 4 threads at the same time already. Just look at your average Windows computer, even when it's busy, it's probably because 1 core is in use and the program doesn't multithread in a decent manner because it is very hard to program that way.
    - jsprogrammer 11y ago
      >No, you may want to run multiple threads, most people want to use their computer. Whether most people know how their computer works or not, many want to be able to simultaneously: listen to music and/or watch a streaming video, browse multiple web pages, use text editors, specialized business applications, IDE's, and more. You are going to have a bad time trying to do all of that on a single core, much less a single thread.
      - MCRed 11y ago
        I have something useful to say to this but fuck it. I get nothing but down votes here, so why bother investing time in "Hacker" news? You shouldn't be downvoted like you are, this site is full of assholes apparently. Have an upvote.
jsprogrammer 11y ago
We do see 8 and 16 cores. Newegg currently lists 10 different 8-core desktop processors and 120 different 8-core server processors. There are also 10-, 12-, 14-, and 16-core processors available to purchase right now.
habitue 11y ago
Two things I can think of: for consumers, applications don't currently make the best use of multiple cores. There just isn't enough work to do on them. For gaming at least, DirectX 12 will remove a limitation that only one CPU core can control the GPU at a time. That may push demand for more cores upwards over time. Second is that cache coherence gets really ugly the more cores you have with a single shared memory. From what I understand, this is a limitation of assumptions in the x86 architecture. A completely new architecture might sidestep the problem, and indeed I've heard of 1024 core machines etc, which I doubt have just brute-forced cache coherence.
- socceroos 11y ago
  DX12 - catching up to Mantle and Vulcan but ahead in marketing.
marcosdumay 11y ago
You are missing that yes, CPU designs are hobbled by the software industry shortcomings. Also, you are overlooking that on the traditional architectures memory access becomes slower the more cores you add. Better integrated GPU and better power consumption on PCs will win on almost all scores until the integrated GPU becomes good enough, and power consumption gets near the theoretical minimum. Then we'll probably see alternative architectures (more alternative than a GPU).
- pjc50 11y ago
  Clearly we should boot the operating system straight onto the GPU. (Joking, but also a great project if you have an army of graduate students to keep busy)
  - monocasa 11y ago
    The PowerVR guys appear to be running a full RTOS w/ memory protection on their GPU FWIW.
detaro 11y ago
for desktop systems, small number of fast cores is still better than multiple slower ones, since a lot of the software that would profit most isn't very well optimized for making use of many cores. IMHO there is not that much demand for better performance in bread-and-butter CPUs anyways, things like embedded graphics, power saving etc matter more. The top desktop CPUs have 6 or 8 cores, and Intel Xeons go up to 18. And there are the Intel Xeon-D and Atom Cxxxx, which go in the direction of having (at the moment up to 8) smaller cores and low energy usage, for tightly packed servers and networking devices. I guess once they get more established they might get higher-power counterparts with more cores. And the Xeon Phi might get there, if Intel manages to do what they promise for future generations. > each core seems to grow to fit the available space, with only adding a few instructions, which only add marginal utility. Not the same as doubling the number of cores, which would double theoretical performance. The progress between generations isn't big enough to allow doubling the core count in the same envelope with the same per-core performance. So they only make the cores a bit better & slowly add a few cores (mostly to the high end). high-end phones actually have quite a few cores in the meantime, but there they are staggered for different usage scenarios: a few slow, efficient cores combined with faster and more energy-hungry ones for high-performance tasks. But for most x86 systems that would "waste" to much of the chip I guess. > but should CPU designs be hobbled simply because the software industry is not where it should be? Designing CPUs for "the perfect software" is nice, but not what sells to the vast majority of the market. As listed above, there are quite a few niche lines that go in that direction, even if you just look at only Intels offerings.
- TheOtherHobbes 11y ago
  There's no demand for better performance given current architectures and applications. It's not hard to imagine more interesting architectures and applications - for example associative language processing, supercomputer-powered robotics, games and UIs that have true cinematic 3D photorealism, or gestural 3D interfaces with very large retina displays. The problem is really the pace of OS and UI design. We're still using the Xerox Parc GUI model forty years after it was invented, the POSIX OS model some fifty years after it was invented, and the sequential Von Neumann architecture sixty years after it was invented. These were all breakthroughs at the time, but they should never have become the last word. Research of equivalent creativity seems to have stalled now. IMO it's not just because the low-hanging fruit has been picked, but because there are commercial, academic, and political pressures holding it back. There may be a game changer generation ten or twenty years from now. But it looks like the pace will be slow until then.
dragonwriter 11y ago
> Why aren't we seeing 8, 16, 32 and 64 cores? Intel has 8-core i7s, up to 18-core Xeon processors, and up to 61 cores in Xeon Phi coprocessor packages. > If you reduce the feature size and effectively thus double the surface area available, why not increase the cores? Because, outside of narrow domains, software that can effectively use lots of cores doesn't exist, so you don't provide good bang for the customers buck by doing that. For most customers, there's no utility for that. > Cache can improve performance but not like more cores. And vice versa -- more cores can improve performance, but not like cache. Which is more useful depends on software and workloads. > Under Erlang/Elixir, we are able to get close to linear speedup from additional cores. On the right kind of workloads. And, the people with those kind of workloads, have many-core processors available.
- cft 11y ago
  Any web server that serves at scale can readily use 1024 cores... Nginx, servers built in Go, Erlang and many more. It would reduce hosting costs and complexity substantially.
  - deleted 11y ago
    [deleted]
  - dragonwriter 11y ago
    Lets say, for the sake of argument, that's true; what percentage of computers are "web servers that serve at scale". What's the cost of setting up production lines for 1024-core chips for just that market -- and how many chips are you going to be able to amortize that cost over. Even if it was possible, I think the costs would be exhorbitant, even if the marginal cost per chip wasn't.
  - JoachimSchipper 11y ago
    It's not as easy as you seem to think to e.g. (de-)multiplex a single TCP port to/from 1024 cores, and that's before you actually try to keep any application state in sync. Lots of stuff breaks at that level of concurrency.
adwn 11y ago
> Under Erlang/Elixir, we are able to get close to linear speedup from additional cores. The two main obstacles with parallelization are 1) dividing a problem into a large number of sufficiently parallel tasks, and 2) communication costs. Erlang isn't a magical bullet that solves these problems. An inherently sequential algorithm doesn't become parallel only because you can cheaply spawn thousands of green threads, and inter-core communication doesn't become faster just by having a convenient message passing mechanism. Regarding the downvotes: My guess is that you're not being downvoted because of your dissenting opinion, but because you're presenting a misinformed opinion as fact.

narrator 11y ago

If Moores law ends with 14nm, I wonder what we'll be doing 10 years from now.

fdej 11y ago
I guess we'll be removing cruft from the web.
- astrodust 11y ago
  Porting to HTML6.
  - roghummal 11y ago
    HTML5 was an improvement. HTML6?
minthd 11y ago
Maybe(in 10-20 years) We'll build analog imitations of the brain , with similar density and high power efficiency. Or maybe we'll build other types of compute machines using analog electronics. Maybe we'll replace digital multiplies with pseudo digital multipliers that use analog computation the background, and with other forms of non-exact computation. Or We'll use photonics to analogically compute FFT's to multiply matrixes. Or maybe we'll finally seriously and successfully invest in optical digital computing. Or we'll crack quantum computing.
- pjc50 11y ago
  Analog and "non-exact" computation is not something that sounds very useful. The only reason we've been able to minimise so much is the tremendous noise rejection of binary systems. Besides, modern computers are spending most of their time on actions of marginal or negative utility, mostly data-bureaucratic rather than computational.
  - minthd 11y ago

jolan 11y ago

I hope Intel uses this pause to implement things like DJB's suggestions for the Intel instruction set: http://blog.cr.yp.to/20140517-insns.html http://blog.cr.yp.to/20140517-insns.html

notatoad 11y ago
When a company delays a product launch, it's usually because they have too much work to do, not not enough.
- fukhnmods 11y ago
  Or the production runs are even more shite and buggy that the usual crap they produce and no amount of downclocking and microcode updates can hide it (yet)?
- RandomBK 11y ago
  No, it means that some departments have too much work. Other teams and task forces can use this time to experiment with new stuff.
- awalton 11y ago
  Intel didn't delay a product launch, they delayed a PROCESS launch, which is a much bigger deal given their previous cadence towards the bottom. Physics is kicking the silicon industry's ass. Meanwhile, the guys doing HDL and verification at Intel don't even notice the process delay, they just go about what they're doing, leaving them plenty of time to implement whatever (namely GPU improvements, which is what most of the industry has been requiring for newer Windows/Mac OS Xes).
pbsd 11y ago
They already have. The upcoming AVX-512 extensions [1] introduce the VPMADD52LUQ and VPMADD52HUQ instructions, which add the high or low 52 bits of a 52x52-bit multiplication to a 64-bit integer. Presumably this is done via the preexisting double precision floating-point multipliers. [1] https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf https://software.intel.com/sites/default/files/managed/0d/53...

higherpurpose 11y ago

> When first formulated by Intel co-founder Gordon Moore 50 years ago, this suggested that chip power could double every 12 months. What? I don't think it was ever 12 months, but 18-24 months. > Now, improvements are expected approximately every 24 months. No, they said it will take 2.5 years now instead of two. http://seekingalpha.com/article/3329035-intels-intc-ceo-brian-krzanich-on-q2-2015-results-earnings-call-transcript http://seekingalpha.com/article/3329035-intels-intc-ceo-bria... I wouldn't expect the 10nm chips at least until mid-2017, which should put Intel neck in neck with TSMC and Samsung's 10nm processes, which at most might be launched a few months later. It also looks like IBM and its partners (Samsung/Global Foundries) will actually beat Intel to 7nm (probably early/mid 2019 for Samsung/GF - late 2019/early 2020 for Intel). While IBM is talking about EUV lithography, Intel still seems to be complaining about multi-pattern lithography, so it seems pretty clear that Intel is behind IBM for 7nm. They also haven't said anything yet about what materials they'll use for 7nm transistors, just that they will require something different than Silicon. The best part about this is that now Intel can't hide the x86 baggage in mobile behind its one generation ahead process node, which made Atom more or less competitive (at least in performance and power consumption, but not in price). With ARM chips on very similar process nodes and arriving at the same time on the market, there should be no contest for the ARM chips in mobile.

robin_reala 11y ago
Also it’s not ‘chip power’ but ‘number of transistors’. Common misunderstanding.
- deleted 11y ago
  [deleted]
- jfoutz 11y ago
  Yeah, even without the step to 10nm, the third generation 14nm chips will probably be a bit faster than the second generation. Density can't be improved but there is surely efficiency to be realized.
qdog 11y ago
Not clear what IBM doing 7nm means, really. They no longer own a foundry, and don't have any chips in normal products that compete with Intel. IBM also demonstrated some really high clock speeds previously, but the Power8 is still a 4GHz part and is built on 22nm. Now, if Global Foundry actually starts making full 14nm chips this year (which it doesn't sound like it, seems to be a 20nm back end), that might things pretty interesting. I previously worked for a company that used both TSMC and UMC, the jump to the next process level is always extremely hard, and the biggest deal is yield. Until the yields are high enough to actually get to a profit a lot of companies with specialized chips will stick to the older process (set-top box chips for instance) where it's good enough. FD: I'm at Intel (not hardware), cannot comment on Intel itself.

saosebastiao 11y ago

But will it have non-disabled HTM? EDIT: Its a real question. Working HTM would negate pretty much any bad news from Intel in my mind.

aburan28 11y ago

I just read about how they were delaying the AVX512 until 'Knights Landing' (Xeon Phi) and with Haswells mediocre improvements Intel has really not come up with anything substantial in years. Hopefully the recent Altera acquisition will help them innovate

chinhodado 11y ago
> with Haswells mediocre improvements Intel has really not come up with anything substantial in years Not really. This statement is true regarding desktop CPUs, but we all know for at least five years now Intel's focus is not desktop CPU performance anymore, but mobile. Hence most of the improvements we see are for mobile, like better embedded graphic (Sandy/Ivy Bridge forward) and improved power consumption (Haswell).
- wtallis 11y ago
  Intel really shouldn't get credit for the Sandy Bridge IGP, because that's just where they caught up to the NVidia IGPs that they'd banned. The first generation of Core series mobile chips represented a major step backwards from the user's perspective because Intel would no longer let NVidia make chipsets, so Intel's IGPs no longer had to compete against the GeForce 9400M and 320M. Ivy Bridge was the first time Intel actually moved the market forwards in terms of mobile IGP performance.
vardump 11y ago
> with Haswells mediocre improvements Intel has really not come up with anything substantial in years Unlocking Haswell's performance (up to 2x integer/FPU) requires using AVX2 instructions. Which means at least recompiling and to truly extract the performance, optimizing to AVX2 intrinsics or assembler.

oldmanjay 11y ago

Did the BBC forget a comma in the title? I'm having a hard time parsing it. Edit: or perhaps a dash? Really it's just a horrible title all around.

mikeash 11y ago
I don't think so. They are delaying changes to their chip making process.
Cyph0n 11y ago
Yes, a dash; “chip-making changes” makes much more sense. Horrible title indeed.

aburan28 11y ago

Moore's law plateaued years ago. Sure they are adding more cores but thats because they have made no progress on the clock speed in nearly a decade. FPGA's are going to be the next go to for performance until cpu clock speeds improve

mikeash 11y ago
Moore's Law is about transistor count, not clock speed. They used to go together, now they don't, but Moore's Law is still doing OK. This is an indication that it may be coming to an end, finally.
- bargl 11y ago
  Richard from DotNetRocks does an Awesome show on this. https://www.dotnetrocks.com/default.aspx?showNum=1130 https://www.dotnetrocks.com/default.aspx?showNum=1130
singlow 11y ago
I thought Moore's law had more to do with density than clock speed. I thought that increased density helped to increase clock speed but that was not really Moore's Law. Recent increases in density have not helped clock speed as much due to other constraints on clock speed, but the density has still been increasing, hasn't it?
- astrodust 11y ago
  Smaller transistors can flip state more quickly with less energy, so usually a die-shrink allows higher frequencies. There's a limit to how much you can crank these things before power consumption becomes ridiculous and heat dissipation is impossible. You can make a 10GHz CPU if you're prepared to require a massive liquid helium cooling system and have a power consumption of 15KW.
JohnBooty 11y ago
Sure they are adding more cores but thats because they have made no progress on the clock speed in nearly a decade. Per-core IPC (instructions executed per clock cycle) have soared since then. That's why a modern 4-core Core i7 is roughly 20-30x faster than a "Netburst" Pentium 4 from 10 years ago. Looked at another way, each individual core of a modern i7 is about 5x-7x faster than those old Pentium 4 CPUs. http://ark.intel.com/products/27495/Intel-Pentium-4-Processor-supporting-HT-Technology-2_80-GHz-512K-Cache-800-MHz-FSB http://ark.intel.com/products/27495/Intel-Pentium-4-Processo... FPGA's are going to be the next go to for performance until cpu clock speeds improve Maybe. What would also be cool is decreasing the latency of main memory. That is the current single biggest bottleneck in processors today. A cache miss usually means that the CPU sits around doing nothing for hundreds of cycles while it's waiting for data to be fetched from main memory.

dragonwriter 11y ago

> When first formulated by Intel co-founder Gordon Moore 50 years ago, this suggested that chip power could double every 12 months. Actually, when first formulated by Moore, it was that transistor density doubled every 12 months (he later revised it to 2 years.) Per Wikipedia, it was David House who applied it to performance (and, when he did, it was with an 18 month timeframe.)

tedsanders 11y ago
>Actually, when first formulated by Moore, it was that transistor density doubled every 12 months No, it was the number of integrated components on a chips, not transistor density. Anyway, I think the article's statement is fine. Doubling the number of components would suggest that performance doubles too.
- brianwawok 11y ago
  Does a car with 12 cylinders drive twice as fast as one with 6? Or accelerate? Performance is too complicated to just say "CPU X doubles perf".. because likely some perf cases stayed the same, some got better, but some got worse (think deep pipelines).

walterbell 11y ago

Bunnie Huang on Moore's Law, http://www.wired.co.uk/magazine/archive/2015/08/features/moores-law/viewall http://www.wired.co.uk/magazine/archive/2015/08/features/moo... “.. WIRED buys the iPhone 6 schematic book (above) for 25 RMB (£2.70) .. It's like getting a master class on circuit design .. for £2.70, engineers in China can get a leg up on the best and brightest university-educated kids by studying these designs .. .. there are established, legitimate businesses that earn their keep creating schematics from circuit boards. As the pace of Moore's law diminishes, learning through reverse engineering will become increasingly effective, as me-too products will have a larger market window to amortise reverse-engineering efforts before the next new thing comes along. .. Even a modest deceleration of Moore's law can have a dramatic effect: a five per cent reduction in the pace of gate-length shrinkage -- from 16 percent to 11 per cent per year -- increases the available time to develop products within a technology generation by 50 per cent, from two years up to three. .. Instead of running in fear of obsolescence, open-source hardware developers now have time to build communities around platforms; we can learn from each other, share blueprints and iterate prototypes before committing to a final design.”

benjaminl 11y ago
.. Even a modest deceleration of Moore's law can have a dramatic effect: a five per cent reduction in the pace of gate-length shrinkage -- from 16 percent to 11 per cent per year -- increases the available time to develop products within a technology generation by 50 per cent, from two years up to three. Great observation except a reduction of 16% to 11% a year is closer to a 30% reduction in pace. Although this only makes the point stronger. If we are indeed on a 3 year cadence instead of 2. This is a significant change in the rate of More's law.
ghoul2 11y ago
Does that also not imply that the this "freedom" to clone would start coming under increasing pressure from IP owners? Till now, chip companies were too busy upgrading and innovating their products - as long as that was profitable (cause clones were always a few steps behind), they weren't too intent on IP action. But with the clones catching up, maybe we will see increasing RIAA-style actions? No more easy imports of clones from aliexpress, etc?

harshreality 11y ago

Chris Mack has been vocal on this. And not only was he probably right about Moore's Law (defined as scaling that decreases the cost per transistor) being dead last year[1] (the cost per transistor curve has been flattening out), but now Intel can't even keep pace with process shrinks at any price the market will bear. That doesn't mean progress will stop, however[2], but rather that progress (and a revised definition of Moore's Law) will be defined by chip redesigns and particularly specialized functionality that doesn't take many gates to implement but makes chips more valuable. [1] https://www.youtube.com/watch?v=IBrEx-FINEI#t=1m13s https://www.youtube.com/watch?v=IBrEx-FINEI#t=1m13s [2] http://spectrum.ieee.org/semiconductors/processors/the-multiple-lives-of-moores-law http://spectrum.ieee.org/semiconductors/processors/the-multi...

Animats 11y ago

Putting huge numbers of ordinary CPUs on a chip only helps until the memory bus runs out of bandwidth. For GPU-type devices, the computation/memory request ratio is higher, so GPUs can have many more compute units. GPUs are now used for lots of other parallel computations, and there's room for expansion in pure-computation GPU-like devices that don't drive a display. Historically, unusual massively parallel architectures have been commercial failures. "Build it and they will come" doesn't work there. There's a long history of weird supercomputer designs, starting with the ILLIAC IV and continuing through the Ncube. The only mass-market product in that space was the PS3's Cell, which was too hard to program and didn't have enough memory per CPU. (The Cell had only 256KB (not MB) per Cell CPU.) The next big thing may be parts optimized for machine learning. That's massively parallel. We may, at last, see "AI chips".

nickpsecurity 11y ago
I mainly agree with that sentiment. What do you think about the TOMI tech, though? http://www.venraytechnology.com/Making%20a%20Frosted%20Cake%20and%20Processor%20in%20Memory.htm http://www.venraytechnology.com/Making%20a%20Frosted%20Cake%... I think it was a brilliant reframing of the problem: move CPU's to memory with its cost-benefit analysis rather than vice versa (status quo). The design also achieves what some exascale proposals are trying to achieve with R&D in terms of better integrating CPU & memory with lower energy. It's also massively parallel (128 cores) and optimized for big data. Close to your next big thing. It's main risk right now is that DRAM vendors are more conservative and mass market than most fabs. There's not all this MOSIS, multi-project runs, and so on. Their low-volume cost is currently high (tens of thousands). They might be facing a chicken-and-egg problem in terms of hitting enough volume to get a nice, production deal. I do like their tech and think it has far more potential than what they're doing right now.
- ak217 11y ago
  Except you still need a fast bus for the CPUs to talk to each other and to access shared memory. So for all but the most embarrassingly parallel workloads, you just move the bottleneck from the memory bus to the shared cache bus, do you not?

nickpsecurity 11y ago

It doesn't really bother me as we've seen it coming for years. Anyone playing smart is not relying on a process node jump rather than better architected systems. I think the fact that they bought Altera and might do on-board FPGA logic more than balances out here. I'll take an FPGA-accelerator on their on-chip NOC over an incremental increase in performance/energy any day. Even big companies such as Microsoft are wisening up to the fact that a proper split between CPU and FPGA logic has significant advantages. I'm curious to see what AMD will do in response to both the delays and Altera acquisition. Wait, a quick Google shows AMD to be so bad off that a FPGA company (Xilinx) might buy them. Lol. Ok, well the market is about to get interesting again one way or the other.

ep103 11y ago
Isn't IBM announcing they've discovered how to build 7nm chips? Things are still progressing
- nickpsecurity 11y ago
  They'll certainly progress. Far as IBM's announcement, they said they could do it in a lab but not mass manufacturing. Intel says they can't mass manufacture things yet. So, the two could be in a similar situation where they have lab-proven concepts but nothing further. Too little data for me to know at this point.
- deleted 11y ago
  [deleted]
AnimalMuppet 11y ago
I don't even want to think about the antivirus implications of running FPGA code.
- nickpsecurity 11y ago
  It could get interesting. Of course, for secure CPU developers, FPGA's have been the solution for stopping malware rather than the problem. Too bad we only have prototypes to work with so far. Remember, though, that there's always anti-fuse (write-once) FPGA's available for a design you don't plan to change.

whazor 11y ago

I think the current techniques are becoming too complicated and Intel is now fully going to focus on EUV. The new EUV machines are reaching 70% availability on average, according to the producer ASML[1]. [1] http://www.asml.com/asml/show.do?lang=JA&ctx=5869&rid=52080 http://www.asml.com/asml/show.do?lang=JA&ctx=5869&rid=52080

manis404 11y ago

IT'S HAPPENING

RockyMcNuts 11y ago

Kind of wondering what this means relative to competitors. Intel is at 14nm now since 2014 and Samsung recently got to 14nm in Galaxy S6? And Samsung and TSMC have similar roadmaps for 10nm? So conceivably others might be catching up to Intel in fab? Say it ain't so? (I'm asking because I don't follow these things closely but that was the picture I got.) If Intel doesn't maintain their big edge in fab I'm not sure they can charge the kind of premium they have been. 64-bit ARM is going to start looking mighty attractive for a lot of use cases.

amaranth 11y ago
Samsung's 14nm isn't as dense as Intel's because it's sort of a hybrid of a 20nm process and a 14nm one. TSMC's 16nm is apparently just their 20nm process but with FinFETs so will be the least dense of the three. I suspect their 10nm will also end up less dense than what Intel puts out but we'll have to wait and see on that. As far as timetables for production, recent rumors put TSMC's 10nm plans at 2017 as well, delayed from their original Q4 2016 goal. Haven't see anything about delays on Samsung's side so they might actually get there first.