7 ms·

Intel Broadwell Architecture Preview: A Glimpse into Core M

115 points by ismavis 12y ago

jfoutz 12y ago
14 nanometer process. I vaguely recall how impossible people said that would be to achieve back when the original pentium was an 800 nm process. very cool.
- listic 12y ago
  Still, it looks like 5 nanometers is the end of it. http://en.wikipedia.org/wiki/5_nanometer http://en.wikipedia.org/wiki/5_nanometer Not that it will necessarily be the absolute end of Moore's law, as hardware manufacturers are trying alternative approaches to keep ramping up power, e.g. Samsung already sells its 850 Pro series SSDs http://www.amazon.com/s/ref=nb_sb_ss_c_0_6?url=search-alias%3Dcomputers&field-keywords=850%20pro&sprefix=850+pr%2Caps%2C404 http://www.amazon.com/s/ref=nb_sb_ss_c_0_6?url=search-alias%... made with its VNAND memory http://www.samsung.com/global/business/semiconductor/html/product/flash-solution/vnand/overview.html http://www.samsung.com/global/business/semiconductor/html/pr... which fell back to 40 nm from 840 EVO's 19 nm, while going 3D, which seemed to improve both speed and reliability. Now they have a bit more runway in their Moore's law, but still not much in sight.
  - zanny 12y ago
    You can still transition away from silicon lithography in addition to alternative transistor layout designs. Graphene is the most cited alternative, but there may be untested others, that just require rarer materials.
  - Igglyboo 12y ago
    I hear this end to moores law all the time but couldn't we just make the CPUs physically larger? I know this probably wouldn't work for a mobile device but for desktops/servers theres a ton of room for larger dimension chips right?
    - wmf 12y ago
      That's being done for Xeons and discrete GPUs; 700 sq. mm. chips are now a thing. It increases performance but doesn't help price/performance or power efficiency.
    - valarauca1 12y ago
      The problem is if you make a CPU twice as large, with transistors have the same resistance, and power consumption as before you double the heat output and double the power input. So yes you can. But if you do this for more then 26 months we'll end up with 600 watt CPU's.
      - XorNot 12y ago
        Also your 1cm2 die becomes 2cm2, becomes 4cm2...you pretty quickly run out of space physically, and your interconnects get long enough that propagation delay becomes significant.
        frankchn 12y ago
        And to fix your propagation delays you introduce longer and longer pipelines... then you basically end up with Prescott.
    - ethbro 12y ago
      (Disclaimer: I'm not an EE) To be technical, Moore's law is about the number of transistors on an integrated circuit. So your point isn't too far off the 3D comments elsewhere. Simply making the die bigger doesn't get you much: larger dies (without additional redundancy) have lower yields (as you're more likely to have a defect given a constant defect/area rate) and fewer can be stamped out of a standard sized wafer. However, if you carry that idea to its logical conclusion... we may turn from shrinking the transistor to shrinking the packaging as the path of least resistance. 3D transistors, chip stacking (aka PoP), and through-silicon vias (aka vertical connectivity) all help get us more processing / area (while remaining within fundamental thermal, manufacturing, etc. physical limits). Again, this is a CS major with an architecture interest, so anyone please feel free to correct me if I'm off-base.
  - pinkyand 12y ago
    V-nand is probably not a solution to scaling flash , according to memory experts : http://thememoryguy.com/comparing-samsung-v-nand-to-micron-16nm-planar-nand/ http://thememoryguy.com/comparing-samsung-v-nand-to-micron-1...
  - jfoutz 12y ago
    Yeah, a transistor out of 4 atoms? wow. The only thing i'm sure of, when Moore's law ends we'll be spending a lot more time with Amdahl's law.
    - osmala 12y ago
      Actually we have been spending a lot time with Amdahl's law already. Software people assume it only applies to parallerizing software. In "computer organization & design" By Patterson and Hennessy it is stated in the general form. And example is used how much multiply unit should be sped up to get five fold improvement in execution time when 80% of time is spend in multiplication? Execution time after improved= (execution time affected by improvement / amount of improved)+Execution time unaffected.
bitL 12y ago
Please Intel, release it in 2014! Don't make it slip into 2015! I really really want a 10W NUC with Broadwell i7 as my main desktop machine!
- higherpurpose 12y ago
  It seems Intel's misleading marketing is already working, even on the HN crowd. The whole point of the "M" chip is to be low-power/low performance. If you want "Core i7", get a version that actually has a lot of power behind it, not a "10W i7". The 10w Core i7 won't be faster than a desktop Core i3 SNB. Heck I bet it won't be more than 50 percent faster than the latest ARM chip either.
  - bitL 12y ago
    I don't really care about super high performance - I need a small NUC that I can cool passively with reasonable performance for typical business stuff I do on the desktop. I understand the difference between mobile i5 vs i7 is almost none even on Haswell (both are dual-core with hyperthreading unlike desktop versions). I already have a 17W IvyBridge i7-3517U in one of my notebooks so I know what I am talking about. I also can't wait for 19W Kaveri for another tiny desktop setup... EDIT: i7 details
    - mitchty 12y ago
      I have a low power i3 I use in a nas freebsd box for the same reason. The things a bit overpowered even for its use as is. I even started setting up vm's on the box to give it more to do. I also love these low power cpus for desktops/home systems. When they use less power than a lightbulb, i'm all for it.
    - DuskStar 12y ago
      From Wikipedia, Intel also has quad-core + hyperthreading mobile CPUs, with model numbers 4700 and up. The top mobile i7 is about equivalent to a 4770S desktop chip, but with a bit lower TDP. So don't lump all the mobile parts in with the ultrabook-optimised chips.
justinph 12y ago
AKA: The chip that will finally let you buy a retina Macbook Air.
- petercooper 12y ago
  In practice, yes. In technicality, Apple probably could have done it already if they needed to.. Samsung has an ultrabook that's smaller than the 13" MacBook Air and rocks a 3200x1800 screen: http://www.samsung.com/us/computer/pcs/NP940X3G-K01US http://www.samsung.com/us/computer/pcs/NP940X3G-K01US .. I've been tempted to get one to Hackintosh, but I just know it'd be flaky as all get out.
- wmf 12y ago
  If the GPU is fast enough to drive a retina display.
  - ChuckMcM 12y ago
    Well the current gen Haswell can drive a 4K display, and the Anandtech article suggested this GPU was the same but 'better' (more efficient and feature parity with DirectX 11_2) so I would guess that it can drive a retina display (which is nominally a 2K display on a 13" laptop)
    - wmf 12y ago
      But being able to attach a 4K monitor doesn't necessarily mean it can scroll a window at 60 fps.
  - scott_karana 12y ago
    Why wouldn't it be? The Macbook Pro Retinas already use the onboard Intel GPUs on all but the highest-end models, and they'll only be more powerful with Broadwell I suspect.
  - zanny 12y ago
    Even the "hd graphics" or low end Kaveri GPUs from AMD can drive 4k. Hell, Adreno from Qualcomm can probably drive 4k. Desktops, compositing, and light effects like transparency are nothing next to video game or 3d model rendering. In practice, any GPU manufactured today is enough for non-3d purposes, unless you try running 3 4k monitors off the numberless hd graphics or something. If you aren't getting 60 fps scrolling, it is usually due to the cpus being low powered and the application not using GL accelerated drawing for the scrolling.
Zenst 12y ago
One thing I'm looking forward too more than the power saving advances are the arbitrary precision maths they are starting to finally add. Albeit just integer , add and multiply instructions for now, but a good start.
- zwegner 12y ago
  Cool, I hadn't heard of this. I couldn't find much info on a quick search, so here's Intel's reference: http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-large-integer-arithmetic-paper.pdf http://www.intel.com/content/dam/www/public/us/en/documents/... MULX was introduced on Haswell as part of the BMI instructions. Basically it allows two explicit destinations (still an implied rdx source though). ADCX/ADOX are pretty weird. They both operate basically the same as ADC, but only read/write the carry or overflow flag respectively. The idea is to allow two interleaved independent chains of adds, putting less pressure on the out-of-order logic on chip. This seems kinda weird though: the renaming logic would have to detect that the bit of the flags register that one chain of adds reads aren't written by the other chain, so those instructions wouldn't be hazards, and thus both chains can be executed in parallel. OTOH, IIRC there are other instructions that only write certain bits of the flags, so I guess the logic for this bit-level renaming of flags is already there.
nextos 12y ago
I love ultra low power CPUs that still are able to drive a modern minimal Linux system, based mostly on CLI applications. I thought my Intel NUC was already great, but this might take it to the next level with a completely fanless design, yet cooler and very capable.
hyperion2010 12y ago
Sounds like Intel went after a lot of one time optimization improvements for these low power chips, stuff that they aren't going to be able to be able to call on multiple times to improver performance. Maybe I'm wrong, but it seems like they are really pulling out the stops here.
dschiptsov 12y ago
New Apple's CPUs are ready. Macbooks will be ready for a holiday season. Nothing to see here.

115 points by ismavis 12y ago

14 nanometer process. I vaguely recall how impossible people said that would be to achieve back when the original pentium was an 800 nm process. very cool.

listic 12y ago
Still, it looks like 5 nanometers is the end of it. http://en.wikipedia.org/wiki/5_nanometer http://en.wikipedia.org/wiki/5_nanometer Not that it will necessarily be the absolute end of Moore's law, as hardware manufacturers are trying alternative approaches to keep ramping up power, e.g. Samsung already sells its 850 Pro series SSDs http://www.amazon.com/s/ref=nb_sb_ss_c_0_6?url=search-alias%3Dcomputers&field-keywords=850%20pro&sprefix=850+pr%2Caps%2C404 http://www.amazon.com/s/ref=nb_sb_ss_c_0_6?url=search-alias%... made with its VNAND memory http://www.samsung.com/global/business/semiconductor/html/product/flash-solution/vnand/overview.html http://www.samsung.com/global/business/semiconductor/html/pr... which fell back to 40 nm from 840 EVO's 19 nm, while going 3D, which seemed to improve both speed and reliability. Now they have a bit more runway in their Moore's law, but still not much in sight.
- zanny 12y ago
  You can still transition away from silicon lithography in addition to alternative transistor layout designs. Graphene is the most cited alternative, but there may be untested others, that just require rarer materials.
- Igglyboo 12y ago
  I hear this end to moores law all the time but couldn't we just make the CPUs physically larger? I know this probably wouldn't work for a mobile device but for desktops/servers theres a ton of room for larger dimension chips right?
  - wmf 12y ago
    That's being done for Xeons and discrete GPUs; 700 sq. mm. chips are now a thing. It increases performance but doesn't help price/performance or power efficiency.
  - valarauca1 12y ago
    The problem is if you make a CPU twice as large, with transistors have the same resistance, and power consumption as before you double the heat output and double the power input. So yes you can. But if you do this for more then 26 months we'll end up with 600 watt CPU's.
    - XorNot 12y ago
      Also your 1cm2 die becomes 2cm2, becomes 4cm2...you pretty quickly run out of space physically, and your interconnects get long enough that propagation delay becomes significant.
      - frankchn 12y ago
        And to fix your propagation delays you introduce longer and longer pipelines... then you basically end up with Prescott.
  - ethbro 12y ago
    (Disclaimer: I'm not an EE) To be technical, Moore's law is about the number of transistors on an integrated circuit. So your point isn't too far off the 3D comments elsewhere. Simply making the die bigger doesn't get you much: larger dies (without additional redundancy) have lower yields (as you're more likely to have a defect given a constant defect/area rate) and fewer can be stamped out of a standard sized wafer. However, if you carry that idea to its logical conclusion... we may turn from shrinking the transistor to shrinking the packaging as the path of least resistance. 3D transistors, chip stacking (aka PoP), and through-silicon vias (aka vertical connectivity) all help get us more processing / area (while remaining within fundamental thermal, manufacturing, etc. physical limits). Again, this is a CS major with an architecture interest, so anyone please feel free to correct me if I'm off-base.
- pinkyand 12y ago
  V-nand is probably not a solution to scaling flash , according to memory experts : http://thememoryguy.com/comparing-samsung-v-nand-to-micron-16nm-planar-nand/ http://thememoryguy.com/comparing-samsung-v-nand-to-micron-1...
- jfoutz 12y ago
  Yeah, a transistor out of 4 atoms? wow. The only thing i'm sure of, when Moore's law ends we'll be spending a lot more time with Amdahl's law.
  - osmala 12y ago
    Actually we have been spending a lot time with Amdahl's law already. Software people assume it only applies to parallerizing software. In "computer organization & design" By Patterson and Hennessy it is stated in the general form. And example is used how much multiply unit should be sped up to get five fold improvement in execution time when 80% of time is spend in multiplication? Execution time after improved= (execution time affected by improvement / amount of improved)+Execution time unaffected.

bitL 12y ago

Please Intel, release it in 2014! Don't make it slip into 2015! I really really want a 10W NUC with Broadwell i7 as my main desktop machine!

higherpurpose 12y ago
It seems Intel's misleading marketing is already working, even on the HN crowd. The whole point of the "M" chip is to be low-power/low performance. If you want "Core i7", get a version that actually has a lot of power behind it, not a "10W i7". The 10w Core i7 won't be faster than a desktop Core i3 SNB. Heck I bet it won't be more than 50 percent faster than the latest ARM chip either.
- bitL 12y ago
  I don't really care about super high performance - I need a small NUC that I can cool passively with reasonable performance for typical business stuff I do on the desktop. I understand the difference between mobile i5 vs i7 is almost none even on Haswell (both are dual-core with hyperthreading unlike desktop versions). I already have a 17W IvyBridge i7-3517U in one of my notebooks so I know what I am talking about. I also can't wait for 19W Kaveri for another tiny desktop setup... EDIT: i7 details
  - mitchty 12y ago
    I have a low power i3 I use in a nas freebsd box for the same reason. The things a bit overpowered even for its use as is. I even started setting up vm's on the box to give it more to do. I also love these low power cpus for desktops/home systems. When they use less power than a lightbulb, i'm all for it.
  - DuskStar 12y ago
    From Wikipedia, Intel also has quad-core + hyperthreading mobile CPUs, with model numbers 4700 and up. The top mobile i7 is about equivalent to a 4770S desktop chip, but with a bit lower TDP. So don't lump all the mobile parts in with the ultrabook-optimised chips.

justinph 12y ago

AKA: The chip that will finally let you buy a retina Macbook Air.

petercooper 12y ago
In practice, yes. In technicality, Apple probably could have done it already if they needed to.. Samsung has an ultrabook that's smaller than the 13" MacBook Air and rocks a 3200x1800 screen: http://www.samsung.com/us/computer/pcs/NP940X3G-K01US http://www.samsung.com/us/computer/pcs/NP940X3G-K01US .. I've been tempted to get one to Hackintosh, but I just know it'd be flaky as all get out.
wmf 12y ago
If the GPU is fast enough to drive a retina display.
- ChuckMcM 12y ago
  Well the current gen Haswell can drive a 4K display, and the Anandtech article suggested this GPU was the same but 'better' (more efficient and feature parity with DirectX 11_2) so I would guess that it can drive a retina display (which is nominally a 2K display on a 13" laptop)
  - wmf 12y ago
    But being able to attach a 4K monitor doesn't necessarily mean it can scroll a window at 60 fps.
- scott_karana 12y ago
  Why wouldn't it be? The Macbook Pro Retinas already use the onboard Intel GPUs on all but the highest-end models, and they'll only be more powerful with Broadwell I suspect.
- zanny 12y ago
  Even the "hd graphics" or low end Kaveri GPUs from AMD can drive 4k. Hell, Adreno from Qualcomm can probably drive 4k. Desktops, compositing, and light effects like transparency are nothing next to video game or 3d model rendering. In practice, any GPU manufactured today is enough for non-3d purposes, unless you try running 3 4k monitors off the numberless hd graphics or something. If you aren't getting 60 fps scrolling, it is usually due to the cpus being low powered and the application not using GL accelerated drawing for the scrolling.

Zenst 12y ago

One thing I'm looking forward too more than the power saving advances are the arbitrary precision maths they are starting to finally add. Albeit just integer , add and multiply instructions for now, but a good start.

zwegner 12y ago
Cool, I hadn't heard of this. I couldn't find much info on a quick search, so here's Intel's reference: http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/ia-large-integer-arithmetic-paper.pdf http://www.intel.com/content/dam/www/public/us/en/documents/... MULX was introduced on Haswell as part of the BMI instructions. Basically it allows two explicit destinations (still an implied rdx source though). ADCX/ADOX are pretty weird. They both operate basically the same as ADC, but only read/write the carry or overflow flag respectively. The idea is to allow two interleaved independent chains of adds, putting less pressure on the out-of-order logic on chip. This seems kinda weird though: the renaming logic would have to detect that the bit of the flags register that one chain of adds reads aren't written by the other chain, so those instructions wouldn't be hazards, and thus both chains can be executed in parallel. OTOH, IIRC there are other instructions that only write certain bits of the flags, so I guess the logic for this bit-level renaming of flags is already there.

nextos 12y ago

I love ultra low power CPUs that still are able to drive a modern minimal Linux system, based mostly on CLI applications. I thought my Intel NUC was already great, but this might take it to the next level with a completely fanless design, yet cooler and very capable.

hyperion2010 12y ago

Sounds like Intel went after a lot of one time optimization improvements for these low power chips, stuff that they aren't going to be able to be able to call on multiple times to improver performance. Maybe I'm wrong, but it seems like they are really pulling out the stops here.

dschiptsov 12y ago

New Apple's CPUs are ready. Macbooks will be ready for a holiday season. Nothing to see here.