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I think once you move from early fantasy CPUs to early CPUs in production such as 80286, the complexity immediately moves up drastically. IIRC it involves at le

I think once you move from early fantasy CPUs to early CPUs in production such as 80286, the complexity immediately moves up drastically. IIRC it involves at least memory segmentation, protected mode (MMU).

remexre 2y ago
the 80286 has its own problems/inessential complexity if you look at this from the riscv angle, moving from "u-mode only vm that doesn't use paging under the hood" to "u+s-mode vm with sv39" isn't an enormous jump in complexity imo i think i might teach it starting as like, "sv21" (page tables aren't nested), then pose real sv39 and the tree structure as the solution to making a sparse mapping over 512GiB then moving on to the idea of having a TLB is simple, especially if students have already been introduced to hashtables
- PaulHoule 2y ago
  Sometimes I dream of a 24-bit generation of computers (in terms of address space and the space of index math) of which https://en.wikipedia.org/wiki/Zilog_eZ80 https://en.wikipedia.org/wiki/Zilog_eZ80 may be the best realization. You can almost run a real operating system on that chip in the sense of a 24 bit supervisor that could run multiple 16 bit processes (if you could get CP/M to run you have one heck of a userspace) Unfortunately you can't trap the instruction that switches back to 24 bit mode. Would be nice too if a 24 bit supervisor could contain a 24 bit application, that requires some kind of memory management and I'd imagine something a little lighter weight than the usual paging system, say something that maps (0..N) in logical space to (i+0..i+N) in physical address space. I like the "access register" concept https://en.wikipedia.org/wiki/Access_register https://en.wikipedia.org/wiki/Access_register but would probably have a small number of memory banks such as 16 or 64. In a load-store architecture it doesn't seem like much of a burden to add a bank id to stores and loads. In return you get not just more RAM but also separation of code and data, video memory, file mmap(ing) and such. What bugs me is how to control the mapping of memory banks to physical memory, on one hand you want the supervisor in charge so it can be used for memory protection, on the other hand some programming techniques would want the speed of changing the memory banks from user space. The 80286 was a turkey because it didn't meet the minimal viable product level of being a target for a 24-bit OS that could virtualize DOS applications. It was already crazy fast and became affordable pretty quickly but it seemed tragic that it couldn't do that.
  - kazinator 2y ago
    Also PIC24 family of μcontrollers.
  - Narishma 2y ago
    > The 80286 was a turkey because it didn't meet the minimal viable product level of being a target for a 24-bit OS that could virtualize DOS applications. It was already crazy fast and became affordable pretty quickly but it seemed tragic that it couldn't do that. That's mainly because it was designed before the IBM PC was a success and backwards compatibility with DOS applications important.
  - monocasa 2y ago
    Even better than that was an Z280 which did have a proper user/supervisor mode and simple MMU. Really reminiscent of a PDP-11 in terms of supervisor state, just strapped to a z80 instruction set otherwise. Also added a nice SP relative load to the instruction set.
  - fentonc 2y ago
    I took a different approach by just making an FPGA-based multi-core Z80 setup. One core is dedicated to running 'supervisor' CP/NET server, and all of the applications run on CP/NET clients and can run normal CP/M software. I built a 16-core version of this, and each CPU gets its own dedicated 'terminal' window, with all of the windowing handled by the display hardware (and ultimately controlled by the supervisor CPU). It's a fun 'what-if' architecture that works way better than one might expect in practice. It would have made an amazing mid-to-late 1980s machine.
sunday_serif 2y ago
True enough, but having designed a “fantasy cpu” gives you a better frame of reference for understanding the more complex features of a cpu (privilege levels, memory segmentation, virtual addresses, cache hierarchy, etc.) I often feel like those who haven’t done the exercise of understanding the ISA of a “fantasy cpu” have a really hard time understanding those more advanced features. I guess all I am saying is that learning the “fantasy cpu” still has value even if everything else in the real world is more complex. Walking before running and all that.
- PaulHoule 2y ago
  I've been doing some planning for a 24-bit fantasy CPU, my plan is to make it pretty baroque. For instance it has some instructions to do things like unpack UTF-8 strings into chars, do alpha compositing, etc. The CPU part looks like a strange mainframe that didn't quite get built into the 1970s and it is coupled to a video system that would make a Neo-Geo blush.
  - notjoemama 2y ago
    “Neo Geo[a] is a brand of video game hardware developed by SNK. It was launched with the Neo Geo, an arcade system (called MVS) with a home console counterpart (AES). Games on the Neo Geo (MVS and AES) were well received and it spawned several long-running and critically acclaimed series, mostly 2D fighters. Later, SNK released the Neo Geo CD, a more cost-effective console with games released on compact discs, which was met with limited success. A new arcade system, Hyper Neo Geo 64, was released in 1997, but it did not fare well. SNK also released a handheld console under the brand, the Neo Geo Pocket, which was quickly succeeded by the Neo Geo Pocket Color, which have been given praise despite its short lifetime. SNK encountered various legal and financial issues resulting in a sale of the company in 2001. Despite that, the original Neo Geo arcade and console continued receiving new games under new ownership until 2004. The Neo Geo brand was revived in 2012 with the release of the Neo Geo X[1] handheld. Since then, a number of other Neo Geo products have been released based on the original Neo Geo.” — Wikipedia Seems to be from about 30 years ago in the 1990s.
sitkack 2y ago
80286 is the PHP of CPUs. A wonderfully different early CPU with plenty of existing software is the https://en.wikipedia.org/wiki/RCA_1802 https://en.wikipedia.org/wiki/RCA_1802 which was a target of the https://en.wikipedia.org/wiki/CHIP-8 https://en.wikipedia.org/wiki/CHIP-8 interpreter.
flohofwoe 2y ago
Or you could pick the 68000 which is easier to emulate than a 286 because it was 'properly designed' (and not a stopgap solution like the x86 line until the 386 arrived).
_yb2s 2y ago
There are plenty of real CPUs that are useful in the real world but are much simpler than a 286.... 8 bit RISC microcontrollers like Atmel AVRs for example. I've done a small amount of programming for those in assembly, and they are not a whole lot more complex than the 'toy' design I used for the class.
teleforce 2y ago
The mostly redundant memory segmentation features that modern OS do not care or use anymore. If OS fully utilizes memory segmentation it can be the most secure OS and makes borrow checker languages like Rust becomes unnecessary since not unlike Rust it can mitigates data races and race conditions (better at the latter). This can considerably reduce developers' cognitive load or overload [1]. It also can contribute towards more secure computing and containers can be made as secure as VMs. Someone can probably propose a new memory segmentation extension to the Linux kernel in the similar manner of real-time Linux. But again it can takes 20 years to be accepted into the mainline Linux kernel [2]. [1] Cognitive load is what matters: https://news.ycombinator.com/item?id=42489645 https://news.ycombinator.com/item?id=42489645 [2] 20 years later, real-time Linux makes it to the kernel: https://news.ycombinator.com/item?id=41584907 https://news.ycombinator.com/item?id=41584907

remexre 2y ago

the 80286 has its own problems/inessential complexity if you look at this from the riscv angle, moving from "u-mode only vm that doesn't use paging under the hood" to "u+s-mode vm with sv39" isn't an enormous jump in complexity imo i think i might teach it starting as like, "sv21" (page tables aren't nested), then pose real sv39 and the tree structure as the solution to making a sparse mapping over 512GiB then moving on to the idea of having a TLB is simple, especially if students have already been introduced to hashtables

PaulHoule 2y ago
Sometimes I dream of a 24-bit generation of computers (in terms of address space and the space of index math) of which https://en.wikipedia.org/wiki/Zilog_eZ80 https://en.wikipedia.org/wiki/Zilog_eZ80 may be the best realization. You can almost run a real operating system on that chip in the sense of a 24 bit supervisor that could run multiple 16 bit processes (if you could get CP/M to run you have one heck of a userspace) Unfortunately you can't trap the instruction that switches back to 24 bit mode. Would be nice too if a 24 bit supervisor could contain a 24 bit application, that requires some kind of memory management and I'd imagine something a little lighter weight than the usual paging system, say something that maps (0..N) in logical space to (i+0..i+N) in physical address space. I like the "access register" concept https://en.wikipedia.org/wiki/Access_register https://en.wikipedia.org/wiki/Access_register but would probably have a small number of memory banks such as 16 or 64. In a load-store architecture it doesn't seem like much of a burden to add a bank id to stores and loads. In return you get not just more RAM but also separation of code and data, video memory, file mmap(ing) and such. What bugs me is how to control the mapping of memory banks to physical memory, on one hand you want the supervisor in charge so it can be used for memory protection, on the other hand some programming techniques would want the speed of changing the memory banks from user space. The 80286 was a turkey because it didn't meet the minimal viable product level of being a target for a 24-bit OS that could virtualize DOS applications. It was already crazy fast and became affordable pretty quickly but it seemed tragic that it couldn't do that.
- kazinator 2y ago
  Also PIC24 family of μcontrollers.
- Narishma 2y ago
  > The 80286 was a turkey because it didn't meet the minimal viable product level of being a target for a 24-bit OS that could virtualize DOS applications. It was already crazy fast and became affordable pretty quickly but it seemed tragic that it couldn't do that. That's mainly because it was designed before the IBM PC was a success and backwards compatibility with DOS applications important.
- monocasa 2y ago
  Even better than that was an Z280 which did have a proper user/supervisor mode and simple MMU. Really reminiscent of a PDP-11 in terms of supervisor state, just strapped to a z80 instruction set otherwise. Also added a nice SP relative load to the instruction set.
- fentonc 2y ago
  I took a different approach by just making an FPGA-based multi-core Z80 setup. One core is dedicated to running 'supervisor' CP/NET server, and all of the applications run on CP/NET clients and can run normal CP/M software. I built a 16-core version of this, and each CPU gets its own dedicated 'terminal' window, with all of the windowing handled by the display hardware (and ultimately controlled by the supervisor CPU). It's a fun 'what-if' architecture that works way better than one might expect in practice. It would have made an amazing mid-to-late 1980s machine.

sunday_serif 2y ago

True enough, but having designed a “fantasy cpu” gives you a better frame of reference for understanding the more complex features of a cpu (privilege levels, memory segmentation, virtual addresses, cache hierarchy, etc.) I often feel like those who haven’t done the exercise of understanding the ISA of a “fantasy cpu” have a really hard time understanding those more advanced features. I guess all I am saying is that learning the “fantasy cpu” still has value even if everything else in the real world is more complex. Walking before running and all that.

PaulHoule 2y ago
I've been doing some planning for a 24-bit fantasy CPU, my plan is to make it pretty baroque. For instance it has some instructions to do things like unpack UTF-8 strings into chars, do alpha compositing, etc. The CPU part looks like a strange mainframe that didn't quite get built into the 1970s and it is coupled to a video system that would make a Neo-Geo blush.
- notjoemama 2y ago
  “Neo Geo[a] is a brand of video game hardware developed by SNK. It was launched with the Neo Geo, an arcade system (called MVS) with a home console counterpart (AES). Games on the Neo Geo (MVS and AES) were well received and it spawned several long-running and critically acclaimed series, mostly 2D fighters. Later, SNK released the Neo Geo CD, a more cost-effective console with games released on compact discs, which was met with limited success. A new arcade system, Hyper Neo Geo 64, was released in 1997, but it did not fare well. SNK also released a handheld console under the brand, the Neo Geo Pocket, which was quickly succeeded by the Neo Geo Pocket Color, which have been given praise despite its short lifetime. SNK encountered various legal and financial issues resulting in a sale of the company in 2001. Despite that, the original Neo Geo arcade and console continued receiving new games under new ownership until 2004. The Neo Geo brand was revived in 2012 with the release of the Neo Geo X[1] handheld. Since then, a number of other Neo Geo products have been released based on the original Neo Geo.” — Wikipedia Seems to be from about 30 years ago in the 1990s.

sitkack 2y ago

80286 is the PHP of CPUs. A wonderfully different early CPU with plenty of existing software is the https://en.wikipedia.org/wiki/RCA_1802 https://en.wikipedia.org/wiki/RCA_1802 which was a target of the https://en.wikipedia.org/wiki/CHIP-8 https://en.wikipedia.org/wiki/CHIP-8 interpreter.

flohofwoe 2y ago

Or you could pick the 68000 which is easier to emulate than a 286 because it was 'properly designed' (and not a stopgap solution like the x86 line until the 386 arrived).

_yb2s 2y ago

There are plenty of real CPUs that are useful in the real world but are much simpler than a 286.... 8 bit RISC microcontrollers like Atmel AVRs for example. I've done a small amount of programming for those in assembly, and they are not a whole lot more complex than the 'toy' design I used for the class.

teleforce 2y ago

The mostly redundant memory segmentation features that modern OS do not care or use anymore. If OS fully utilizes memory segmentation it can be the most secure OS and makes borrow checker languages like Rust becomes unnecessary since not unlike Rust it can mitigates data races and race conditions (better at the latter). This can considerably reduce developers' cognitive load or overload [1]. It also can contribute towards more secure computing and containers can be made as secure as VMs. Someone can probably propose a new memory segmentation extension to the Linux kernel in the similar manner of real-time Linux. But again it can takes 20 years to be accepted into the mainline Linux kernel [2]. [1] Cognitive load is what matters: https://news.ycombinator.com/item?id=42489645 https://news.ycombinator.com/item?id=42489645 [2] 20 years later, real-time Linux makes it to the kernel: https://news.ycombinator.com/item?id=41584907 https://news.ycombinator.com/item?id=41584907