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Intel Announces Xeon Phi Co-Processors
- nivertech 14y agoXeon works "synergistically" with Xeon Phi ;)
- deleted 14y ago[deleted]
- DHowett 14y agoThis may be a previous discussion of Intel, but it is certainly not a discussion of the Xeon Phi coprocessor.
- reitzensteinm 14y agoActually, this is something different. Your link is an Intel chip in research that's being designed to mimic a human brain, built with memristors. This one is about the commercial launch of Knight's Corner, an add on card by Intel which essentially stuffs 50 Pentium cores with enhanced vector instructions onto one chip. This is the fruit of the troubled Larabee project, which aimed to build a GPU using x86, but even with Intel's extreme process node advantage, it could not get fast or power efficient enough to even come close to modern GPUs (it was several generations behind, and so was never released commercially). Pretty cool couple of days for Intel, news wise.
- mtgx 14y agoExtreme process node advantage? They are just one generation ahead at most (2 years). It's not nearly enough to overcome the architecture's inefficiency when it comes to doing GPU stuff, nor is it big enough to overcome the architecture inefficiency for power consumption vs ARM chips for that matter.
- Tuna-Fish 14y agoBy published data, Intel 45nm, with products out in 2007, switches as fast as TSMC 28nm, with products out January this year. They only have ~2 years of advantage on density, but they reliably have 5+ years advantage on speed. I'd call that extreme. I absolutely believe that once Intel actually releases atom cpus on their best process (so far, they have mostly used them to fill out production on old processes), it will beat ARM on performance/watt. When they move atom to a competitive uarch (OoO ffs), the race will stop being a race.
- reitzensteinm 14y agoThat's indeed what I was referring to. Intel's processes are typically superior to AMD/GloFo's at the same node, and miles beyond the respective bulk processes at TSMC. They also get there first.
- raverbashing 14y agoEspecially trying to be efficient with the bag of hurt that's x86 Now, x86 instructions are very efficient in some ways, but for raw performance, you're wasting about 30% of your silicon dealing with them
- brigade 14y agoIs it really 30% of your silicon even discounting caches? I'd love to see some analysis (and comparison against arm) of this from an expert; I've heard everything varying from "x86 instruction decoding is majority of the power drain" to "ISA doesn't matter, it's everything behind the frontend that matters" and it's hard to find actual analysis. I guess partly because this is all highly confidential. And I know even ARM has instructions that make chip designers want to get all stabbity (ldm, stm)
- TheBoff 14y agoLittle low on technical detail. "Works synergistically with Intel(R) Xeon(R) Processor", honestly! Interesting though: will it be developed into a graphics board, returning to Larabee? What will NVidia and AMD (ATI) do in response?
- ihowlatthemoon 14y agoLooks like Intel is trying to attack the CUDA/Stream market. I'm curious to see how NVidia and ATI will respond.
- koide 14y agos/ATI/AMD/
- mtgx 14y agoNvidia has Project Denver in the making, based on ARMv8, the 64 bit architecture - custom CPU and Maxwell GPU.
- samlittlewood 14y agoNote: the instruction set and open source software stack are available: http://software.intel.com/en-us/blogs/2012/06/05/knights-corner-open-source-software-stack/ http://software.intel.com/en-us/blogs/2012/06/05/knights-cor... http://software.intel.com/en-us/forums/showthread.php?t=105443 http://software.intel.com/en-us/forums/showthread.php?t=1054...
- ilaksh 14y agoSo this means that each core is running its own version of Red Hat or some other Linux? Does that mean that I can install my own software on those ah, tiny machines? Someone may probably get mad or think I am stupid for asking this, but can I install node.js on each core?
- raverbashing 14y agoIt's probably going to be a small RTOS in each core Or like it's done in PS3, where you have one core scheduling the others "but can I install node.js on each core?" maybe, but that's really not the idea
- ilaksh 14y agook whats the idea then, how am I supposed to program the tiny machines/cores?
- PopaL 14y agoHave a look at OpenCL, I think you will use OpenCL or a similar framework to code for this device.
- samlittlewood 14y agoHave a look at http://ispc.github.com/ http://ispc.github.com/ - Intel SPMD Program Compiler "An open-source compiler for high-performance SIMD programming on the CPU"
- rbanffy 14y ago
- augustl 14y agoSeems like the tl;dr is: 50+ x86 cores with RAM and CPU soldered to PCIe boards. In other words, a mix of CPU and GPU. A standard architecture, as opposed to GPU private architectures, many cores, and faster memory pipelines. Now, where did I put that functional programming book..
- nemo1618 14y agoOkay, I'm a little confused. What exactly is a Co-Prossessor? It looks like a graphics card. Will it replace the graphics cards or work alongside it? Does it only handle highly parallel tasks, with the processor handling serials tasks?
- Symmetry 14y agohttp://en.wikipedia.org/wiki/Coprocessor http://en.wikipedia.org/wiki/Coprocessor Yes, the idea is that you will offload highly parallel tasks to it while the main CPU handles serial tasks.
- pjscott 14y agoWhile we're adding relevant Wikipedia links, http://en.wikipedia.org/wiki/Heterogeneous_computing http://en.wikipedia.org/wiki/Heterogeneous_computing
- seanp2k2 14y agoThe 80s called. They'd like their co-processors back!
- rbanffy 14y agoI'm quite sure my Apple II didn't have 50+ cores.
- hyperbovine 14y agoThat would be a funky looking apple...
- pjscott 14y agoYou know that GPUs are coprocessors, right? This is analogous. The cores on here are small, power-efficient, and have a lot of SIMD.
- rbanffy 14y agoNow, I'd love to see one with hardware-assisted transactional memory like the newest POWER machines. A standard HTM implementation for x64 ISA machines would be a huge leap forward.
- spitfire 14y agoThe future "Haswell" chips are going to have support for transactional memory. No news on these guys though. Give it time. In a few years these things will be getting up to speed in features/RAS and such.
- ken 14y agoHmm, the Mac Pro has Xeon processors and PCIe slots. People were complaining just recently about the lack of Mac Pro updates. I assume some of Apple's professional video tools, at least, are CPU-bound. They'd probably love to have an "add 50 more processors" option for Mac Pros.
- wmf 14y agoThe Phi cores are really slow unless you use the SIMD unit; the typical way to do that would be OpenCL, but you can run OpenCL code faster on your GPU.
- padobson 14y agoIf Xeon Phi is going to run linux out of the box, then that's Intel basically declaring that they want this card to be supported by the opensource community from day one, correct? Correct me if I'm wrong, but it seems to me that the Xeon Phi is only going to be useful to open source developers early on, and then as libraries are built that make use of the Xeon Phi, application developers will be able to build on top of those libraries. So we're probably a long way off (and likely a few different shifts in co-processor technology) before a card like this is useful to the typical, end user.
- wmf 14y agoRealistically Intel is going to provide the libraries like the OpenCL runtime.
- kruhft 14y agoAny word on what the cost of this card will be?