7 ms·
Even a laptop can run RAM externally thanks to CXL
- markhahn 3y agolittle-known?
- henvic 3y agoThe universe isn't Hacker News :P
- Dylan16807 3y agoBut if you ask the people that would actually consider external RAM, I think you'd see a lot of awareness.
- hu3 3y agoHow could one consider if they don't know it was possible? Even more so on a laptop.
- lagniappe 3y ago> 1TB of RAM What are you going to do with the other 999,999,360KB?
- grepfru_it 3y ago999,999,360KB ought to be enough for anybody
- jasonjmcghee 3y agoIf there's a reference I'm missing, enlighten me... Anything to do with data processing, machine learning, llms- hundreds of gigabytes of ram can be incredibly nice. Especially as pandas recommends ram equal to 5-10x the size of the dataset. When you're an individual- not having to think about managing a cluster... Edit: One of the lucky 10000- famous bill gates joke- got it. I walk away cultured
- RussianCow 3y agoIt's the classic Bill Gates quote taken out of context where he says that 640kb ought to be enough for anyone.
- PolCPP 3y agoYou're missing Gates 640KB of ram reference
- Iwan-Zotow 3y agoI think Bill Gates once said 640Kb should be enough for anything
- bagels 3y agoIt's a joke based on the fake quote "640k (ram) should be enough for anyone"
- hadlock 3y agoThis wasn't mentioned in the article but CXL Stands for Compute Express Link which is an open standard, CPU-to-Device Interconnect, I guess they're on v3.0 now. First I had heard of it as well. 3.9GB/s on the low end and as high as 121.0GB/s with the latest 16x 3.0 spec over serial connection https://www.computeexpresslink.org/about-cxl https://www.computeexpresslink.org/about-cxl https://en.wikipedia.org/wiki/Compute_Express_Link https://en.wikipedia.org/wiki/Compute_Express_Link
- gostsamo 3y agoI'm surprised that it is not known on HN. This is standard developed to enable different server configurations in the data center from what I've read through the years. The universal interconnect allows for adding and removing devices without special allowances for each device type as far as I get it. It might work for laptops, but it is not the main goal and it might be only Framework who will do something in that direction.
- cmrdporcupine 3y agoThese days that bulk of us people doing dev work aren't getting to play in the actual DC, it's all so abstracted away. Frankly looking to get a used rack or two at home here, just so I can play with the HW a bit. (I do embedded and not server stuff mostly these days anyways, but generally interested in systems stuff, so)
- MattPalmer1086 3y agoI was talking with a colleague about this just the other day. We all used to have home labs, because we could get reasonably near to what business used and learn that way. Now, what goes on in is so different, frankly you won't learn much with one. Obviously if you're just interested then go for it. It's just not practical generally speaking.
- cmrdporcupine 3y agoFor myself, I've got 3gbps fiber to the house, and a need to host something. Pondering buying a used server instead of dishing money out to AWS or GCP. Question is if the power bills make sense.
- xhrpost 3y agoThe slowest clock speed for DDR5 is 2,000Mhz or 0.5ns per cycle. At 2/3c, electricity should be able to travel about 10cm max in one cycle. I suppose 4Ghz RAM would be only 5cm. Is having an external unit with much greater than 10cm of copper travel ultimately a limiting factor here with modern day RAM speeds?
- ooterness 3y agoYou're conflating latency vs. bandwidth. It is entirely possible to have many bits in transit on a single channel, wired or wireless.
- dragontamer 3y agoNote that modern RAM protocols assume that multiple bits are in the transmission line that is the wires connecting your CPU to RAM. Electrical Engineers since at least DDR2, probably earlier, need to ensure that all lines are delay matched to about 100picoseconds. That is, in DDR2, if DataBit#1 takes 1.1nanoseconds from start-of-wire to end-of-wire, then all other bits must be somewhere between 1.0ns to 1.2ns in length. This requires impedance controlled pcbs from the manufacturer, and length tracking software for PCB design. (Note: advanced PCB CAD software will even recalculate the speed of light across different lengths, as "inner" tracks have more dielectric surrounding them, slowing down electricity's speed, while "outer" tracks are a bit faster) ------- The dielectric of FR4 (the glass/resin used to make PCBs) is what determines the speed of light of the copper actually. And it can be 3.6 or 4.2 or whatever, but the PCB manufacturer will tell you in the PCB specsheets. Copper guides the wave, but the actual wave travels in the dielectric / insulation between the wires (FR4 in modern PCBs, but if you had open-air wire the dielectric would be the open-air surrounding the wires that form the ground-loop return path). There's been a huge amount of improvements to the understanding of electricity in the past 3 decades, and the old circuit models (sometimes still taught today) are kind of obsolete btw. ------- I think I heard that DDR4 is now 10picosecomds (10x more accuracy in delay matching), which is doable with modern CAD and PCB software. I dunno the delay requirements of DDR5. ------------------ https://en.wikipedia.org/wiki/Transmission_line https://en.wikipedia.org/wiki/Transmission_line Anyway, look through this Wikipedia on Transmission Line theory, which is a closer model to how electricity "actually" works (but still isn't perfect). But its the level you need to think of electricity to understand modern CPU-to-RAM connections. In particular, DDR2 / DDR3 / DDR4 / DDR5 connections are almost certainly either Microstrip or Stripline connections, with a fair amount of PCB / Electrical Engineering going into the design to make sure everything works as expected.
- tmaly 3y agoHow much do one of these cost and is the memory persistent?
- mjh2539 3y agoIt's volatile memory.
- arandomhuman 3y agoHow's the latency with these vs on board memory?
- jauntywundrkind 3y ago170-250ns was what they were saying a year ago, which they were saying was 2x native latency. https://www.servethehome.com/compute-express-link-cxl-latency-how-much-is-added-at-hc34/ https://www.servethehome.com/compute-express-link-cxl-latenc... But with Genoa for example, socket to socket latency has climbed up to 220ns, and going across nodes on a socket is 110ns. I feel like CXL will be less than 2x a hit, if only because cores themselves are having higher and higher latencies. https://chipsandcheese.com/2023/07/17/genoa-x-server-v-cache-round-2/ https://chipsandcheese.com/2023/07/17/genoa-x-server-v-cache...
- noobface 3y agoCXL is a neat tech, but many innovative hardware systems go no where despite hundreds of millions of dollars of work and investment. I have hopes. I can't help it. Cool shit is inspiring. I, however, am not holding my breath.
- LoganDark 3y agoTo my eyes, it looks like this article consists almost solely of "external RAM exists". OK? What laptops even support it? How much capacity is there ("over 1TB" is kind of vague)? So many questions...
- unsated 3y agoCXL can drastically change ratio of memory to CPU and potentially even drive down demand for latest memory gens (mixing different gens of memory via CXL). Could be an interesting shift to think in terms of designing and building large scale data storage and retrieval systems at low latency.
- e63f67dd-065b 3y agoCXL is useful for many more things beyond just memory expansion (which is a "type 3 device"). The purpose of CXL is to allow for memory coherency between different CXL devices. To quote the spec on type 2 devices: > CXL Type 2 devices, in addition to fully coherent cache, also have memory, for example DDR, High-Bandwidth Memory (HBM), etc., attached to the device. These devices execute against memory, but their performance comes from having massive bandwidth between the accelerator and device-attached memory. The main goal for CXL is to provide a means for the Host to push operands into device-attached memory and for the Host to pull results out of device-attached memory such that it does not add software and hardware cost that offsets the benefit of the accelerator. There's some cool things you can do with CXL, like resurrecting the whole persistent memory idea with low-latency flash, making hardware offload devices more capable since you now get free cache coherency, and a whole bunch of other stuff. But yes, it's really not for consumer use-cases. The applications I've seen colleagues work on are mostly enterprise stuff like cool RDMA integrations, cache-coherent flash, and more I can't talk about here.
- jnwatson 3y agoCXL for CPU access to DRAM is overkill. Plenty of server mobos allow you to directly attach 2 TiB of DRAM.
- lazide 3y agoSome 4 and supposedly 6TB now too.
- justinlloyd 3y agoLast one I put physical hands on was running 24TB, and was expandable to 32TB.
- vinay_ys 3y agoRack level disaggregated compute-memory-storage-accelerator architectures allow for dynamic partitioning/aggregation of hardware to suite concurrent workloads and their evolution over time and make it easier to achieve both cost efficiency as well as incremental, continuous and non-disruptive hardware upgrades.
- khaki54 3y agoWhy buy this when you can just download more ram for free?
- thelastgallon 3y agoREST IN PIECES: SERVERS AND CXL https://www.nextplatform.com/2023/06/15/rest-in-pieces-servers-and-cxl/ https://www.nextplatform.com/2023/06/15/rest-in-pieces-serve... If CXL is not being used by servers, will it ever become an offering for laptops?
- momojo 3y agoWho's using this? What company doesn't already have a rack they can add a few more sticks of RAM in for their workloads?
- l1k 3y agoIf you need a lot of RAM, usually you need to buy servers with multiple CPUs to which you can attach the memory. Because the amount of DRAM you can attach to one CPU is limited. If you don't have the need for all the extra CPUs, just being able to attach more memory to a single CPU through CXL may be cheaper.
- deleted 3y ago[deleted]
- dmw_ng 3y agoIt's been a long day, managed to take a few seconds wondering what this interesting new "best CPUs" technical architecture was before realizing the article is SEO'd blogspam. Maybe switch to the source article? https://www.servethehome.com/fadu-cxl-2-0-switch-and-pcie-gen5-nvme-ssds-at-fms-2023/ https://www.servethehome.com/fadu-cxl-2-0-switch-and-pcie-ge...
- 6th 3y agoThank you, that's way better.
- dvh 3y agoI've recently read some PC chipset datasheet and it was almost 1000 pages of obscure tech: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/6-chipset-c200-chipset-datasheet.pdf https://www.intel.com/content/dam/www/public/us/en/documents...
- tambourine_man 3y agoApple's dream come true. Sell one model with everything soldered and unupgradable. One universal computing core. Want extra? Plug it in. From an operations point of view (Cook's forte), it makes a lot of sense. Jony Ive would be proud as well.
- bloopernova 3y agoHonestly I think I'd love this. Being able to augment an existing MacBook pro with a bunch of RAM or a good GPU would be very useful to me.
- mbreese 3y agoExternal GPUs working over thunderbolt is a thing. So, you can at least get part of this today.
- bloopernova 3y agoUnfortunately not with the M series of apple CPUs :(
- willcipriano 3y agoI really like my e gpu set up I got 6 - 7 years ago. I'd love to see a laptop dock that granted you a gpu, additional hard drive and ram when you need it.
- dvas 3y agoIf anyone wishes to dive deeper and attempt some emulation* of CXL and to find out more, checkout both links as QEMU supports emulating CXL devices. [0] Emulating CXL Shared Memory Devices in QEMU https://memverge.com/cxl-qemuemulating-cxl-shared-memory-devices-in-qemu/ https://memverge.com/cxl-qemuemulating-cxl-shared-memory-dev... [1] CXL support in QEMU https://www.qemu.org/docs/master/system/devices/cxl.html https://www.qemu.org/docs/master/system/devices/cxl.html
- userbinator 3y agoIsn't this already possible with things like Thunderbolt, which is essentially "external PCIe"?
- bzzzt 3y agoYes, if you don't mind the latency and throughput restrictions of Thunderbolt. Eg. Apple's M1 has a memory throughput of 66GB/s, which is an order of magnitude more compared to Thunderbolt 40Gbit/s. So it's more like a really fast SSD instead of a local memory upgrade.
- wmf 3y agoThis is fake news. Laptops don't support CXL.
- rldjbpin 3y agoDell has been pushing a new memory standard for laptops (https://news.ycombinator.com/item?id=33048948 https://news.ycombinator.com/item?id=33048948) and even there you face the realities of latency tradeoffs when physically moving the memory away from the CPU. i would like to see whether the high memory use cases (like running LLMs) can benefit more from direct memory access to GPU that efforts such as DirectStorage is working on (https://news.ycombinator.com/item?id=33265666 https://news.ycombinator.com/item?id=33265666) and just faster, low-latency drives can bridge this gap faster.