7 ms·

I don't expect to see competitive RISC-V servers any time soon

65 points by goranmoomin 3y ago

MobiusHorizons 3y ago
The most likely way risc-v makes it into the datacenter imo is through AI accelerator chips like tenstorrent. Initially this will not replace traditional compute but merely be deployed alongside it. If the cores prove to be fast for general purpose compute, someone will use them for that, since they are already available. From there I can imagine dedicated servers (although still likely aimed at niche workloads for some time)
ksec 3y ago
It is unfortunate people takes Jim Keller's word for granted. Much like many people believed in Raja Koduri. Not only going by literal sense about completely take over Server in 10 years. As in every server in use. I am willing to bet in 10 years time half of the shipping CPU used in server wouldn't even be RISC-V. A feat that even ARM is still far off from claiming it. It is sad that most if not all CEO ( even if they are supposed to be engineers ) likes to paint some overly optimistic pictures just because they have vested interest.
deleted 3y ago
[deleted]
danielEM 3y ago
Killer price / performance / energy efficiency ratio would do the job way sooner than anyone expects
user6723 3y ago
Some risc-v chips can execute in order and avoid having spectre-like problems. I work at a IaaS where customers deploy through our hosted cicd and we are very interested in risc-v solving our multi-tenancy concerns. GCC and clang already have enough support for risc-v that we have no concerns for support being there. If GCC and clang have what's necessary, everything else is fine. The moment we see close to a juncture where we can put an order in for risc-v with very many cores, our investors are going to dump a massive round of funding. Whether risc-v is popular or not doesn't matter. Our multi-tenant services won't have fundamental security isolation problems, everyone serving on x86_64 and ARM will. Looks like risc-v will dominate where things actually matter, unless some new iteration of OpenPOWER comes out.
- gjsman-1000 3y ago
  > don't have spectre-like problems You could just disable out-of-order execution but there’s a major performance hit. Some simpler ARM designs don’t have speculative execution.
- jeffbee 3y ago
  > Risc-v chips execute in order Odd then that the one of the first RISC-V hardware implementations called itself "Berkeley Out-of-Order Machine".
  - brucehoult 3y ago
    What the person said was "SOME risc-v chips can execute in order". In fact the vast vast majority of RISC-V chips shipped to date are in-order, including the JH7110 SoC in this year's VisionFive 2, Star64 and PineTab-V, and Milk-V Mars. The only shipping OoO RISC-V chips are the TH1520 and SG2042 with C910 cores, as used in the Sipeed LicheePi4A and Milk-V Pioneer boards. BOOM was (and is) an experimental university project, not a product. But as Jim Keller said in a recent interview "with RISC-V a couple of university students created an OoO core that was better than the first Intel i7s which hundreds of engineers worked on".
    - jeffbee 3y ago
      That's a revision. The comment originally made the blanket statement that RISC-V executes in order.
      - brucehoult 3y ago
        Ok, I didn't see that. It's true for 99.99999% of currently-deployed RISC-V cores but, since the TH1520 and SG2042 boards started shipping in May, not 100% any more.
- tails4e 3y ago
  I don't think in order is related to the ISA. There may be a guarantee of the order of operations when it comes to the view of memory the programmer sees, but that does not prevent the hardware from executing out of order, as long as the end result is the same. X86 has strict memory ordering also, but both intel and AMD use out of order at the hardware level
justinclift 3y ago
Given that moving to RISC-V will make people's life harder, these servers and their CPUs need to be unambiguously better than the x86 (and ARM) server systems available at the same time. While this would generally be true, it misses an extremely important current factor. China really wants to find a way to circumvent US soft power limiting their future growth. The current tech embargo's by the US and friends are only going to make China try harder, and RISC-V seems perfectly positioned to become that circumvention measure. Note the plethora of Chinese RISC-V boards and chips coming out... which is exactly what they need to do (iterate as fast as possible).
- pjmlp 3y ago
  They can do the same copying ARM and x86 designs.
  - justinclift 3y ago
    Sure. They're likely doing that too meanwhile. :)
  - ffgjgf1 3y ago
    They won’t be able to export them to other countries then
    - deleted 3y ago
      [deleted]
- DuckFeathers 3y ago
  [dead]
derbOac 3y ago
10 years is a long time in tech. It's hard to say what will happen in that kind of timeframe. I suspect RISC-V won't have taken over datacenters by then, but I could see it being an emerging, stably growing phenomenon. Without sounding too critical, I feel like this is sort of a discussion about strawmen. Keller set up the strawman so this is responding to that, but I think the title or something is misleading and so it doesn't do much to address the fact it's still a strawman. "No competitive RISC-V servers" is not the same as "everything will be competitive RISC-V servers."
sylware 3y ago
Nothing new here. We all perfectly know that without extremely performant RISC-V implementations (open source or close source), that on the latest silicon node process, its success will be somewhat limited, even if it means modern ISA standard for all and that worldwide royalty free.
sgbeal 3y ago
The author seems to believe that speed is the only competitive factor. The fact is that many services don't need but a fraction of the speed they have available to them and that power consumption is, in some areas, the more important competitive distinction. RISC-V will beat out Intel on power consumption out of the gate, even if they never compete in terms of raw speed.
- TazeTSchnitzel 3y ago
  Low power consumption isn't worth much if the performance sucks. Performance-per-watt is important. Surely AArch64 is going to win over RISC-V there for the foreseeable future?
  - sgbeal 3y ago
    > Low power consumption isn't worth much if the performance sucks. Not every service needs high performance. A web site serving static content, for example, or a low-traffic forum. i co-admin multiple public forums, e.g. sqlite.org/forum, which run on single-CPU nodes and get along just fine with that.
shrubble 3y ago
The issue is that servers that go in a datacenter have multiple constraints, not just one. Computational speed, RAM capacity, networking, amount of power used, all play a part. For instance, say a RISCV 1024-core multi-chiplet CPU with ability to have 4TB on the motherboard; even if it used 400W for the CPU, it might make sense because of how many VMs you could pack per-system. For datacenter it sometimes may make sense to talk about how "wide" rather than how "deep" you can go, especially for cloud or VM tasks. Each core being slightly slower might not matter, in that you have a lot of concurrent tasks that may well be disk or network IO-bound part of the time...
- hajile 3y ago
  Intel pairing up with SiFive shows the obvious path forward here where the new ISA is paired with existing tech from a large company. If Intel decided to ship a core that could execute either x86 or RISC-V instructions, we could see massive adoption in no time at all.
kriro 3y ago
I'm pretty bullish on RISC-V, if anyone has suggestions on how to bet some money on this instinct (invest) I'd be interested to hear about it. Openness, tooling support being decent enough already and general capabilities are all good (and power comsumption could be a differentiator). Actual chips being produced. I'm curious why it's so "underrated" or sometimes even reduced to politics (China). Even with no trade war nonsense it makes quite a bit of sense for countries to move to open architectures (imo). At least I'd be a bit more comfortable betting on it as opposed to ARM where licensing terms may or may not change. Curious to see when the first mass produced RISC-V cell phones will hit the shelves (android support is announced already).
- brucethemoose2 3y ago
  > I'm curious why it's so "underrated" or sometimes even reduced to politics (China) Because Tenstorrent is licensing 8-wide RISC-V cores and... No one is taking them up on it to turn around and sell. Because OPENPower is ahead of RISC-V in most ways, with much better software support + IBM pushing it, yet has basically gained zero traction. RISC-V is nice ISA for high end hardware, in theory, but like other theoretical hardware its irrelevant if its not economical. In fact, I think ARM was kinda a fluke, and gained traction because of its huge embedded presence and the stars aligning among some big companies.
  - panick21_ 3y ago
    > No one is taking them up on it to turn around and sell. And you know that how? Because you can't buy a server with it in it? > Because OPENPower is ahead of RISC-V in most ways, with much better software support + IBM pushing it, yet has basically gained zero traction. OpenPower was simply not open. It was 'marketing' open. It was tightly controlled by a few companies and they wanted to sell you expensive CPU. Only way after RISC-V was successful did OpenPower finally change its license terms, by then it was already to late as RISC-V already had all the momentum. Being from IBM is not actually a benefit for many companies. We have seen far, far, far larger investments in RISC-V then we have ever seen in OpenPower. And I question if the software support is really that much better by now. Ventana, Alibaba, Esperanto, Tenstorrent, SiFive are all investing lots of money, there is a lot of traction. I think we should be careful predicting 10 years ahead with any confidence.
holistio 3y ago
> all of this will take money both literally, for hardware, and possibly figuratively, for people's time anyone who's ever run a company knows that people's time is not figurative money but literal money
fbn79 3y ago
As L.Torvalds once said, developers wants server with same hardware as used dev machine. So I think RISC-V servers success will happen only after RISC diffusion in dev desktop market.
- panick21_ 3y ago
  And yet many developers now have ARM laptops.
- pjmlp 3y ago
  While I don't believe in RISC-V taking over the server for the foreseable future, Mr Torvalds definitly never used shared UNIX development servers with X Windows/Telnet connections.
chrsw 3y ago
I agree with the author. This will be like turning around thousands of tankers.
phendrenad2 3y ago
The performance characteristics of ARM, RISC-V, and x86 are the same under a server workload. So there's no reason to switch.
soulbadguy 3y ago
Technology shifts are always hard to predict. I don't really have a perspective on whether or not RISC-V will dominate the server market in 10 years ( i think we simply do not have enough info to say one way or the other) However, the author is taking a very techno-centric line of argumentation. I think the success of RISC-V will mainly decided on a combination of economical and cultural factors. RISC-V wasn't really created to address a fundamental technical limitation of the current ISA lanscape (power,arm,x86,mips etc...) and it's debatable how much of an impact an ISA has on top-line metrics (Jym kellers said so i think). IMO RISC-V came to be because of the frustration around the lack of innovation and progress around ISA/uArch/CPU design. The author set out to create a common platform to foster innovation and collaboration. It's mainly a play on better license and modularity which would enable a wider range of innovative design, better collaboration between the research world and the industry. The closest analogy i can think of is the way LLVM gained market share on gcc on the last 10 years. LLVM/Clang didnt need to be "better" C++/C compiler than GCC to be viable. It was a combination of friendlier code base, a focus on user experience (mainly error message, compilation speed etc...) and a licensing that friendlier to companies which foster massive investment from some of the biggest players. In parallel, the modular nature of LLVM made it the de-facto research platform, so most of the innovation happened there. I think something similar will be the deciding factor for RISC-V success in the server landscape : - Do we have enough big, deep pocketed player for whom ARM/X86 is a sufficient pain in the rear to warrant large investments - Will the research community come up with enough innovative design to make the transition interesting. I can't really comment on the research side. But i think if RISC-V succeed on the server side, it will start will some private design from the hyper-scaler to run large in-house software (google search etc...) The dynamic from the hyper-scaler perspective is definitely changing and interesting : - The hyper-scaler have a lot of in-house software and services where they have much more control on which software runs. Sure they all use OSS software, but the contact surface is much lower there. Making the transitions pain easier to handle. - The economy of producing/designing a chip is very different from a chip manufacturer vs an hyper-scaler. PS : powerISA is also open, but doesn't seem to gain any traction.... IBM... always to early at the party
panick21_ 3y ago
Ventana, Alibaba, Esperanto, Tenstorrent, SiFive are all investing lots of money, there is a lot of traction. I think we should be careful predicting 10 years ahead with any confidence.
cesaref 3y ago
I think it would be informative to draw a comparison with the option of Linux. The Top 500 supercomputer OS mix is maybe the easiest example to use: https://en.wikipedia.org/wiki/History_of_Unix#/media/File:Operating_systems_used_on_top_500_supercomputers.svg https://en.wikipedia.org/wiki/History_of_Unix#/media/File:Op... I was specifying large systems for banking applications in the late 90s, and we never installed Linux anywhere. It was all Solaris/HP-UX/AIX (and mainly Solaris!). I actually had Linux running at home at the time, so I was totally aware of it's capability, but there's no way i'd have seen it displacing the Unixes in the sort of timeframe that happened with the Top500. So, i'd probably conclude that the 'out of nowhere' rise of RISC-V is a possibility. I'd say 5 years sounds quick, but 10 years is a long time. But hey, i'll be able to look back on this comment and reflect what an idiot I was about this in a few years time :)
thayne 3y ago
I'm curious why AWS chose ARM instead of RISC-V for their in-house graviton chips.
- snvzz 3y ago
  RISC-V was not ready. The necessary specs were only ratified in late 2021[0]. The first batch of hardware that's compliant with these (which include Tenstorrent Ascalon) is expected to show up in 2024. 0. https://wiki.riscv.org/display/HOME/Specification+Status#SpecificationStatus-PreviouslyRatifiedSpecifications https://wiki.riscv.org/display/HOME/Specification+Status#Spe...
- brucehoult 3y ago
  At the time Graviton 1 deployed in AWS (November 2018) there were only two RISC-V ASICs in the world (SiFive FE-310 and FU-540) and both were low-volume test chips with just CPU cores and some RAM and GPIO. No PCIe, no USB. Proof of concept only. The base instruction set (RV64GC + priv 1.10) was only set in stone in July 2019. And of course the Graviton project will have started in more like 2015 when RISC-V was a rapidly-iterating draft spec with no chips, just starting to transition from being a university research project to being managed by the RISC-V Foundation. A lot has changed in the last 4 1/2 years. There are now RISC-V server chips that are better than Graviton 1 (A72-class, 64 cores vs 16), with much better ones in the pipeline.
camel-cdr 3y ago
I think one of the most crucial factors for riscv adoption is proper rvv intrinsics and compiler support. It is currently almost* impossible to add rvv support to things like SIMDe, because neither gcc nor clang can eliminate redundant rvv vector load stores. (https://godbolt.org/z/ocs5rnzrs https://godbolt.org/z/ocs5rnzrs) *you can actually do it now with clang, but only if you use statement expression macros instead of functions and set hardcode -mrvv-vector-bits=n: https://godbolt.org/z/r3haM9Yar https://godbolt.org/z/r3haM9Yar
brucehoult 3y ago
This seems like an awfully clueless post. What is "soon"? This year? No. Within five years? Yes. Ten years could well see >50% share. Ten years ago there was no Aarch64 chip available from anyone. The iPhone 5s came out in September 2013, Android phones early 2015, the first SBCs (e.g. Pi 3 and Odroid C2) in 2016 -- just 7 years ago. Now Arm makes up 25% of AWS. The RISC-V Linux kernel, gcc & llvm, Debian and Ubuntu are all in fine shape for generic C/C++ datacenter stuff. All the interpreted languages are there, the things with their own JITs are in the worst shape because they are the only things that need a lot of special RISC-V work (given gcc and llvm are long done) but coming along nicely. There are a ton of "Raspberry PI" size and cost RISC-V boards now, with quad core 1.5 GHz dual-issue JH7110 SoC (like Pi 3) or quad core 1.85 GHz OoO TH1520 SoC (like Pi 4). There is a server chip (SG2042) available RIGHT NOW that has similar cores to the first Graviton generation four years ago, but 64 cores per chip instead of 16. You can get it on a single-socket board today, and dual- and quad-socket boards are coming within months. That's up to 256 cores, hundreds of GB of RAM, lots of PCIe, lots of L3 cache. The $100 TH1520 boards make a great development device for things to run on the SG2042 as they have the same C910 CPU cores. RISC-V chips in the same class as current (or very recent) x86 and Apple M1 will be available for development purposes NEXT YEAR and in mass production in 2025 or 2026. Is RISC-V going to take over entire datacentres? No, of course not. Is it going to have a significant and growing place in them within the next five years? Yes.

65 points by goranmoomin 3y ago

The most likely way risc-v makes it into the datacenter imo is through AI accelerator chips like tenstorrent. Initially this will not replace traditional compute but merely be deployed alongside it. If the cores prove to be fast for general purpose compute, someone will use them for that, since they are already available. From there I can imagine dedicated servers (although still likely aimed at niche workloads for some time)

ksec 3y ago

It is unfortunate people takes Jim Keller's word for granted. Much like many people believed in Raja Koduri. Not only going by literal sense about completely take over Server in 10 years. As in every server in use. I am willing to bet in 10 years time half of the shipping CPU used in server wouldn't even be RISC-V. A feat that even ARM is still far off from claiming it. It is sad that most if not all CEO ( even if they are supposed to be engineers ) likes to paint some overly optimistic pictures just because they have vested interest.

deleted 3y ago

[deleted]

danielEM 3y ago

Killer price / performance / energy efficiency ratio would do the job way sooner than anyone expects

user6723 3y ago

Some risc-v chips can execute in order and avoid having spectre-like problems. I work at a IaaS where customers deploy through our hosted cicd and we are very interested in risc-v solving our multi-tenancy concerns. GCC and clang already have enough support for risc-v that we have no concerns for support being there. If GCC and clang have what's necessary, everything else is fine. The moment we see close to a juncture where we can put an order in for risc-v with very many cores, our investors are going to dump a massive round of funding. Whether risc-v is popular or not doesn't matter. Our multi-tenant services won't have fundamental security isolation problems, everyone serving on x86_64 and ARM will. Looks like risc-v will dominate where things actually matter, unless some new iteration of OpenPOWER comes out.

gjsman-1000 3y ago
> don't have spectre-like problems You could just disable out-of-order execution but there’s a major performance hit. Some simpler ARM designs don’t have speculative execution.
jeffbee 3y ago
> Risc-v chips execute in order Odd then that the one of the first RISC-V hardware implementations called itself "Berkeley Out-of-Order Machine".
- brucehoult 3y ago
  What the person said was "SOME risc-v chips can execute in order". In fact the vast vast majority of RISC-V chips shipped to date are in-order, including the JH7110 SoC in this year's VisionFive 2, Star64 and PineTab-V, and Milk-V Mars. The only shipping OoO RISC-V chips are the TH1520 and SG2042 with C910 cores, as used in the Sipeed LicheePi4A and Milk-V Pioneer boards. BOOM was (and is) an experimental university project, not a product. But as Jim Keller said in a recent interview "with RISC-V a couple of university students created an OoO core that was better than the first Intel i7s which hundreds of engineers worked on".
  - jeffbee 3y ago
    That's a revision. The comment originally made the blanket statement that RISC-V executes in order.
    - brucehoult 3y ago
      Ok, I didn't see that. It's true for 99.99999% of currently-deployed RISC-V cores but, since the TH1520 and SG2042 boards started shipping in May, not 100% any more.
tails4e 3y ago
I don't think in order is related to the ISA. There may be a guarantee of the order of operations when it comes to the view of memory the programmer sees, but that does not prevent the hardware from executing out of order, as long as the end result is the same. X86 has strict memory ordering also, but both intel and AMD use out of order at the hardware level

justinclift 3y ago

Given that moving to RISC-V will make people's life harder, these servers and their CPUs need to be unambiguously better than the x86 (and ARM) server systems available at the same time. While this would generally be true, it misses an extremely important current factor. China really wants to find a way to circumvent US soft power limiting their future growth. The current tech embargo's by the US and friends are only going to make China try harder, and RISC-V seems perfectly positioned to become that circumvention measure. Note the plethora of Chinese RISC-V boards and chips coming out... which is exactly what they need to do (iterate as fast as possible).

pjmlp 3y ago
They can do the same copying ARM and x86 designs.
- justinclift 3y ago
  Sure. They're likely doing that too meanwhile. :)
- ffgjgf1 3y ago
  They won’t be able to export them to other countries then
  - deleted 3y ago
    [deleted]
DuckFeathers 3y ago
[dead]

derbOac 3y ago

10 years is a long time in tech. It's hard to say what will happen in that kind of timeframe. I suspect RISC-V won't have taken over datacenters by then, but I could see it being an emerging, stably growing phenomenon. Without sounding too critical, I feel like this is sort of a discussion about strawmen. Keller set up the strawman so this is responding to that, but I think the title or something is misleading and so it doesn't do much to address the fact it's still a strawman. "No competitive RISC-V servers" is not the same as "everything will be competitive RISC-V servers."

sylware 3y ago

Nothing new here. We all perfectly know that without extremely performant RISC-V implementations (open source or close source), that on the latest silicon node process, its success will be somewhat limited, even if it means modern ISA standard for all and that worldwide royalty free.

sgbeal 3y ago

The author seems to believe that speed is the only competitive factor. The fact is that many services don't need but a fraction of the speed they have available to them and that power consumption is, in some areas, the more important competitive distinction. RISC-V will beat out Intel on power consumption out of the gate, even if they never compete in terms of raw speed.

TazeTSchnitzel 3y ago
Low power consumption isn't worth much if the performance sucks. Performance-per-watt is important. Surely AArch64 is going to win over RISC-V there for the foreseeable future?
- sgbeal 3y ago
  > Low power consumption isn't worth much if the performance sucks. Not every service needs high performance. A web site serving static content, for example, or a low-traffic forum. i co-admin multiple public forums, e.g. sqlite.org/forum, which run on single-CPU nodes and get along just fine with that.

shrubble 3y ago

The issue is that servers that go in a datacenter have multiple constraints, not just one. Computational speed, RAM capacity, networking, amount of power used, all play a part. For instance, say a RISCV 1024-core multi-chiplet CPU with ability to have 4TB on the motherboard; even if it used 400W for the CPU, it might make sense because of how many VMs you could pack per-system. For datacenter it sometimes may make sense to talk about how "wide" rather than how "deep" you can go, especially for cloud or VM tasks. Each core being slightly slower might not matter, in that you have a lot of concurrent tasks that may well be disk or network IO-bound part of the time...

hajile 3y ago
Intel pairing up with SiFive shows the obvious path forward here where the new ISA is paired with existing tech from a large company. If Intel decided to ship a core that could execute either x86 or RISC-V instructions, we could see massive adoption in no time at all.

kriro 3y ago

I'm pretty bullish on RISC-V, if anyone has suggestions on how to bet some money on this instinct (invest) I'd be interested to hear about it. Openness, tooling support being decent enough already and general capabilities are all good (and power comsumption could be a differentiator). Actual chips being produced. I'm curious why it's so "underrated" or sometimes even reduced to politics (China). Even with no trade war nonsense it makes quite a bit of sense for countries to move to open architectures (imo). At least I'd be a bit more comfortable betting on it as opposed to ARM where licensing terms may or may not change. Curious to see when the first mass produced RISC-V cell phones will hit the shelves (android support is announced already).

brucethemoose2 3y ago
> I'm curious why it's so "underrated" or sometimes even reduced to politics (China) Because Tenstorrent is licensing 8-wide RISC-V cores and... No one is taking them up on it to turn around and sell. Because OPENPower is ahead of RISC-V in most ways, with much better software support + IBM pushing it, yet has basically gained zero traction. RISC-V is nice ISA for high end hardware, in theory, but like other theoretical hardware its irrelevant if its not economical. In fact, I think ARM was kinda a fluke, and gained traction because of its huge embedded presence and the stars aligning among some big companies.
- panick21_ 3y ago
  > No one is taking them up on it to turn around and sell. And you know that how? Because you can't buy a server with it in it? > Because OPENPower is ahead of RISC-V in most ways, with much better software support + IBM pushing it, yet has basically gained zero traction. OpenPower was simply not open. It was 'marketing' open. It was tightly controlled by a few companies and they wanted to sell you expensive CPU. Only way after RISC-V was successful did OpenPower finally change its license terms, by then it was already to late as RISC-V already had all the momentum. Being from IBM is not actually a benefit for many companies. We have seen far, far, far larger investments in RISC-V then we have ever seen in OpenPower. And I question if the software support is really that much better by now. Ventana, Alibaba, Esperanto, Tenstorrent, SiFive are all investing lots of money, there is a lot of traction. I think we should be careful predicting 10 years ahead with any confidence.

holistio 3y ago

> all of this will take money both literally, for hardware, and possibly figuratively, for people's time anyone who's ever run a company knows that people's time is not figurative money but literal money

fbn79 3y ago

As L.Torvalds once said, developers wants server with same hardware as used dev machine. So I think RISC-V servers success will happen only after RISC diffusion in dev desktop market.

panick21_ 3y ago
And yet many developers now have ARM laptops.
pjmlp 3y ago
While I don't believe in RISC-V taking over the server for the foreseable future, Mr Torvalds definitly never used shared UNIX development servers with X Windows/Telnet connections.

chrsw 3y ago

I agree with the author. This will be like turning around thousands of tankers.

phendrenad2 3y ago

The performance characteristics of ARM, RISC-V, and x86 are the same under a server workload. So there's no reason to switch.

soulbadguy 3y ago

Technology shifts are always hard to predict. I don't really have a perspective on whether or not RISC-V will dominate the server market in 10 years ( i think we simply do not have enough info to say one way or the other) However, the author is taking a very techno-centric line of argumentation. I think the success of RISC-V will mainly decided on a combination of economical and cultural factors. RISC-V wasn't really created to address a fundamental technical limitation of the current ISA lanscape (power,arm,x86,mips etc...) and it's debatable how much of an impact an ISA has on top-line metrics (Jym kellers said so i think). IMO RISC-V came to be because of the frustration around the lack of innovation and progress around ISA/uArch/CPU design. The author set out to create a common platform to foster innovation and collaboration. It's mainly a play on better license and modularity which would enable a wider range of innovative design, better collaboration between the research world and the industry. The closest analogy i can think of is the way LLVM gained market share on gcc on the last 10 years. LLVM/Clang didnt need to be "better" C++/C compiler than GCC to be viable. It was a combination of friendlier code base, a focus on user experience (mainly error message, compilation speed etc...) and a licensing that friendlier to companies which foster massive investment from some of the biggest players. In parallel, the modular nature of LLVM made it the de-facto research platform, so most of the innovation happened there. I think something similar will be the deciding factor for RISC-V success in the server landscape : - Do we have enough big, deep pocketed player for whom ARM/X86 is a sufficient pain in the rear to warrant large investments - Will the research community come up with enough innovative design to make the transition interesting. I can't really comment on the research side. But i think if RISC-V succeed on the server side, it will start will some private design from the hyper-scaler to run large in-house software (google search etc...) The dynamic from the hyper-scaler perspective is definitely changing and interesting : - The hyper-scaler have a lot of in-house software and services where they have much more control on which software runs. Sure they all use OSS software, but the contact surface is much lower there. Making the transitions pain easier to handle. - The economy of producing/designing a chip is very different from a chip manufacturer vs an hyper-scaler. PS : powerISA is also open, but doesn't seem to gain any traction.... IBM... always to early at the party

panick21_ 3y ago

Ventana, Alibaba, Esperanto, Tenstorrent, SiFive are all investing lots of money, there is a lot of traction. I think we should be careful predicting 10 years ahead with any confidence.

cesaref 3y ago

I think it would be informative to draw a comparison with the option of Linux. The Top 500 supercomputer OS mix is maybe the easiest example to use: https://en.wikipedia.org/wiki/History_of_Unix#/media/File:Operating_systems_used_on_top_500_supercomputers.svg https://en.wikipedia.org/wiki/History_of_Unix#/media/File:Op... I was specifying large systems for banking applications in the late 90s, and we never installed Linux anywhere. It was all Solaris/HP-UX/AIX (and mainly Solaris!). I actually had Linux running at home at the time, so I was totally aware of it's capability, but there's no way i'd have seen it displacing the Unixes in the sort of timeframe that happened with the Top500. So, i'd probably conclude that the 'out of nowhere' rise of RISC-V is a possibility. I'd say 5 years sounds quick, but 10 years is a long time. But hey, i'll be able to look back on this comment and reflect what an idiot I was about this in a few years time :)

thayne 3y ago

I'm curious why AWS chose ARM instead of RISC-V for their in-house graviton chips.

snvzz 3y ago
RISC-V was not ready. The necessary specs were only ratified in late 2021[0]. The first batch of hardware that's compliant with these (which include Tenstorrent Ascalon) is expected to show up in 2024. 0. https://wiki.riscv.org/display/HOME/Specification+Status#SpecificationStatus-PreviouslyRatifiedSpecifications https://wiki.riscv.org/display/HOME/Specification+Status#Spe...
brucehoult 3y ago
At the time Graviton 1 deployed in AWS (November 2018) there were only two RISC-V ASICs in the world (SiFive FE-310 and FU-540) and both were low-volume test chips with just CPU cores and some RAM and GPIO. No PCIe, no USB. Proof of concept only. The base instruction set (RV64GC + priv 1.10) was only set in stone in July 2019. And of course the Graviton project will have started in more like 2015 when RISC-V was a rapidly-iterating draft spec with no chips, just starting to transition from being a university research project to being managed by the RISC-V Foundation. A lot has changed in the last 4 1/2 years. There are now RISC-V server chips that are better than Graviton 1 (A72-class, 64 cores vs 16), with much better ones in the pipeline.

camel-cdr 3y ago

I think one of the most crucial factors for riscv adoption is proper rvv intrinsics and compiler support. It is currently almost* impossible to add rvv support to things like SIMDe, because neither gcc nor clang can eliminate redundant rvv vector load stores. (https://godbolt.org/z/ocs5rnzrs https://godbolt.org/z/ocs5rnzrs) *you can actually do it now with clang, but only if you use statement expression macros instead of functions and set hardcode -mrvv-vector-bits=n: https://godbolt.org/z/r3haM9Yar https://godbolt.org/z/r3haM9Yar

brucehoult 3y ago

This seems like an awfully clueless post. What is "soon"? This year? No. Within five years? Yes. Ten years could well see >50% share. Ten years ago there was no Aarch64 chip available from anyone. The iPhone 5s came out in September 2013, Android phones early 2015, the first SBCs (e.g. Pi 3 and Odroid C2) in 2016 -- just 7 years ago. Now Arm makes up 25% of AWS. The RISC-V Linux kernel, gcc & llvm, Debian and Ubuntu are all in fine shape for generic C/C++ datacenter stuff. All the interpreted languages are there, the things with their own JITs are in the worst shape because they are the only things that need a lot of special RISC-V work (given gcc and llvm are long done) but coming along nicely. There are a ton of "Raspberry PI" size and cost RISC-V boards now, with quad core 1.5 GHz dual-issue JH7110 SoC (like Pi 3) or quad core 1.85 GHz OoO TH1520 SoC (like Pi 4). There is a server chip (SG2042) available RIGHT NOW that has similar cores to the first Graviton generation four years ago, but 64 cores per chip instead of 16. You can get it on a single-socket board today, and dual- and quad-socket boards are coming within months. That's up to 256 cores, hundreds of GB of RAM, lots of PCIe, lots of L3 cache. The $100 TH1520 boards make a great development device for things to run on the SG2042 as they have the same C910 CPU cores. RISC-V chips in the same class as current (or very recent) x86 and Apple M1 will be available for development purposes NEXT YEAR and in mass production in 2025 or 2026. Is RISC-V going to take over entire datacentres? No, of course not. Is it going to have a significant and growing place in them within the next five years? Yes.