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A Chip to Bridge the USB 2 – USB 3 Divide
- a9h74j 5y agoA USB2 to USB3 divide? Curse you, social media. If only there were a chip to bridge other divides.
- ridgered4 5y ago> if you have a USB 3 hub plugged into a USB 3 port, multiple USB 2 devices plugged into it still cannot break through the USB 2 uplink limit of 480 MBps. I had a weird project where I ran into this. Or rather, I was actually aware of it and tried to work around it. I wanted to attach a large number of optical drives with sata to USB converters to a single port, basically a hot attachable ripping tower kind of thing. To assure a single port would provide enough bandwidth I needed USB 3.0 throughout. But SATA to USB 3.0 converters that exist seem to have...shaky support for optical drives as they're only really meant for SSDs/HDDs. My project ended in at least temporarily failure due to that unreliability. I remember reading about this device and not finding it a reasonable solution. In addition to not being easily available, I'd need one device per port to break the uplink limit. That wouldn't save me any money and it would be a cabling nightmare. If the chips were a reasonable price and easily available I might have looked into it more seriously anyway though.
- MayeulC 5y agoMaybe you'd have more chance using USB 3 drives directly, unless you actually require a 3.5 inches form-factor? Another option might be to use IDE drives...
- ridgered4 5y agoI'm using optical drives in case, so 5.25". But yes, I believe I'm going to end up removing USB from the equation entirely and just go straight SATA connection, possibly with a port multiplier solution.
- blip54321 5y agoMy pet peeve are webcams. You can only plug in a few before you run out of bandwidth.
- marktangotango 5y ago> USB 2 uplink limit of 480 MBps. That should be "Mbps", usb 2.0 max is 60 megabytes per second. Odd that even hackaday gets this wrong from time to time.
- OJFord 5y ago> Odd that even hackaday gets this wrong from time to time. Is it? Isn't 'hackaday' just various unvetted user contributions?
- BenjiWiebe 5y agoI haven't frequented them in a while, but it used to be a mix of guest articles and articles written by staff, commonly about user submitted stuff.
- OJFord 5y agoOh ok, you're probably right (I've ended up there occasionally e.g. via HN but never frequented) I just misunderstood.
- R0b0t1 5y agoThere's a bunch of weirdness. Lack of USB2 to USB3 translation is one of them, but there's also a lack of USB3 and USB2 concurrency. E.g., if I put a USB 2 device on a bus with a USB 3 flash drive I would find constant stalling due to the USB2 bus activity. It even went so far that the output of `lsusb -t` would show the speed downgraded to 480Mbps at the bus level and not just the port. This has since been changed, but I notice stalling and bad performance. This is supposed to be fixed in USB3.1 and 3.2 but I am not sure we're going to see it in practice. The original spec does not say they are supposed to happen at the same time but the spec authors have made themselves clear that they were supposed to operate concurrently.
- stathibus 5y agoIn my biased opinion USB 2 fallback is a misfeature. Most devices that use USB 3 for a good reason do terrible things when run at USB 2 speed, and it requires expertise to figure out why things aren't going the way they're supposed to. On the other hand a mouse and keyboard will work pretty much the same...
- rektide 5y agothatcs not what this chip is for/does. from the second paragraph: > If you have a USB 2.0 device and a host with only USB 3.0 signals available, this chip is for you.
- vlovich123 5y agoThe main problem I’ve observed with fallback is that 3.0 devices plugged into 3.0 ports sometimes get detected as 2.0 devices. Sometimes there’s a spontaneous port disconnect and the reenumeration causes it to be detected as USB2.0. If I recall correctly this was primarily only happening with a non-standard optical repeater cable so it could be the cable was doing something unexpected (eg 3.0 enumeration was taking longer than some timeout and it was going into 2.0 mode). In general though users preferred functionality, even if performance was reduced.
- rektide 5y agousb4 still preserves a legacy usb2 connection pair. on the one hand it's kind of absurd. on the other, a long distance capable, supported everywhere wire protocol is great to be able to assume. displayport's aux channel is a great example of why keeping legacy connectivity around on a second track: it makes lowhgrade kvm like connectivity ultra easy & low cost. it's, ultimately, a pretty good thing that the 480mbit/s pipe is available for use by cheap & common devices. i dont see what else we could do. (aside from mandate that each usb-4 hub integrate a usb-2 over usb-4 adapter like this on each port, which probably makes sense, but also probably would be uncertifiable, would be likely to cause some random device misbeaviors... whitequark will probably have found a dozen random constraints by the end of the week to this chip.)
- kevin_thibedeau 5y agoThis behavior is already done to translate 1.5 and 12Mbps packets into 480Mbps. USB 1.1 didn't do that and 1.5Mbps data effectively stole bus time from higher speed traffic.
- mikepurvis 5y agoHow wild is it that 480 Mbit/sec is low speed and low cost? Like, it makes sense on one level, but it's just crazy to me how fast that still is compared with PS2 (16kbps), RS232 (115kbps), CANbus (1Mbps), USB 1.1 (12Mbps), 10/100 Ethernet (100Mbps), Firewire (400Mbps). Obviously totally inadequate once you're talking to solid state storage or if there's video/display data in the mix. But still... 480Mbps is fast.
- MayeulC 5y ago> displayport's aux channel is a great example of why keeping legacy connectivity around on a second track: it makes lowhgrade kvm like connectivity ultra easy & low cost On this topic, I wish it was used a bit more. What do you mean with that? Do you actually tunnel keyboard and mouse data trough that aux channel? I am not aware of it being supported by any OS? Or are you only referring to DCC data, using it to switch inputs? (Which you can also do on HDMI and VGA screens). If there is any alternative to HDMI CEC on the DisplayPort side, I'm all ears. That and standardized audio support are features where HDMI currently stands out, IMO.
- teruakohatu 5y agoReading the comments, apparently the Valve Index uses one of these chips. Supply is so bad nobody is selling this chip.
- nrp 5y agoI posted this in the Hackaday comment thread as well: If I am not mistaken, Valve instigated the creation of this part as an element of the VirtualLink standard. This standard achieved four lanes of DisplayPort and USB 3.0 over a USB-C connector by reusing the USB 2.0 pins and using a USB 2 to USB 3 bridge. I was on the Oculus side of VirtualLink. It made sense as a standard and overcame some of the shortcomings of USB-C, but never really got off the ground.
- teruakohatu 5y agoYou sound like an expert, can I ask at what point does it make more sense to create a custom connector rather than a custom chip? Not creating a custom connector is how we ended up with the Nintendo Switch dock debacle, and to this day legions of Switch owners refuse to charge their switches with any random USB-C cable (despite it being perfectly OK).
- johnwalkr 5y agoWas there any actual problem besides 15V not being available on many chargers?
- teruakohatu 5y agoCertain aftermarket docks would destroy Switches in certain circumstances. The Switch had lower voltage requirements than a particular protocol specified.
- dijit 5y agoSemi-related: Is it possible to monitor USB hub bandwidth in a meaningful way? The only time I've ever noticed bottlenecks is when things stopped working, or work intermittently, and sometimes informs (via kernel messages) that USB is overloaded... but it strikes me odd that we have top/iftop/radeontop/intel_gpu_top/etc but I'm not aware of anything for monitoring USB hubs. EDIT: well crap, I guess I never looked; there exists USBTop: https://github.com/aguinet/usbtop https://github.com/aguinet/usbtop -- leaving my stupidity so others may learn.
- R0b0t1 5y agoYou might get more useful things from /sys/kernel/debug as well, but you'll need to get familiar with the spec. It would let you know how a device is doing something wrong and can be made better.
- amelius 5y agoWireshark can read USB communication.
- wanderer_ 5y agoI love me some packet-sniffing fun!
- StillBored 5y agoThe unstated is that the core problem here (lack of USB2 on a USB3 connector) is _NOT_ standard. This is generally only a problem on the plethera of shit arm/etc SoCs using garbage IP where the vendor is only interested in checking a box, than actually providing a working/compliant implementation of the specification. Part two of this problem are the USB2 implementations that don't provide USB1 Transaction Translators (TT), so keyboards/etc won't work. And as a 3rd note, the Pi4 actually has good USB3 because its implemented by a 3rd party XHCI controller like one might find on a random PCIe card. Combined with a usb3 hub with multiple TT's it should be possible to attach a number of SDR's etc at reasonable rates. Good luck figuring this out from the usb3 hub details unless it lists the chip its using.
- de_Selby 5y ago>The unstated is that the core problem here (lack of USB2 on a USB3 connector) is _NOT_ standard. It does say this at the end of the article.
- MayeulC 5y ago> the core problem here (lack of USB2 on a USB3 connector) Not sure if that's the core issue here? That's one of the issues, but there are more uses for that chip, like the introduction that hints at sharing USB3 bandwidth between multiple USB2 devices.
- dsr_ 5y agoYeah, this. A person not familiar with this situation would think that if a USB3 hub had USB2 ports on it, it would do packet level buffering and switching so that the 5-10Gb/s of the USB3 upstream would be shared among the 480Mb/s USB2 ports. It should be reasonable to get 8-10 USB2 ports all operating at their maximum bandwidth off of 1 USB3 port. After all, that's how Ethernet works.
- marcan_42 5y agoAnd the reason why that doesn't and can't work with USB2 is because, unlike Ethernet, USB is extremely closely tied to its physical layer and you cannot actually buffer and switch USB packets at all (without cooperation from at least one side). All communications are host-driven and stateful, and the timeouts for replies are on the order of single-digit microseconds, and the receiving end has no obligation to accept data, so there is no way to safely buffer data and forward it at a later time because that time might never come, and the mere act of accepting data from one end desyncs both ends' ideas of what data was successfully transferred, which can have higher level protocol implications. USB is a clusterfuck of a standard.
- mschuster91 5y agoI ran into a similar problem when trying to extend a Mac Pro 4.1 with a USB-C/Thunderbolt card and an USB-C to 4x USB-A hub on my desk. High speed USB devices like a HDD worked just fine - but my mouse and keyboard did not. The reason took me a while to find out: These "add Thunderbolt"-style cards carry only a USB3/TB PHY and pass USB2 D+/D- right through to a connector which you are supposed to plug into your motherboard's onboard USB connector. I was just thinking "wtf, who invented this madness... are you serious?"... also, how much money would it have cost Intel to put in an USB2 PHY into the TB chipset? A couple cents maybe... that's just bonkers.
- modeless 5y agoSomeone needs to make this into a product. It's silly that there isn't a single USB 3 hub on the market that can use USB 3 bandwidth to connect a large number of USB 2 devices at their full bandwidth. I've really wished for such a device in the past and I think it would sell pretty well.
- nrdgrrrl 5y ago
- marcan_42 5y agoIt is impossible to implement that. The USB standard for some inexplicable reason refused to specify USB 3 to USB 2 transaction translation. That's why it doesn't exist. There is no way to implement it that works as you would expect. It's just not possible. I will never forgive the USB-IF for this gaffe, it is ridiculous. There are two nonstandard ways to do it. One is what this chip does, which is pretend all USB 2 devices behind it are USB 3. It literally virtualizes and rewrites desctiptors and does a whole pile of horrible hacks to get it to work. It works most of the time, but not always, and it is actually impossible to make it 100% reliable due to peculiarities of the standard. USB is impossible to tunnel or masquerade transparently at the link level due to its design, and since this device tries to do that to bridge incompatible link types, it can never be 100% spec compliant; there will always be corner cases where it breaks down. It's a hack. The other way, which is implemented by some other niche hub chip whose name I forget, is to use a proprietary protocol to encapsulate USB2 in USB3, effectively making a USB2 host controller that just happens to connect to the host CPU via USB3. That can be done in a 100% spec-compliant and reliable way as far as downstream devices go, but then of course the upstream side is not standard, so you need special drivers for it. There will never be a USB 2 to USB 3 translating hub that works as you'd expect because it's just not possible to build one, because the USB-IF are notoriously bad at designing standards. Seriously, so much about USB is a giant clusterfuck, from USB2's differential-but-not-really physical layer to the monster that is USB-PD.
- russdill 5y agoThere's two other ways. One is to use a USB 3 to PCI express bridge and then functional pcie USB controller chipsets. I'm not aware of any such bridge silicon existing. The second way is what you said, to skip the bridge and create a USB host controller that connects though via USB. Again, I'm not aware of the existence of any such silicon. Both could be implemented without any standards fuckery. Both would require new silicon and new host OS drivers. You could make your own such device by glueing together USB host and device controllers with an ARM or somesuch. But again, you'd need a host OS driver.