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But we can’t go much smaller can we? Totally not well versed in the chip space, so what can we expect?
by prox 5y ago
But we can’t go much smaller can we? Totally not well versed in the chip space, so what can we expect?
- MangoCoffee 5y agoadvance packaging, chiplet, 3DFabric...etc
- peheje 5y agoIf history has taught us anything it's that technology won't stop evolving. And whenever humans thinks surely we've reached the peak of technological advancements, time proves us wrong. One thing is for sure, it's going to look very different from what we can imagine today.
- Retric 5y agoTechnology stagnated all the time in history. The pattern is new approach gets perfected resulting in ever smaller gains and different tradeoffs. Look at say rings where personal skill plays a larger role than the advancements in technology. We might be better at mining gold today, but that doesn’t translate into a better ring. Include longevity as one of the points of comparison and a lot of progresses looks like a step back. Cheaper and doesn’t last as long has been a tradeoff people have been willing to make for thousands of years.
- oblio 5y agoTechnology also gets as good as necessary and not necessarily further, for long periods of time. Babies have "colics", which are probably some kind of pain that we haven't identified yet, but because they go away on their own and parents are taught that they just have to deal with them, we still apply a medieval solution to the problem ("tough it out"). Rings seem to be the kind of problem where our current solution is good enough. I don't foresee computing power to be the same. We'll want more and more of it. So stagnation will be due to gaps in basic research, not due lack of interest.
- rvanlaar 5y agoI see that computing power is in high demand for quite some time to come. I do believe there will be stagnation unless a different way is found. In the same way Henry Ford said people wanted a faster horse not a car. And regarding travel, I would like to have faster, much faster transportation. However it hasn't come, yet. There seems to be a local optimum between costs and practicality.
- andrewjl 5y ago> Look at say rings where personal skill plays a larger role than the advancements in technology. What about advancements metallurgy? And to use an adjacent example, cold-pressed steel techniques increase the number of places steel can be used. (See here https://en.wikipedia.org/wiki/Cold-formed_steel#Hot-rolled_versus_cold-rolled_steel_and_the_influence_of_annealing https://en.wikipedia.org/wiki/Cold-formed_steel#Hot-rolled_v...). More often that not, technology enables trade-offs to be made that couldn't be before. Making something cheaper and more fragile does lose something, service life, and so on. In exchange the cheaper thing is now used more widely. Perhaps this more widespread use unlocks something that only a few expensive yet high-quality units could not. Think of smartphones and the resulting network effects.
- Retric 5y ago18k Gold jewelry has been using 18 parts gold, 3 parts copper, and 3 parts silver for a long time. In theory sure we could probably improve on it, but it works.
- xmodem 5y agoWe're already at the point where a transistor is a double-digit number of silicon atoms. The cost of each node shrink is growing at an insane rate. The good times might be back for now - and don't get me wrong, I'm having a blast - but don't expect them to last for long. I think this is probably the last sputter of gas in the tank, not a return to the good times.
- hutrdvnj 5y agoBut what happens if we hit the final plateau, same processor speed (+ minor improvements) for the decades to come?
- jl6 5y agoWe start optimizing software, and then we start optimizing requirements, and then computing is finally finished, the same way spoons are finally finished.
- agumonkey 5y agoyou can also optimize society because every time a human gets in the loop, trillions of cycles are wasted, and people / software / platforms are really far from efficient. actually if companies and software were designed differently (with teaching too, basically an ideal context) you could improve a lot of things with 10x factors just from the lack of resistance and pain at the operator level
- MR4D 5y agoThis is a really good point you make. A simple example for me is how the ATM replaced the bank teller, but the ATM has been replaced with cards with chips in them. It’s a subtle, but huge change when magnified across society.
- agumonkey 5y agoare chips an issue ? having worked in various administrations, the time / energy / resources wasted due to old paper based workflow is flabbergasting you'd think after 50 years of mainstream computing they'd have some kind of adequate infrastructure but it's really really sad (they still have paper inbox for internal mail routing errors)
- kasperni 5y agoJim Keller believes that at least 10-20 years of shrinking is possible [1]. [1] https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1800 https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1800
- stingraycharles 5y agoAnd for those who don’t know, Jim Keller is a legend. https://en.m.wikipedia.org/wiki/Jim_Keller_(engineer) https://en.m.wikipedia.org/wiki/Jim_Keller_(engineer)
- agumonkey 5y agothe last 20 years people had serious doubts on breaching 7nm (whatever the figure means today) but, and even if Keller is a semigod (pun half intended) .. I'm starting to be seriously dubious on 20 years of continued progress.. unless he means a slow descent to 1-2nm .. or he's thinking sub-atomic electronics / neutronics / spintronics (in which case good on him).
- Nokinside 5y agoJim Keller is legend in microarchitecture design, not in process technology. All his arguments seem to be just extrapolating from the past. Process engineers&material scientists seem more cautious. I'm sure shrinking goes but gains are smaller from each generation. TSMC 3nm Process is something like 250 MTr/mm² and single digit performance increase and 15-30% power efficiency increase compared to older prosess.
- tyingq 5y agoIt does, though, reduce heat, right? Which ultimately is more cores per socket. Which hits the thing that actually matters...price/performance.
- Nokinside 5y agoYes. But that's a huge decline compared to even recent past. Performance increases from generation to generation used to be much faster. TSMC's N16 to N7 was still doubling or almost doubling performance and price/performance over the long term. N5 to N3 is just barely single digits. Every fab generation is more expensive than in the past. Soon every GIGAFAB costs $30 billion while technology risk increaseses.
- tyingq 5y agoA revisit of how to do parallelism. Hopefully more successfully than Itanium and its compilers fared. The Mill CPU has some ideas there as well.
- matthewfcarlson 5y agoIt was interesting working at microsoft next to some folks that were around in the Itanium days and worked on it. Hearing their stories and theories was really cool. I wonder if now is the time of alternative ISAs given that JIT and other technologies have gotten so good
- MayeulC 5y agoA usual reminder that we're not getting smaller. This is marketting speech, transistor gates are stuck at 20ish nanometers. What's still increasing is transistor density, but "Dennard's Scaling" is dead. we stopped decreasing voltages some time ago. We have more transistors, so we can make smarter chips. but we can't turn them on at the same time ("dark silicon"), we don't want to melt the chips. Short of using other materials such as GaN, frequency won't really go above 5 GHz. There remain plenty of ways to improve performance though: improvements to system architecture (distributed, non von neumann, changing the ISA), compilers, etc. Adiabatic computing, 3D integration, carbon nanotubes, tri-gate transistors, logic in memory, "blood" (cooling + power) and other microfluiduc advances, modularization with chiplets. The "simple" Dennard's scaling is over though, and we need to move beyond CMOS and Von Neumann to really leverage increasing density without melting away.
- dfdz 5y ago> 3D integration In case anyone missed it, AMD announced a basic "3D" design last month https://www.hpcwire.com/2021/06/02/amd-introduces-3d-chiplets-demos-vertical-cache-on-zen3-cores/ https://www.hpcwire.com/2021/06/02/amd-introduces-3d-chiplet... Essentially AMD "stacked a 64MB 7nm SRAM directly on top of each core complex, tripling the L3 cache available to the Zen 3 cores." I am excited to see what comes next!
- ac29 5y ago> A usual reminder that we're not getting smaller. This is marketting speech, transistor gates are stuck at 20ish nanometers. A quick perusal of WikiChip seems to suggest that this isnt true. Pretty much everything is getting smaller, including Fin pitch which should directly affect transistor size (not an EE, certainly could be wrong there). You're absolutely right that terms like "7nm" have become decoupled from a specific measurement and are largely marketing terms, though. https://en.wikichip.org/wiki/10_nm_lithography_process https://en.wikichip.org/wiki/10_nm_lithography_process https://en.wikichip.org/wiki/7_nm_lithography_process https://en.wikichip.org/wiki/7_nm_lithography_process
- perl4ever 5y ago