17 ms·
MIPS Becomes RISC-V
- abrowne 6y agoIf you can't beat 'em, join 'em?
- muterad_murilax 6y agoOr, conversely: beat 'em and eat 'em!
- lallysingh 6y agoI guess that they're going to ship RISC-V CPUs? Makes sense. Do they still have design chops for making fast implementations?
- gautamcgoel 6y agoThis is huge. It looks like the only architectures widely-deployed in ten years will be x86, ARM, Power, and RISC-V (maybe also SPARC64 in Japan, although that's rare in the US).
- tyingq 6y agoThe "not ARM based" MCU market might be interesting to watch as well. Not just for RISC-V, but also as ARM MCUs continue to drop in power needs and unit cost.
- dragontamer 6y agoThe big innovation in architectures is in the SIMD world. AVX512 (x86 512-bit), SVE (ARM 512-bit), NVidia PTX / SASS (32x32-bit), AMD RDNA (32x32-bit), AMD CDNA (64x32-bit). 64-bit cores (aka: classic CPUs) are looking like a solved problem, and are becoming a commodity. SIMD compute however, remains an open question. NVidia probably leads today, but there seems to be plenty of room for smaller players. Heck, one major company (AMD) is pushing 32x32-bit on one market (6xxx series) and 64x32-bit in another market (MI100 / Supercomputers).
- tyingq 6y agoFujitsu seems like a leader for SIMD via their A64FX. I wonder if they will ever venture outside of the supercomputing niche.
- dragontamer 6y agoSVE is looking like a general-purpose ARM instruction set in the future. I believe the Neoverse V-cores (high-performance) will have access to the SVE instructions for example. So the SVE-SIMD is not necessarily locked to Fujitsu (though Fujitsu's particular implementation is probably crazy good. HBM2 + 512-bit wide and #1 supercomputer in the world and all...)
- londons_explore 6y agoSIMD today is only really helpful with a few usecases. If you want to encode some video, decode some jpegs, or do a physics simulation quicker, it's really going to help. It won't boot Linux any quicker tho. I suspect for consumer uses, SIMD is already used for nearly all the use cases it can be.
- dragontamer 6y agoAre you sure about that? The original SIMD-papers in the 1980s show how to compile a Regex into a highly-parallel state machine and then "reduced" (aka: Scan / Prefix-operation: https://en.wikipedia.org/wiki/Prefix_sum https://en.wikipedia.org/wiki/Prefix_sum). A huge amount of operations, such as XML-whitespace removal (aka: SIMD Steam Compacting), Regular Expressions, and more, have been proven ~30 to 40 years ago to benefit from SIMD compute. Yet such libraries don't exist today yet. SIMD compute is highly niche, and clearly today's population is overly focused on deep-learning... without even seeing the easy opportunities of XML parsing or simple regex yet. Further: additional opportunities are being discovered in O(n^2) operations: such as inner-join operations on your typical database. Citations. * For Regular Expressions: Read the 1986 paper "DATA PARALLEL ALGORITHMS". Its an easy read. Hillis / Steele are great writers. They even have the "impossible Linked List" parallelism figured out in there (granted: the nodes are located in such a way that the SIMD-computer can work with the nodes. But... if you had a memory-allocator that worked with their linked-list format, you could very well implement their pointer-jumping approach to SIMD-linked list traversal) * For whitespace folding / removal, see http://www.cse.chalmers.se/~uffe/streamcompaction.pdf http://www.cse.chalmers.se/~uffe/streamcompaction.pdf. They don't cite it as XML-whitespace removal, but it seems pretty obvious to me that it could be used for parallel whitespace removal in O(lg(n)) steps. * Database SIMD: http://www.cs.columbia.edu/~kar/pubsk/simd.pdf http://www.cs.columbia.edu/~kar/pubsk/simd.pdf . Various operations have been proven to be better on SIMD, including "mass binary search" (one binary search cannot be parallelized. But if you have 5000-binary searches operating in parallel, its HIGHLY efficient to execute all 5000 in a weird parallel manner, far faster than you might originally imagine). ---------- SIMD-cuckoo hashing, SIMD-skip lists, etc. etc. There's so many data-structures that haven't really been fleshed out on SIMD yet outside of research settings. They have been proven easy to implement and simple / clean to understand. They're just not widely known yet.
- the8472 6y ago+ many proprietary GPU instruction sets
- justin66 6y agoWhy do you assume Power will last another 10 years?
- sneak 6y agoWhat is the SPARC64 use case in Japan? Supercomputing?
- rst 6y agoDepends where you look. Hard to see IBM's z/Architecture dying out in that timeframe (the latest branding for S/360-derived mainframes), for example, and the embedded space is likely to remain an odd bestiary for quite some time.
- monocasa 6y agoEmbedded is going to become way less of a bestiary, at least in the five digit gate count RISC space. ARC, Xtensa, V850, arguably MIPS, etc. all worked in the "we're cheaper to license than ARM, and will let you modify the core more than ARM will" space. I'm not sure how they maintain that value add when compared to lower end RISC-V cores. I expect half of them to fold, and half of them to turn into consulting ships for RISC-V and fabless design in general.
- projektfu 6y agoIsn't z/Architecture just emulated on top of POWER? That's been my impression for a while.
- monocasa 6y agoThey share RTL, but it's not just a POWER core with a z/Arch frontend.
- dfox 6y agoYou probably mean "TIMI" which is the user-visible ISA of IBM's "midrange" systems (ie. AS/400 or System/i) which was from the start meant as virtual machine ISA that is then mostly AOT transpiled into whatever hardware ISA OS/400 or i5/OS runs on. z/Architecture (S/360, ESA/390, what have you...) is distinct from that and distinct from PowerPC. Modern POWER and z/Architecture CPUs and machines are somewhat similar when you look at the execution units and overall system design, but the ISA is completely different and even the performance profile of the mostly similar CPU is different (z/Architecture is "uber-CISC" with instructions like "calculate sha256 of this megabyte of memory").
- monocasa 6y ago
- justicezyx 6y agoThis is indeed huge. Should open the path for the modernization of the auto chip industry, according to [1], 80% of ADAS chips are based on mips. [1] https://www.globenewswire.com/news-release/2019/02/28/1744607/0/en/Wave-Computing-s-MIPS-Processors-Power-80-of-Today-s-ADAS-Enabled-Automobiles.html https://www.globenewswire.com/news-release/2019/02/28/174460...
- steviedotboston 6y agoso basically the same architecutes that have been widely deployed for the past 20+ years?
- mortenjorck 6y agoThis is more or less analogous to Blackberry moving to Android, isn’t it? Storied, old-guard tech company loses most of its market share, trades in its first-party stack for a rising open-source alternative. Is MIPS still a big enough name to make this much of a coup for RISC-V? Or is this the last-ditch effort of a fallen star of the semi market?
- abrowne 6y agoThey're even changing the name of the company to MIPS, just like RIM → Blackberry (https://news.ycombinator.com/item?id=26389870 https://news.ycombinator.com/item?id=26389870 One big difference is most consumers, and I think even many companies using the chips, don't really care what architecture they are using, unlike with an end-user OS/"ecosystem". So if they can use their abilities and experience from MIPS to make RISC-V chips with good price to performance, they could do OK.
- MisterTea 6y ago> Is MIPS still a big enough name to make this much of a coup for RISC-V? Or is this the last ditch effort of a fallen star of the semi market? Mips has seemingly been on life support sine the late 90's. I kind of think the SGI buyout and later spin-off doomed them as they were focused on building high performance workstation processors while Arm was busy focusing on low power and embedded systems. Guess who was better prepared for the mobile revolution of the 00's?
- mikepurvis 6y agoIt's interesting that that's where they've been focused, because my only exposure to MIPS chips has been in low-cost Mikrotik routerboards, eg: https://mikrotik.com/product/RB450 https://mikrotik.com/product/RB450
- tyingq 6y agoI imagine MIPS (via Atheros, Broadcom, etc) was broadly deployed in things like home routers because it was royalty free, power efficient, and already had Linux kernel mainline support. Though probably losing share to ARM now.
- Andrex 6y agoMy historical skepticism on the acceptance and proliferation of RISC-V looks more antiquated by the day. No real dog in the fight, but I would love to see this take off like ARM did.
- deleted 6y ago[deleted]
- buescher 6y ago"Development of the MIPS processor architecture has now stopped" Is anyone still developing SPARC?
- znpy 6y agoNo one worth mentioning AFAIK.
- tyingq 6y agoFujitsu for general purpose servers, and Atmel (maybe others too?) for rad-hardened Sparc.
- zokier 6y ago> Atmel Microchip these days, Atmel got acquired few years back.. The packaging looks cool of those https://www.microchip.com/wwwproducts/en/AT697F https://www.microchip.com/wwwproducts/en/AT697F
- tyingq 6y agoThat is an interesting look. There's an 8 bit ATMEGA like that too: https://www.microchip.com/wwwproducts/en/ATmegaS128 https://www.microchip.com/wwwproducts/en/ATmegaS128 I wonder what that form factor with the chip suspended like that actually does for it.
- Gracana 6y agoThat's how it's packaged prior to trimming and lead forming, which looks like this: https://www.youtube.com/watch?v=4CfEN5R13w4 https://www.youtube.com/watch?v=4CfEN5R13w4
- deleted 6y ago[deleted]
- Symmetry 6y agoGiven that Fujitsu has jumped ship to ARM for their supercomputers I wonder if they'll be doing so with their other hardware as well?
- st_goliath 6y agoI just read the official statement[1] that's linked to in the article. Just so I get this straight: Wave Computing, the company that bought the remains of MIPS, is now (after bancruptcy) spinning it off as a separate company, that is going to work under the name MIPS, holds the rights to the MIPS architecture, but is doing RISC-V? [1] https://www.prnewswire.com/news-releases/wave-computing-and-mips-emerge-from-chapter-11-bankruptcy-301237051.html https://www.prnewswire.com/news-releases/wave-computing-and-...
- moistbar 6y agoThat's what I got from it, but I have to say I don't understand the decision to throw away such a storied architecture as MIPS. I mean come on, the N64 runs on it!
- Narishma 6y agoPS1, PS2 and PSP also used MIPS processors and were each much more successful than the N64.
- throwaway_6142 6y agoAtmel
- bitwize 6y agoWave Computing is changing its name to MIPS, like how Tandy changed to RadioShack.
- zokier 6y agoThe progression of headlines is funny: 1) MIPS Strikes Back: 64-bit Warrior I6400 Arrives https://news.ycombinator.com/item?id=8258092 https://news.ycombinator.com/item?id=8258092 We are still in the game 2) Linux-running MIPS CPU available for free to universities – full Verilog code https://news.ycombinator.com/item?id=9444567 https://news.ycombinator.com/item?id=9444567 Okay, we are not doing so great, maybe we can get young kids hooked? 3) MIPS Goes Open Source https://news.ycombinator.com/item?id=18701145 https://news.ycombinator.com/item?id=18701145 Open Source is so hip and pop these days, lets do that! 4) Can MIPS Leapfrog RISC-V? https://news.ycombinator.com/item?id=19460470 https://news.ycombinator.com/item?id=19460470 Yeah, sure, that'll happen 5) Is MIPS Dead? Lawsuit, Bankruptcy, Maintainers Leaving and More https://news.ycombinator.com/item?id=22950848 https://news.ycombinator.com/item?id=22950848 Whoops 6) Loose Lips Sink MIPS https://news.ycombinator.com/item?id=24402107 https://news.ycombinator.com/item?id=24402107 And there is the answer to the question from previous headline And now we are here.
- rwmj 6y agoI have one of the purple MIPS SBCs from back when MIPS was briefly owned by Imagination (https://en.wikipedia.org/wiki/Imagination_Creator https://en.wikipedia.org/wiki/Imagination_Creator https://elinux.org/MIPS_Creator_CI20 https://elinux.org/MIPS_Creator_CI20). Slow as hell even back in 2014. I wonder if one day it'll be a museum piece :-?
- ChuckMcM 6y agoYes it will. You should preserve it and/or donate it once you no longer want or need it.
- Zenst 6y agoNot any time soon as can still buy them: https://uk.rs-online.com/web/p/single-board-computers/1253305/ https://uk.rs-online.com/web/p/single-board-computers/125330...
- jhallenworld 6y agoI have a tube of IDT R3041s and R3051s. I remember using GCC compiled for a DECStation 2000 to write code for them. (I made a hand-held computer based on R3041). I also have a tube of ARM 610s (VY86C060s I think) from the same project, but R3041 was PLCC, whereas ARM was fine pitch PQFP. PLCC was easier to deal with at the time...
- MaxBarraclough 6y agoEveryone's right to celebrate the success of RISC-V, but part of me thinks it's a shame that there's relatively little architectural diversity (edit I should have said ISA diversity) in modern CPUs. MIPS, Alpha, and Super-H, have all but faded away. Power/PowerPC is still out there somewhere though. Apparently they're still working on SPARC, too. [0] At least we'll always have the PS2. ...until the last one breaks, I guess. [0] https://en.wikipedia.org/wiki/SPARC https://en.wikipedia.org/wiki/SPARC
- xiphias2 6y agoWhat RISC-V achieves is architectural diversity over the boring mov, add, mul instructions: the interesting part is in vector and matrix manipulation, and while RISC-V is working on a great solution, it allows for other accelerators to be added.
- dralley 6y agoI'm curious if someone could explain the architectural differences between ppc64le and aarch64? I've always heard they are quite similar.
- tyingq 6y agoSince you mentioned ppc64le, there's also aarch64eb (arm64 in big endian mode). I saw that NetBSD supports it. It seems like support for other operating systems is limited mostly because of issues around booting...not the actual kernel or userland itself.
- arnd 6y agoMIPSr6, aarch64 and riscv are siblings born from MIPSr5 plus the best of other RISC architectures. ppc64le and 32-bit Arm are part of the wider family, but have some notable differences that make them slightly less RISC-like. Both include e.g. more complex condition code handling and instructions that operate on more than three registers.
- Fordec 6y agoWe need diversity for solving different problems, not for diversity sake. What problem did MIPS solve in a unique way that others didn't? Because it wasn't desktop, mobile, embedded, graphics or AI.
- synergy20 6y agoIt could preempt RISC-V long time ago by doing this. I hope it's not too late. MIPS is still used in routers and set-top-boxes, but the steam is running out quickly, nearly all routers/set-top-box new design are now using ARMs already. There is a last hope though.
- ChuckMcM 6y agoIt was unclear if "v8" of the MIPS architecture is a re-branded RISC-V or if v8 MIPS is a combined RISC-V + MIPS or what.
- esturk 6y ago"In this context, the “8th generation” refers to seven generations of the traditional MIPS architecture, followed by an upcoming RISC-V design. It sounds like the company is implying that this is a smooth transition with some level of compatibility between the old and the new. It isn’t. It’s a clean break as the company switches from the old CPU design, that it owned, to a new one that’s in the public domain."
- arnd 6y agoMips R6 (Warrior m62xx/i6400/i6500/p6600) was already somewhat incompatible with R5 and earlier, the seventh generation nanomips i7200 was incompatible with that again.
- deleted 6y ago[deleted]
- moonbug 6y agoIf synthesisable MIPS cores from R3k to R20k enter the public domain, that would be something special. based on how previous such "announcements" have turned out, it's not gonna happen this time either.
- throwaway81523 6y agoActual source: https://www.eejournal.com/article/wait-what-mips-becomes-risc-v/ https://www.eejournal.com/article/wait-what-mips-becomes-ris...
- nickysielicki 6y agoThis article from 2015 ("The Death of Moore’s Law Will Spur Innovation: As transistors stop shrinking, open-source hardware will have its day") is getting better and better with age. https://spectrum.ieee.org/semiconductors/design/the-death-of-moores-law-will-spur-innovation https://spectrum.ieee.org/semiconductors/design/the-death-of...
- KirillPanov 6y agoJust the opposite, really. As the cost of continuing Moore's Law approaches infinity yes, it will cease to continue. But not before all but one foundry has been driven out of business. And then that one remaining foundry will dominate the entire chip industry. Also: they'll treat startups like dogshit unless they use automatic place-and-route. So chip startups will be reduced to glorified FPGA jockeys. Hard to differentiate when all you're allowed to do is sling Verilog.
- einpoklum 6y agoDoes this mean that design features from MIPS can now be adopted / adapted in RISC-V? Or is it just a no-longer-used ISA and chip designs that become freely usable?
- tyingq 6y agoThe MIPS name was originally was an acronym for "Microprocessor without Interlocked Pipeline Stages". The RISC-V docs that I've skimmed seem to show quite a lot more hardware pipeline interlocking than the last gen MIPS processors. So the name is a bit funny now.
- monocasa 6y agoIt's a lot harder to have pipeline stages and no interlocks when you don't have delay slots.
- xony 6y agoarticle not loading , might be blocked ISP here
- p1mrx 6y agoMirror: https://archive.is/S1s80 https://archive.is/S1s80
- musicale 6y agoThere's a lot to like about MIPS. It's a perfectly usable RISC architecture that: - is easy to implement - is supported by Debian, gcc, etc.. - is virtualizable - scales from embedded systems (e.g. compressed MIPS16 ISA) up to huge shared-memory multiprocessor systems with hundreds of CPUs Like RISC-V, MIPS traces its lineage to the dawn of the RISC revolution in the 1980s, though on the Hennessy/Stanford side rather than the Patterson/Berkeley side. And it was supposed to go open source: https://www.mips.com/mipsopen/ https://www.mips.com/mipsopen/ but that effort sadly seems to be dead: http://mipsopen.com http://mipsopen.com That's really too bad. MIPS doesn't deserve to die. Fortunately as mentioned above it will live on as long as there are PS2 consoles or emulators around.
- hamburglar 6y ago- the NOP instruction is 0x0 :)
- TorKlingberg 6y agoI don't know if MIPS is the same, but I worked on an other architecture where NOP is 0x0, and it had an interesting effect. If you called an uninitialized function pointer, and it happened to point into zero:ed out memory, the CPU would execute NOPs for a good while until it hit something else. If that something else was code, it would start executing some function from the start, but with garbage arguments. It would often get quite far in and several functions calls down before something crashed. Made for fun stack traces and interesting debugging :-)
- tachyonbeam 6y agoSeems like a better design choice would be to have instruction 0x0 throw some kind of page fault violation or other exception the OS can catch then.
- kindall 6y agoShades of the 6502, where 0 was BRK
- pacman2 6y agoLoongson still does MIPS. They are a little bit vaporware, even hard to get in China. https://en.wikipedia.org/wiki/Loongson https://en.wikipedia.org/wiki/Loongson
- arnd 6y agoThe next "loongarch" generation was already announced to move away from mips as the underlying ISA but instead allow running mips, arm64, risc-v, and x86 code in hardware assisted emulation.
- pabs3 6y agoA link about Loongarch: https://www.zhihu.com/question/414069789 https://www.zhihu.com/question/414069789
- ThinkBeat 6y agoI started assembly programming on early x86 chips. Then I landed a job programming MIPS chips. They were so much easier to work with in assembler than x86. I was quite impressed. Then came the SGI Indy for me. Good times. Sorry to see them go.
- brucehoult 6y agoIn 2010 MIPS wanted $2 million from Berkeley to allow them to use the MIPS instruction encodings for processor cores that Berkeley would design entirely themselves. So they made up their own encodings instead. The rest is history. In many ways modern MIPS and RISC-V are pretty much just different binary encodings of the same ideas. [this was already posted as a comment in a thread, but on reflection it probably deserves its own]
- segfaultbuserr 6y ago> In 2010 MIPS wanted $2 million from Berkeley to allow them to use the MIPS instruction encodings Do you have a source for that? I see that you're a RISC-V expert, and I know MIPS, Inc. is notorious for patent lawsuits, so I trust you. I'm just curious about the Berkeley project.
- KirillPanov 6y agoPatterson always smirks when people ask him what the "V" is for, and mumbles an uncharacteristically vague reply (something about it being the fifth chip project he's worked on or something like that...) It's no coincidence that MIPS used roman numerals for its architectures, MIPS-I, MIPS-II, MIPS-III, MIPS-IV, and MIPS-V. So instead of using MIPS-V Berkeley created RISC-V. You aren't going to get anybody who was involved to say this on the record -- that they changed just barely enough to evade the licensing (instruction encoding) and trademark ("MIPS-V") problems. Openly admitting in print that it was a "minimum noninfringing change" simply invites lawsuits claiming that they were one hair's width on the wrong side of that line.
- indolering 6y agoI think you understate the level of IP vetting RISC-V has undergone. All but 6 instructions in the RV32G instruction set could be found in implementations that were at least 20 years old; the remaining six were novel [1]. RISC-V owes MIPS about as much as MIPS owes Patterson. MIPS-V was already ~15 years old when RISC-V was first used in the classroom. RISC-V purposefully paired back the layers of marketing cruft and failed experiments that had grown over Patterson et al.'s original RISC architecture. There is less confidence in the extensions, but as RISC-V turns 10 ... patent trolls had better hurry if they want to extort anyone based on the ISA alone. [1]: https://live-risc-v.pantheonsite.io/wp-content/uploads/2016/02/EECS-2016-6.pdf https://live-risc-v.pantheonsite.io/wp-content/uploads/2016/...
- joshgoldman 6y agoIf you did Nintendo 64 assembly, then you know about these guys Disclaimer: I knew someone who worked at Nintendo
- thristian 6y agoSuper Mario 64 has a character named MIPS the Rabbit[1] named after the N64's processor architecture. [1]: https://www.mariowiki.com/MIPS https://www.mariowiki.com/MIPS
- phab 6y agoI spent a summer interning with MIPS hardware when they were owned by Imagination. It's kinda odd to see something you helped make die (be killed?) like this. Strong "not with a bang but a whimper" vibes in my office today.
- notacoward 6y agoA few jobs ago, the company I worked for based their own custom processor on a MIPS core. Why MIPS? The answer I got when I asked was that it was the only affordable option. ARM in particular was called out as beyond reach financially. Years later, long after that company was gone, RISC-V came in at an even lower price point. AFAICT there's no need to look for other reasons behind this news.
- xony 6y agowrong headline
- pabs3 6y agoThere are a couple of vendors of multi-architecture CPUs where the native architecture is MIPSish and the other supported arches are MIPS, ARM, RISC-V & x86. Tachyum is one of them, here is another: https://www.zhihu.com/question/414069789 https://www.zhihu.com/question/414069789
- dsand 6y agoThat is a very interesting article. For how they aim to run existing software by binary translations to an ISA optimized for such binary translations. And how much they dread possibly being cut off from foreign foundries and ARM and x86 chips.
- cable2600 6y agoI would like to see AmigaOS ported to a RISC-V platform for new RISC based Amigas, it would be cheaper than the PowerPC Amigas.
- yaantc 6y agoIt's very good move. First, it's for embedded: if you're not designing system on chip it won't matter to you. But for those who design SoC, and who needed embedded CPU of intermediate power, it's very good news. ARM is expensive here (it's considered cheap compared to Intel, the embedded world is different). The RISC V newcomers are interesting but... new, and it always get a bit of time to bring solutions to maturity, which matters in embedded. And if ARM owns the high-end (where a design must be co-optimized for the latest advanced nodes to really shine, which is very labor intensive and costly), for the mid-range it's much more open. MIPS had a good mid-range design with the I-7200. Their problem was that the old MIPS ISA was not dense enough (larger I cache, larger Flash footprint) compared to the competition, and their compact versions not good enough. So they designed for the I-7200 a new ISA, nanoMIPS, which has "MIPS" in its name but is completely different. And guess what: nobody cared. It became another proprietary ISA, only supported by MIPS own GCC version. But still, the design was good, and in particular the LLC/coherency support is much more mature than what many newcomers offer today. Which shouldn't be a surprise, as it's the result of a long line of (good) mid-range CPUs. By evolving their design to RISC-V, MIPS will have one of (if not the) best mid-range CPU/cluster IP in the market soon for quality vs price --- depending on how fast the competition move, they're definitely not sitting still! And RISC V will solve the toolchain/tools support nanoMIPS has. If there had been such a RISC I-7200 equivalent a few year ago, I may have used it. So very nice, and I look forward for more competition in the embedded mid-range CPU IP market soon.
- Lucretia9 6y agoHopefully, they'll release the cores as OpenMIPS like OpenSPARC did.
- thr0w__4w4y 6y agoI consulted with MIPS and ARM many years ago - pre Y2K (background is microprocessor design and firmware). ARM was a little formal but easy to work with, cooperative and supportive (they opened doors and provided everything I asked for). Working with MIPS was a nightmare, every step of the way. Weren't responsive, difficult to work with, engineers were stubborn, etc. I realize these are generalizations and I'm a sample size of one. But I was plugged in at a pretty high technical level with both companies, and I remember telling my wife at the time that I thought ARM would skyrocket and MIPS would be unable to get out of its own way. Glad I bought a lot of ARM stock before most people knew about them.
- dingosity 6y agomeh. there's more to a CPU architecture than its instruction set. this isn't the "death of MIPS." far from it, it's the remaining MIPS people applying their own understanding of design to implement a CPU with the RV64 instruction set (plus extensions, presumably.) that being said... MIPS is certainly smaller than it once was. i hope there are still people around who remember how to build CPUs.