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How does Moore's law figure into this? I suspect that TSMC runs into the wall that is quantum physics at around 1-2nm. Considering that TSMC has said that they

How does Moore's law figure into this? I suspect that TSMC runs into the wall that is quantum physics at around 1-2nm. Considering that TSMC has said that they will be in full production of 3nm in 2022, I can't see 1nm being much beyond 2026-2028. What happens then? Does a stall in die shrinks allow other fabs to catch up? It appears to me that Intel stalling at 14nm is what opened the door for TSMC and Samsung to catch up. Does the same thing happen in 2028 and allow China to finally catch up?

kasperni 6y ago
Jim Keller believes that at least 10-20 years of shrinking is possible [1]. [1] https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1800 https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1800
jng 6y ago
Modern process node designations (5nm, 3nm...) are not measurements any more, they are marketing terms. The actual measure of shrinking is a lot smaller than the name would mean to indicate, and not approaching the quantum limits as fast as it may seem.
- chaorace 6y ago
  I did not know that! Though, that answer raises its own questions... If the two are entirely unlinked, what's stopping Intel from slapping "Now 3nm!" on their next gen processors? Surely some components must be at the advertised size, even if it's no longer a clear cut all-or-nothing descriptor, right? What's actually being sized down and why is it seemingly posing so many challenges for Intel's supply chain?
  - okl 6y ago
    There's a nice wiki where you can look up more detailed specs on the processes of each contender, e.g. 5nm: https://en.wikichip.org/wiki/5_nm_lithography_process https://en.wikichip.org/wiki/5_nm_lithography_process
    - amelius 6y ago
      Interesting, it says: Intel's 5-nanometer process node is expected to ramp around the 2023 timeframe.
  - ksec 6y ago
    >"Now 3nm!" on their next gen processors? Nothing. It started when Samsung were using features size just to gain competitive marketing advantage. And then TSMC had to follow because their customers and shareholders were putting a lot of pressure on them While ingredient branding is important, at the end of the day the chip has to perform. Otherwise your ingredient branding would suffer and such strategy would no longer work. Samsung are already tasting their own medicine. P.S - That "Now 3nm!" reminds me of "3D Now!" from AMD.
  - rrss 6y ago
    This article has a pretty good overview of the situation and other metrics that actually track progress: https://spectrum.ieee.org/semiconductors/devices/a-better-way-to-measure-progress-in-semiconductors https://spectrum.ieee.org/semiconductors/devices/a-better-wa...
  - cbozeman 6y ago
    I think it'll be a good thing when people stop worrying about process node technology and start worrying about performance and power usage. Intel's 14nm chips are already competitive with AMD's (TSMC's, really) 7nm chips. The i7-11700 or whatever the newest one coming out soon is called, is going to be pretty much exactly on parity with AMD's Ryzen 5000 series. So if node shrinkage is such a dramatic increase in performance and power usage, then when Intel unfucks themselves and refines their 10nm node and 7nm node and whatever-node after that, they'll clearly be more performant than AMD... and Apple's M1. Process technology is holding Intel back. They fix that, they get scary again.
    - kllrnohj 6y ago
      > I think it'll be a good thing when people stop worrying about process node technology and start worrying about performance and power usage. I think it's more that people attribute too much significance to process node technology when trying to understand why performance & power are what they are. For single-core performance the gains from a node shrink are in the low teen percentage increases. Power improvements at the same performance are a bit better, but still not as drastic as people tend to treat it as. 10-20 years ago just having a better process node was a massive deal. These days it's overwhelmingly CPU design & architecture that dictate things like single-core performance. We've been "stuck" at the 3-5ghz range for something like half a decade now and TSMC has worse performance here than Intel's existing 14nm. Still hasn't been a single TSMC 7nm or 5nm part that hits that magical 5ghz mark reliably enough for marketing, for example. And that's all process node performance is - clock speed. M1 only runs at 3.2ghz - you could build that on Intel's 32nm without any issues. Power consumption would be a lot worse, but you could have had "M1-like" single-core performance way back in 2011 if you had a time machine to take back all the single-core CPU design lessons & improvements, that is.
      - adrian_b 6y ago
        While you are right that due to their design CPUs like Apple M1 can reach the same single-thread performance as Intel/AMD at a much lower clock frequency and such a clock frequency could be reached much earlier, e.g. already Intel Nehalem in 2009 reached 3.3 GHz as turbo, while Sandy Bridge in 2011 had 3.4 GHz as base clock frequency, it would have been impossible to make a CPU like Apple M1 in any earlier technology, not even in Intel's 14 nm. To achieve its very high IPC, M1 multiplies a lot of internal resources and also uses very large caches. All those require a huge number of transistors. Implementing an M1-like design in an earlier technology would have required a very large area, resulting in a price so large and also in a power consumption so large that such a design would have been infeasible. However, you are partially right in the sense that Intel clearly was overconfident due to their clock frequency advantage and they have decided on a roadmap to increase the IPC of their CPUs in the series Skylake => Ice Lake => Alder Lake that was much less ambitious than it should have been. While Tiger Lake and Ice Lake have about the same IPC, Alder Lake is expected to bring a similar increase like from Skylake to Ice Lake. Maybe that will be competitive with Zen 4, but it is certain that the IPC of Alder Lake will still be lower than the IPC of Apple M1, so Intel will continue to be able to match the Apple performance only at higher clock frequencies, which cause a higher power consumption.
  - cglace 6y ago
    They can call it whatever they want but it will need to show huge performance improvements for anyone to actually care.
- sobellian 6y ago
  If I recall correctly from my uni days, one of the big challenges with further shrinking the physical gates is that the parasitic capacitance on the gates becomes very hard to control, and the power consumption of the chip is directly related to that capacitance. Of course, nothing is so simple and I'm sure Intel can make some chips at very small process sizes, but at the cost of horrible yield.
  - samus 6y ago
    The current state of the art seems to be 3D transistors (FinFETs, GAAFETs), which are one possible way to address the capacitance issue, and opens many design possibilities. It leads to other challenges though, for example heat dissipation.
kache_ 6y ago
moar coars
viktorcode 6y ago
Eventually, CPUs will have to focus on going wide, i.e. growing number of cores and improving interconnections.
MangoCoffee 6y ago
> I can't see 1nm being much beyond 2026-2028. What happens then? whatever marketing people come up? Moore's law is not a law but an observation. it doesn't really matter tho. we are going to 3D chip, chiplet, advance packaging ...etc.
wffurr 6y ago
Quantum effects haven't been relevant for a while now. The "nanometer" numbers are marketing around different transistor topologies like FinFET and GAA (Gate-all-around). There's a published roadmap out to "0.7 eq nm). Note how the "measurements" all have quotes around them: https://www.extremetech.com/computing/309889-tsmc-starts-development-on-2nm-process-node https://www.extremetech.com/computing/309889-tsmc-starts-dev...

kasperni 6y ago

Jim Keller believes that at least 10-20 years of shrinking is possible [1]. [1] https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1800 https://www.youtube.com/watch?v=Nb2tebYAaOA&t=1800

jng 6y ago

Modern process node designations (5nm, 3nm...) are not measurements any more, they are marketing terms. The actual measure of shrinking is a lot smaller than the name would mean to indicate, and not approaching the quantum limits as fast as it may seem.

chaorace 6y ago
I did not know that! Though, that answer raises its own questions... If the two are entirely unlinked, what's stopping Intel from slapping "Now 3nm!" on their next gen processors? Surely some components must be at the advertised size, even if it's no longer a clear cut all-or-nothing descriptor, right? What's actually being sized down and why is it seemingly posing so many challenges for Intel's supply chain?
- okl 6y ago
  There's a nice wiki where you can look up more detailed specs on the processes of each contender, e.g. 5nm: https://en.wikichip.org/wiki/5_nm_lithography_process https://en.wikichip.org/wiki/5_nm_lithography_process
  - amelius 6y ago
    Interesting, it says: Intel's 5-nanometer process node is expected to ramp around the 2023 timeframe.
- ksec 6y ago
  >"Now 3nm!" on their next gen processors? Nothing. It started when Samsung were using features size just to gain competitive marketing advantage. And then TSMC had to follow because their customers and shareholders were putting a lot of pressure on them While ingredient branding is important, at the end of the day the chip has to perform. Otherwise your ingredient branding would suffer and such strategy would no longer work. Samsung are already tasting their own medicine. P.S - That "Now 3nm!" reminds me of "3D Now!" from AMD.
- rrss 6y ago
  This article has a pretty good overview of the situation and other metrics that actually track progress: https://spectrum.ieee.org/semiconductors/devices/a-better-way-to-measure-progress-in-semiconductors https://spectrum.ieee.org/semiconductors/devices/a-better-wa...
- cbozeman 6y ago
  I think it'll be a good thing when people stop worrying about process node technology and start worrying about performance and power usage. Intel's 14nm chips are already competitive with AMD's (TSMC's, really) 7nm chips. The i7-11700 or whatever the newest one coming out soon is called, is going to be pretty much exactly on parity with AMD's Ryzen 5000 series. So if node shrinkage is such a dramatic increase in performance and power usage, then when Intel unfucks themselves and refines their 10nm node and 7nm node and whatever-node after that, they'll clearly be more performant than AMD... and Apple's M1. Process technology is holding Intel back. They fix that, they get scary again.
  - kllrnohj 6y ago
    > I think it'll be a good thing when people stop worrying about process node technology and start worrying about performance and power usage. I think it's more that people attribute too much significance to process node technology when trying to understand why performance & power are what they are. For single-core performance the gains from a node shrink are in the low teen percentage increases. Power improvements at the same performance are a bit better, but still not as drastic as people tend to treat it as. 10-20 years ago just having a better process node was a massive deal. These days it's overwhelmingly CPU design & architecture that dictate things like single-core performance. We've been "stuck" at the 3-5ghz range for something like half a decade now and TSMC has worse performance here than Intel's existing 14nm. Still hasn't been a single TSMC 7nm or 5nm part that hits that magical 5ghz mark reliably enough for marketing, for example. And that's all process node performance is - clock speed. M1 only runs at 3.2ghz - you could build that on Intel's 32nm without any issues. Power consumption would be a lot worse, but you could have had "M1-like" single-core performance way back in 2011 if you had a time machine to take back all the single-core CPU design lessons & improvements, that is.
    - adrian_b 6y ago
      While you are right that due to their design CPUs like Apple M1 can reach the same single-thread performance as Intel/AMD at a much lower clock frequency and such a clock frequency could be reached much earlier, e.g. already Intel Nehalem in 2009 reached 3.3 GHz as turbo, while Sandy Bridge in 2011 had 3.4 GHz as base clock frequency, it would have been impossible to make a CPU like Apple M1 in any earlier technology, not even in Intel's 14 nm. To achieve its very high IPC, M1 multiplies a lot of internal resources and also uses very large caches. All those require a huge number of transistors. Implementing an M1-like design in an earlier technology would have required a very large area, resulting in a price so large and also in a power consumption so large that such a design would have been infeasible. However, you are partially right in the sense that Intel clearly was overconfident due to their clock frequency advantage and they have decided on a roadmap to increase the IPC of their CPUs in the series Skylake => Ice Lake => Alder Lake that was much less ambitious than it should have been. While Tiger Lake and Ice Lake have about the same IPC, Alder Lake is expected to bring a similar increase like from Skylake to Ice Lake. Maybe that will be competitive with Zen 4, but it is certain that the IPC of Alder Lake will still be lower than the IPC of Apple M1, so Intel will continue to be able to match the Apple performance only at higher clock frequencies, which cause a higher power consumption.
- cglace 6y ago
  They can call it whatever they want but it will need to show huge performance improvements for anyone to actually care.
sobellian 6y ago
If I recall correctly from my uni days, one of the big challenges with further shrinking the physical gates is that the parasitic capacitance on the gates becomes very hard to control, and the power consumption of the chip is directly related to that capacitance. Of course, nothing is so simple and I'm sure Intel can make some chips at very small process sizes, but at the cost of horrible yield.
- samus 6y ago
  The current state of the art seems to be 3D transistors (FinFETs, GAAFETs), which are one possible way to address the capacitance issue, and opens many design possibilities. It leads to other challenges though, for example heat dissipation.

kache_ 6y ago

moar coars

viktorcode 6y ago

Eventually, CPUs will have to focus on going wide, i.e. growing number of cores and improving interconnections.

MangoCoffee 6y ago

> I can't see 1nm being much beyond 2026-2028. What happens then? whatever marketing people come up? Moore's law is not a law but an observation. it doesn't really matter tho. we are going to 3D chip, chiplet, advance packaging ...etc.

wffurr 6y ago

Quantum effects haven't been relevant for a while now. The "nanometer" numbers are marketing around different transistor topologies like FinFET and GAA (Gate-all-around). There's a published roadmap out to "0.7 eq nm). Note how the "measurements" all have quotes around them: https://www.extremetech.com/computing/309889-tsmc-starts-development-on-2nm-process-node https://www.extremetech.com/computing/309889-tsmc-starts-dev...