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IceStick Tutorial: experience FPGA design and RISC-V using $40 FPGA device
- incrudible 6y agoI've looked into FPGAs that are connected to PCIe and provide high throughput to the host, but it seems these are always in the thousands of dollars. What's preventing the FPGA AIB from becoming a commodity like a GPU? Is it just economics of scale, or are these things fundamentally more expensive?
- structural 6y agoIt's somewhat economics of scale, but also that small/cheap FPGAs are sized rather closer to what you'd expect in a microcontroller (and that is quite sufficient for many designs). Supporting PCIe and other high-speed interfaces (10Gb ethernet and beyond, etc) requires physical transceivers which look a whole lot more like "wireless communications over a PCB trace" and less like the traditional "drive a digital signal over a GPIO pin". These interfaces also typically drive requirements for data buffering as well as higher clock rates: all of these things increase size and cost. That said, you can get basic chips that will do this for much less than "thousands of dollars" - Xilinx's Artix line is optimized for low cost + relatively high numbers of transceivers compared to the number of logic cells. You'd probably be interested in a development board something like the PicoEVB, which is in the USD $200 range and provides a M.2 form factor / PCIe interface to a FPGA. The actual FPGA itself to do this can be had for less than this... but the cost of the PCB, connectors, adding DDR memory, etc., etc., do start to add up.
- mng2 6y agoThe most reasonable board for hobby PCIe (< $100) right now is probably the SQRL Acorn, it was designed for mining but it turned out to be pretty useless for that purpose. There are cheaper FPGAs with PCIe support coming onto the market, but they tend to be low on fabric since they are designed for low end applications (Lattice Crosslink NX). I think there are a few fundamental problems with FPGA compute offload. First is that, as niche products, FPGAs are always a node or two behind the leading edge, so their logic gates run slower than CPUs and GPUs; even their "hard" compute blocks are not as fast. Second, the fundamental nature of FPGAs as a "sea of logic" mean that routing delays reduce your max frequency, or make pipelining necessary thereby incurring latency. Third is memory; historically, FPGAs have not supported high-bandwidth GDDRx, and if you're crunching on something you generally want bandwidth. The latest high-end FPGAs do have HBM but they are quite expensive. So why would anyone want something that's slower and more expensive? Well, you have to be doing something special, like a lot of custom parallel processing pipelines, or with hard realtime requirements. Basically, a niche, and that doesn't lend itself to economies of scale.
- homarp 6y agoSQRL Acorn are 'second-hand' eBay only To get started once you get one, it's supported by https://github.com/litex-hub/litex-boards https://github.com/litex-hub/litex-boards https://www.element14.com/community/community/project14/hardwarehacking/blog/2020/07/13/sqrl-oak-dev-board-finishing-up https://www.element14.com/community/community/project14/hard... links to more or less everything you need to know.
- homarp 6y agoand also https://github.com/enjoy-digital/litex/wiki/Use-LiteX-on-the-Acorn-CLE-215 https://github.com/enjoy-digital/litex/wiki/Use-LiteX-on-the...
- the_only_law 6y agoI know hardly anything about actually using FPGA’s (though learning would probably make my life easier), but when I was doing research a while back I found some Lattice ones which were ~$200. No idea if they are capable of what you’d want to do.
- mciancia 6y agoThere are some chinese FPGA card that you might find interesting: https://pl.aliexpress.com/item/1005001275162791.html https://pl.aliexpress.com/item/1005001275162791.html
- mastax 6y agoThat chip is $967 on Digikey, yet that entire dev kit is $259. It's annoying that the only way to get reasonably priced FPGAs is to launder them through China.
- RantyDave 6y agoThe problem is floating point math. Mostly we want GPU's (and TPU's) to crunch floating point match really quickly. However, FP units are complicated things and take a disproportionate amount of FPGA fabric. Add to this the lower clock speed and suddenly GPU's start to look really cheap.
- egsmi 6y agoSome FPGAs are commodities. Here’s one with a PCB for $13. Can be used with an open tool chain too. I could probably find an even cheaper one if I looked harder. https://store.tinyfpga.com/products/tinyfpga-a1 https://store.tinyfpga.com/products/tinyfpga-a1 Just like with GPUs, FPGAs with bigger die areas cost more. The biggest ones are expensive, just like with GPUs.
- ajfjrbfbf 6y agoAll TinyFPGAs are sold out for now :(
- egsmi 6y agoInteresting. The AX is out but the AX1 ($15) is in stock. https://www.crowdsupply.com/tinyfpga/tinyfpga-ax-bx https://www.crowdsupply.com/tinyfpga/tinyfpga-ax-bx I suppose the price is a bit misleading because the AX also requires the $12 programmer so with shipping+tax to CA it's closer to $30 total out of pocket. Personally I use the BX because having the flash, and a bit more logic, is convenient.
- snvzz 6y agoThe AX is not iCE40, thus no icestorm support, and it is tiny. Few designs can fit in there. Do look for iCESugar on aliexpress instead.
- bit-hack 6y agoIts still blows my mind that he fit this in ~1k LUTs. I'm new to FPGA but the closest I got was about 4.5K LUTs for a comparable core. I wish there were more easy to access material about timing and size optimization for FPGA.
- homarp 6y agosee also https://github.com/olofk/serv https://github.com/olofk/serv for small core!
- throwaway08320 6y agoFOMU also provides an RV32 on an FPGA that fits inside an USB port: https://tomu.im/fomu.html https://tomu.im/fomu.html
- jnwatson 6y agoThat's pretty cool. I have an IceStick. I'll have to try it out.
- elcritch 6y agoProjects like this are getting me excited for a possible future where you can run the entire MCU in simulation. Instead of buying a given MCU for embedded and dealing with crappy weird peripheral issues, or undocumented behavior, you an choose a RISC V core and architectural implementation. Then download the core and simulate it in software with an open source qemu module with peripherals and all using an open source RTOS, perhaps with some commercial RISC-V add-ons for your project. The burn it to an fpga and test real world or if you need/want purchase an ASIC version made by a third pzrty. Of course we're probably far from that in practice but in theory it's achievable.
- btashton 6y agoYou can already do a lot with https://renode.io https://renode.io I have run a full simulation with a verilator (slooow) of a small RISC-V before I had hardware in hand.
- homarp 6y agoif you use icestudio, there is also: RISC-V CPU for OpenFPGAs - https://github.com/Obijuan/RISC-V-FPGA https://github.com/Obijuan/RISC-V-FPGA
- snvzz 6y agoWhatever you do, don't buy an icestick. They're not cost efficient. Check aliexpress for iCESugar. That's an iCE40 UP5K development board that's half the price (~$30) as the icestick and much more powerful. It also works fine with the open stack. Full disclosure: I own iCEStick, iCESugar, BlackICE MX and TinyFPGA-BX.
- homarp 6y agogit: https://github.com/wuxx/icesugar https://github.com/wuxx/icesugar icesugar maker: https://twitter.com/JohnnyW11773607 https://twitter.com/JohnnyW11773607 he has his own shop on aliexpress
- snvzz 6y ago>he has his own shop on aliexpress https://muselab-tech.aliexpress.com/store/5940159 https://muselab-tech.aliexpress.com/store/5940159 Sells a few interesting tools besides iCESugar. The nanoDLA's a cheap OSHW 24MHz logic analyzer that works with pulseview (sigrok) and is sure to be invaluable when trying to debug design issues with the FPGA.
- ruslan 6y agoOlimex iCE40HX8K-EVB is $50, it comes with 512KB SRAM chip, two buttons, two LEDs and lots of IO wired to five block connectors.
- snvzz 6y agoThanks for the tip. I'd get one if I didn't already have too many iCE40s.
- jstanley 6y agoI have dabbled with Arduinos but have never used an FPGA. Can you say whether this tutorial would still work on something that is not an IceStick? The claimed $40 is not expensive enough to put me off, and if it means I have a tutorial to learn from instead of trying to wing it on my own, it's probably worth the extra.
- ruslan 6y agoLattice has a worship $10 iCE40 series. I'm playing with iCE40HX8K at the moment (Olimex iCE40HX8K-EVB board). I was able to configure a RV32I based SoC with APB3, UART, Timer, RAM and SDRAM controller that fits in 2500 LUTs. I'm using SpinalHDL, which appeared to be a very convenient object oriented way of defining your hardware. SpinalHDL is a Scala based HDL language (Chisel from HiFive is another one, also Scala based) that compiles to a very long Verilog file which you then feed to IceStorm toolchain (Yosys) to synthesize bitstream for FPGA. It also allows to incorporate RV32I binary which deploys right into BRAM of your FPGA after startup. I think iCE40 is a very good FPGA to start learning open source design tools.
- ekiwi 6y agoIn case you have a FOMU and are interested in exploring Chisel, I recently added a simple Blink example that should help people get started: https://github.com/im-tomu/fomu-workshop/blob/master/chisel/blink/src/Blink.scala https://github.com/im-tomu/fomu-workshop/blob/master/chisel/...
- ruslan 6y agoThanks, will check it. I'm playing with FPGAs for a couple of weeks only, RISCV was a starting force for me. Currently am trying to figure our which is better SpinalHDL or Chisel. I find SpinalHDL's syntax more convenient and less verbose, but Chisel has way larger support from HiFive surrounding community.
- ekiwi 6y agoI think in general Chisel has more people working on it. However, most people using Chisel are targeting ASICs, thus Spinal HDL wins when it comes to supporting features that are important to FPGAs. Chisel also hasn't anything close to the awesome VexRiscV core which was developed for FPGAs. The most developed cores written in Chisel are much bigger and more complex as they target ASICs. See the chipyard repository which tries to lower the learning curve a little bit : https://github.com/ucb-bar/chipyard/ https://github.com/ucb-bar/chipyard/
- yudlejoza 6y agoDo we have to have a physical device? What are the best FPGA simulators?
- blackguardx 6y agoVerilator [1] converts Verilog to C++ and runs simulations very fast. You can also use 8bitworkshop [2] to simulate Verilog in the browser. I believe they use Verilator to convert to C++ and then to javascript via emscripten. [1] https://www.veripool.org/wiki/verilator https://www.veripool.org/wiki/verilator [2] https://8bitworkshop.com/ https://8bitworkshop.com/
- neurotech1 6y agoFor those who want different cheap FPGA board options, this page is a good option. Some iCE series boards included. https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards https://joelw.id.au/FPGA/CheapFPGADevelopmentBoards
- kelu124 6y agoWith a focus too on Lattice's ;) https://github.com/kelu124/awesome-latticeFPGAs https://github.com/kelu124/awesome-latticeFPGAs