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64-bit RISC-V core claims 10x better CoreMarks/Watt compared to other 3-5GHz CPU
- gchadwick 6y agoThe claims here do seem a little suspicious, for one CoreMark is not the be all and end all of benchmarks, especially if you're trying to compare yourself against the M1 and other CPUs in a similar class. You need a far broader base of benchmarks for a decent comparison (for one thing CoreMark won't give the memory system much of a workout). A big red flag is the Cortex-A9 comparison that is used, being described as the faster arm processor for CoreMark, if you go to to EEMBC's CoreMark score database (https://www.eembc.org/coremark/scores.php https://www.eembc.org/coremark/scores.php), search 'arm' a Cortex A9 part does indeed take top score. Note this are just user sumbitted scores without any real curation, searching 'arm' isn't guaranteed to give you all arm cores in the database, plus results could have errors in. Given the age of the core (it was introduced in 2007) I'd be rather surprised if the A9 was the best performing arm core on CoreMark. Though From a quick google I can't find CoreMark numbers for other arm A-class cores.
- jonplackett 6y agoIt seems to be orders of magnitude more efficient though. Is the focus on efficiency covering up that it can't scale up to be actually as fast as the m1? It all seems a bit too good to be true, what's the catch?
- toasted_flakes 6y agoSee this comment[0] from a previous submission, but long story shorts, the numbers are literally made up. [0] https://news.ycombinator.com/item?id=25263011 https://news.ycombinator.com/item?id=25263011
- gchadwick 6y ago> It all seems a bit too good to be true, what's the catch? Take a look at their press release here: http://www.micromagic.com/news/CoreMark_PressRelease.pdf http://www.micromagic.com/news/CoreMark_PressRelease.pdf They claim 11'000 CoreMarks at 4.25 GHz in what is presumably their more efficient running mode (0.8v, consuming 200 mW). That gives you 2.58 CoreMark/MHz which is quite poor even comparing against high-performance embedded, let alone the likes of the M1 (The arm M4 can achieve 3.42 CoreMark/MHz for instance). That indicates a microarchitecture that will choke on more complex workloads. I think what they've done is produce a super simple 64-bit RISC-V core they've focused on clocking as fast as possible and pushing the power down as much as possible. Does a good job on CoreMark/Watt numbers (assuming they're even correct!) but useless for any real application. Either you want a desktop/server style workload in which case their IPC, and hence total performance and efficiency, will drop through the floor, or you have something more CoreMark style in which case you don't need it running at anything like 5 GHz and you're far better off with one of the many embedded cores on the market.
- BlueToth 6y agoTheir math is incorrect. The M1 scores about 300K in Coremarks and has 8 cores => 37.500 per core. M1 consumes about 12W => 1.5 W/core and thus: 37.500 ÷ 1.5 W/core = 25 K Coremarks per Watt. But this company (or Andy Huang) is claiming M1 has 100 Coremarks per Watt! Why don’t people check their math if it sounds far off?
- imtringued 6y agoI saw multiple people (outside of HN) come up with similar numbers for the M1. The numbers are impressive (2x-3x more efficient than M1) but the extreme dishonesty makes the design look like snakeoil. If you're ahead why lie? Probably because the design isn't actually as good as the press release implies.
- ddeck 6y agoThe photo from the press release doesn't inspire much confidence. It seems that their measurements are based on what the current reading said on the screen of a $60 noname ("Hanmatek") power supply. [1] I don't now much about CPU loads, maybe it's constant and the reading is reasonably accurate, but I'd at least hope for some better measuring equipment. [1] https://www.amazon.com/Adjustable-HANMATEK-HM305-Variable-Switching/dp/B0852JZQZR https://www.amazon.com/Adjustable-HANMATEK-HM305-Variable-Sw...
- trollied 6y agoDiscussion from a few days ago: https://news.ycombinator.com/item?id=25262834 https://news.ycombinator.com/item?id=25262834
- kasperni 6y agoZDNet has a bit more background [1]. [1] https://www.zdnet.com/article/risc-v-the-linux-of-the-chip-world-is-starting-to-produce-technological-breakthroughs/ https://www.zdnet.com/article/risc-v-the-linux-of-the-chip-w...
- als0 6y agoI read the EEtimes article[1] and find it surprising that they claim to beat the Apple M1. They don't say how, though... [1] https://www.eetimes.com/micro-magic-risc-v-core-claims-to-beat-apple-m1-and-arm-cortex-a9/ https://www.eetimes.com/micro-magic-risc-v-core-claims-to-be...
- Symmetry 6y agoIt's pretty normal for lower complexity cores to be more power efficient than higher complexity cores. Many structures in a processor scale as N^2 with width in terms of both transistors and power usage.
- BlueToth 6y agoTheir math is off by a factor of 250 x, thus, their claim us strange because they didn't check their math, before publishing wrong figures!
- micmac2 6y ago“For a typical 5W device, we can implement 25 cores. Who can do 25 cores in the mobile phone industry?” I think he forgot to ask himself the really important question : who want 25 cores in a smartphone!
- jonplackett 6y agoI think you're forgetting to ask yourself if you can do 25 cores with 5w, you can have 5 cores with 1w, which would be pretty damn good in a mobile phone if it's for real!
- Symmetry 6y agoYou run into diminishing returns with screen and radio power on a cell phone pretty quickly. If your phone is sitting in your pocket in airplane mode those aren't a problem, of course, but your processor will be sleeping then anyways.
- jeroenhd 6y agoWe've already got 12 (4 fast + 8 slow) cores in mobile phones, why not more? I can see the battery life advantages of using a lot of low-power cores for background tasks like networking and I/O and reserving a few very fast cores for foreground apps. If a background music player can get one or two slow background cores while you're using your device for some heavy workload you'll see fewer context switches and better optimized L1 cache for your main task. My computer has 12 cores but runs 118 processes even when idle. Phones probably run maybe half that, but even still a high core count for even sub-gigahertz cores could bring a noticeable benefit if the OS's scheduling algorithm would be able to optimize for them.
- w0utert 6y agoJust a few low-activity OS & mostly sleeping application threads will barely fill one or two of these typical 'slow' cores you see in big.LITTLE SoC's, so what's the point of adding more of them? I don't think lack of general-purpose cores has been a problem for mobile for a long time. I see much more value in heterogeneous SoC's that integrate multiple application-specific blocks that can only do a few things but do them very, very efficiently. This is pretty much what the industry has been moving towards for the past few years anyway, the Apple M1 being a good example of that.
- alex_reg 6y ago> Who can do 25 cores in the mobile phone industry? I'm actually curious why we have not seen many-core devices. Typical desktop CPUs still only have 4-8 cores, as do mobile devices. (disregarding the many small hardware-management cores like SSD controllers, GPU management, modems, ...) Why not have many more cores with different performance profiles, that then are dedicated to various tasks. Like a bunch of low power, in-order cores for background OS management or background apps like Slack that just check for new messages and send notifications, ... Naively I would assume: * the increased hardware complexity (wiring, caches, ...) makes this both cost and power budget prohibitive * current operating systems are not really built for that world * the benefits compared to current big/little designs with two hands full of cores are not worth the effort Maybe someone knowledgable can offer more insight?
- raghavtoshniwal 6y agoThe tradeoff is to keep design complexity as low as possible while carving out sections of the chip for specialized tasks. Apple’s new M1 chip has a ‘neural processor’ that works with Tensorflow to provide a speedup. They thought it was worth the added complexity. They also have 4 low power cores for background tasks. Alot of DSP and networking tasks are handled by the modem itself. Software and Compiler toolchains are often quick to optimize for any improvements that a processor provides but the bottleneck generally is cost and complexity which don’t scale linearly.
- reader_mode 6y agoWhat do you mean ? You can get the same core design in 4 core and 64 core part with ryzen for example - the difference is price and power. Single core performance is critical and core count has rapidly diminishing returns for the majority of everyday tasks (Amdahl's law and all that). When you have independent tasks that need to run massively parallel you are better off using a different architecture because you can get better value from simpler compute units.
- Someone 6y agoHow are those “many small hardware-management cores like SSD controllers, GPU management, modems, ...” not “many more cores with different performance profiles, that then are dedicated to various tasks”?
- panpanna 6y agoNot a huge fan of these riscv posts. This one is more marketing than a technical post worthy of HN.
- quelsolaar 6y agoWell a simple CPU is much more efficient then a complex one. A modern AMD/intel uses very few gates to implement the arithmetic. we are talking ~1% of the gates actually do the work. The rest is taken up by Cashes, Schedulers, Branch predictors, Decoders, and a load of other stuff that is designed to speed up the CPU to get good single core performance. all this extra hardware takes up a lot of power. Here is an interesting thought experiment: On a large die you could (theoretically) today fit say one million Motorola 68000 Processors. If you clocked that at 5Ghz it would in theory be about 1000 times faster then a Ryzen 7 using the same power. But it would still mean that each core would be hundreds of times slower then a Ryzen core. It would be almost impossible to write programs that would utilize all one million cores effectively enough to make a program run faster on this hardware than it does on a Ryzen CPU. Right now RISC-V is very simple this means it draws very little power. The problem is that it doesn't scale. The RISC-V instruction set is not one that makes it easy to add all the optimizations that one wants to add for a high performance CPU. Its a bit like saying that an ant is more efficient than a bulldozer, yes, that's technically true, but trying to coordinating a million ants to build a road is a lot less efficient then just using a bulldozer.
- api 6y agoAren't GPUs a bit like your example but not quite as extreme? The CPU you describe would be great for embarrassingly parallel simulation, machine learning, and similar tasks. I wish there was such a thing. Another thought that I’ve had for a while is that Intel’s Itanium was maybe a good idea badly executed or before it’s time. If you really could offload a lot of that to the compiler you could in theory maintain a lot of single thread performance while having far more cores.
- quelsolaar 6y agoYes, you are correct! GPUs are essentially, very many simpler cores on a big die, and the reason it works is that the programing model is inherently parallel. (You almost always want to compute many pixels) GPU "cores" are different because they have graphics specific instructions like texture lookups. They are also different because you want to run the exact same program on many cores at once. So you have have one instruction decoder/dispatcher that control more then one core. This leads to some weird behavior, like if you have a branch in shader code, all cores may compute both branches, but then each core may mask away the result of what ever branch the specific core shouldn't have taken.
- eeZah7Ux 6y ago> Unlike Arm, the RISC-V Consortium does not compel disclosure of use. In 2021 we are likely to see many new RISC-V chips spring to life fully formed out of secret R&D labs. Sigh. So much for the openness.