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The FPS improvements on some of those games are huge, makes me think that they've also improved memory transfer efficiency as well as IPC improvements.
by burnte 6y ago
The FPS improvements on some of those games are huge, makes me think that they've also improved memory transfer efficiency as well as IPC improvements.
- CyberDildonics 6y agoWhat do you mean by "memory transfer efficiency"?
- Filligree 6y agoZen has traditionally been extremely hungry for memory bandwidth. Memory latency is bad, so processors prefetch whatever they can, but they sometimes get it wrong and fetch data that doesn't get used. This allows you to give an efficiency rating, and Intel is better here. Also means single channel Zen is a bad idea, but that doesn't stop laptop manufacturers from doing it.
- CyberDildonics 6y agoI haven't ever seen that measured or heard of that hurting memory bandwidth, do you have a link? Most programs are not memory bandwidth constrained because they aren't optimized well and are bottlenecked on memory latency. Prefetching is going to be wasted much more on programs that are hopping around in memory, which will be constrained by memory latency and far from having memory bandwidth problems. Programs that run through memory linearly with short or no branches will be using all the prefetched memory.
- cameron_b 6y agomemory bandwidth here being relative, because part of the architecture is putting a pile more cores behind a memory controller than before. Relative to previous architectures, the cores have to wait in line for more other cores if they need to grab something not in cache
- CyberDildonics 6y agoThat would be memory latency, not memory bandwidth.
- Filligree 6y agoIt's latency driven by a lack of bandwidth, as opposed to latency caused by roundtrip timing.
- CyberDildonics 6y agoThat would just be bandwidth limited and again, it takes a lot to actually do that.
- dathinab 6y agoI think in the video they said something along that line.
- ilaksh 6y agoDouble the L3 cache size and more cores in the complex.
- loeg 6y agoThey've gone from 4-core CCXes with 16 MB L3 as the atomic unit of CPUs, to 8-core chiplets with 32 MB L3. So, broadly, workloads that fit in 32MB but not 16MB will perform much better on Zen 3.
- proverbialbunny 6y agoIn the video they said they increased branch prediction quite a bit, so I imagine it has more to do with this than it does with latency.