27 ms·

Nvidia CEO Introduces Nvidia Ampere Architecture, Nvidia A100 GPU

• arcanus 6y ago
  Extending the tensor Ops to FP64 is an interesting, if not surprising, design choice. Are there many applications sure to leverage this capability? Aside from HPL, of course.
  • blopeur 6y ago
    I am suspecting that this is specifically targeted at the HPC market as the lack of FP64 has always been a hindrance to HPC deployment. You have to remember that the HPC market is $35B today. HPE makes $3B a year alone from that, maybe more with Cray acquisition. So it's no surprise that NVIDIA wants to position themselves on that market. Plus, you have too look at the long game with MLX acquisition ( heavy player in the HPC market) and Cumulus. I wouldn't be surprised to see NVIDIA trying to bypass Intel/AMD completely and offer Direct to Interconnect device. Rather than the hybrid CPU + GPU box.
    • erk__ 6y ago
      Lately they have also been working quite a bit with POWER, quite a few of the big HPC rusns on the POWER/Mellanox/NVIDIA combo. So that could also be something they look into more, instead of going with x86.
    • godelski 6y ago
      Remember too that AMD and Intel won the contracts for Aurora, Frontier, and El Cap (the three exascale machines for the DOE). I imagine MLX is a big part of getting the next contracts as well as seeing that a lot of these projects are IO bound, not compute. If you can bring supercomputing like abilities to datacenters or AI labs, that'd be a huge advantage. If you could easily split a huge model across 64 GPUs and train like it was on a single node, this would change the space.
      • fluffything 6y ago
        > Remember too that AMD and Intel won the contracts for Aurora, Frontier, and El Cap (the three exascale machines for the DOE). This isn't very surprising I think. AMD cards often have higher FLOPs than NVIDIA's, and I can imagine that they run HPL really well. I can't wait to try these systems. I want to see what the OpenMP performance there looks like for normal applications.
• krapht 6y ago
  Oof. Double-precision is only 2.5x better, which is less impressive than 20x for float. I still haven't found anything more cost-effective for double precision data processing (cost + dev time) than a rack full of used Xeons...
  • frankchn 6y ago
    The double-precision number probably best represents the generational improvement. The 20x 32-bit floating point improvement is probably achieved by comparing doing full FP32 calculations on the previous generation vs doing TF32 calculations on Ampere. This would not be an apple-to-apple comparison as the TF32 result is less precise. That said, it is probably not terribly important for deep learning at least, given the success of BF16.
    • frankchn 6y ago
      Actually it looks like the double precision number in general GPU usage only went up 25% (Volta did 7.8 TFLOPS). To get the 2.5x number, you need to use FP64 in conjunction with TensorCores, which then gets you 19.5 TFLOPS. Considering how big the die is (826mm^2 @ TSMC 7nm) and how many transistors there are, they really must have beefed up the TensorCores much more than the general compute units.
    • randyrand 6y ago
      Wow. TF32 is only 19 bits. Thats some dubious marketing.
  • raverbashing 6y ago
    I'm curious: why exactly do you need double precision digits? Not dismissing, just wondering what kind of application needs it.
    • krapht 6y ago
      Physics simulations. There's a rule of thumb that to get an n-bit accurate result after a long chain of calculations, intermediate results should be stored with 2n bits. Often using the full dynamic range of a float is necessary because the magnitude of different physical phenomena varies so wildly. I guess people do store intermediate results in floats in order to take advantage of GPU acceleration. However, once you do that, you have to be careful in your programming and pay a lot more attention to underflow, overflow, and numerical accuracy. People who write scientific software usually also aren't experts in numerical analysis. Even if the code you write reliably works with floats, the library you use might not be. It's just a huge pain to make sure everything is accurate.
• frankchn 6y ago
  It seems like the TF32 format is similar to BF16 but with 3 more precision bits (in other words, it is FP32 with 13 low-order bits dropped instead of 16). Full adders in FP units scale with the square of the mantissa bits, so if the number of mantissa bits stay the same, they can reuse the existing units. Since Nvidia already has existing FP16 units on die, using those units for TF32 calculations probably doesn't cost too much additional die area.
• Thaxll 6y ago
  Is there a video or something?
  • KaoruAoiShiho 6y ago
    8 Part playlist: https://www.youtube.com/watch?list=PLZHnYvH1qtOZ2BSwG4CHmKSVHxC2lyIPL&v=bOf2S7OzFEg&feature=emb_title https://www.youtube.com/watch?list=PLZHnYvH1qtOZ2BSwG4CHmKSV...
  • bcaulfield 6y ago
    https://www.nvidia.com/en-us/gtc/keynote/?nvid=nv-int-bnr-63829&sfdcid=GTCEV https://www.nvidia.com/en-us/gtc/keynote/?nvid=nv-int-bnr-63...
• drewg123 6y ago
  I'm confused. Is there any relationship between the recent Ampere Arm64 servers (https://news.ycombinator.com/item?id=22475036 https://news.ycombinator.com/item?id=22475036) and Nvidia's "Ampere Architecture", or is it just a case of them using the same name?
  • tylerhou 6y ago
    Same name, but Ampere the company probably came first (2017). They're both named after the famous mathematician and physicist. https://en.wikipedia.org/wiki/Andr%C3%A9-Marie_Amp%C3%A8re https://en.wikipedia.org/wiki/Andr%C3%A9-Marie_Amp%C3%A8re
    • BobbyJo 6y ago
      Ampere has been on NVidia's roadmap for the better part of a decade.
      • tylerhou 6y ago
        > Ampere has been on NVidia's roadmap for the better part of a decade. Not publicly, at least, since rumors of the "Ampere" naming surfaced around late 2017. https://www.kitguru.net/components/graphic-cards/matthew-wilson/report-claims-nvidias-next-gpu-architecture-will-be-ampere-may-debut-in-2018/ https://www.kitguru.net/components/graphic-cards/matthew-wil...
        • BobbyJo 6y ago
          Ah, I thought I remembered seeing the name on their roadmap earlier than that, but I must have been mistaken. In any case I think it's safe to say the name wasn't ripped off anyone give the names of pervious products and the timing of those rumors.
  • deleted 6y ago
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  • dijit 6y ago
• xvilka 6y ago
  Probably even more closed than ever. They tend to become more and more restrictive with every new hardware generation. I wonder where their promised open source announcement they preannounced before.
  • tyingq 6y ago
    I suspect some of it is driven by trying to keep the gaming/ai and desktop/server markets from overlapping. Market segmentation. If it were more open, that would be harder.
    • the_pwner224 6y ago
      I wanted to do GPU PCI passthrough in a VM (run Linux host, then for gaming run a Windows VM with the GPU passed through to get good performance). Nvidia disabled this for their consumer GPUs; the Nvidia drivers in the Windows VM will block this from working. It was a purely software thing; there was no reason for this aside from nvidia wanting companies to pay more for the Quadro/etc. GPUs. In addition to that, there's always the proprietary blob running in my kernel. So a few months ago I bought an AMD card for my new computer.
      • Sebb767 6y ago
        GPU passthrough is also doable pretty easily on NVidia nowadays. See here: https://wiki.archlinux.org/index.php/PCI_passthrough_via_OVMF#%22Error_43:_Driver_failed_to_load%22_on_Nvidia_GPUs_passed_to_Windows_VMs https://wiki.archlinux.org/index.php/PCI_passthrough_via_OVM... /r/VFIO on Reddit is also pretty helpful. That being said, I fully support you buying and using AMD. But no need to throw out perfectly fine hardware in case you still have NVidia lying arround.
        • diffeomorphism 6y ago
          > GPU passthrough is also doable pretty easily on NVidia nowadays. By actively working against Nvidia who could break it again at any time if they wanted to: > Starting with QEMU 2.5.0 and libvirt 1.3.3, the vendor_id for the hypervisor can be spoofed, which is enough to fool the Nvidia drivers into loading anyway. If you already have Nvidia, fine, but to me this reads as a strong reason to not buy Nvidia if you can help it.
• YetAnotherNick 6y ago
  7 times V100 performance for BERT. That is insane!
  • sk0g 6y ago
    Mind you, this is an optimised version of BERT, from what I could see in their blog post.
    • shubuZ 6y ago
      The network topology is the same, no modules are removed, etc. Of course it will be optimized to run on Ampere
      • sk0g 6y ago
        I'll link the the mention of the optimised versions, but that's not what I mean! Say earlier model XYZ trained 4 epochs per hour, and BERT trained 2 epochs per hour. Now on a single card if you can train optimised BERT for 4 epochs per hour, that doesn't necessarily mean the same card will handle XYZ at 8 epochs per hour. It's a technological achievement nonetheless, but the fact that it was heavily optimised for the new architecture, possibly beyond an extent infeasible for non-Nvidia developers, still has to be considered. [0] https://nvidianews.nvidia.com/news/nvidia-achieves-breakthroughs-in-language-understandingto-enable-real-time-conversational-ai https://nvidianews.nvidia.com/news/nvidia-achieves-breakthro...
• seemslegit 6y ago
  Yawn.
• aloer 6y ago
  For those in the industry: When a new generation like this is released, will a typical AI company replace the current GPUs? Is there a chance to acquire the older versions for private use or is it too early for that?
  • Voloskaya 6y ago
    > will a typical AI company replace the current GPUs? (Not speaking for everyone of course) No we keep the current GPUs as well, the one we throw away are several generations old (like K80s), so not very interesting. For private use, those GPUs are really not worth it. Once their used price reaches an acceptable level, you can be sure that the new general public GPUs will outperform them. For example a Titan RTX is probably still twice as cheap as V100, while only being ~20% slower. Edit: Actually a Titan RTX is about the same price as a P100 now, while being much better.
  • minimaxir 6y ago
    A fun quick of GPU pricing economics is that on Google Cloud platform, the relatively recent T4 (on Turing and has FP16 support) is cheaper than the ancient K80s. https://cloud.google.com/compute/gpus-pricing https://cloud.google.com/compute/gpus-pricing
    • tedivm 6y ago
      That's not a great comparison at all though. The K80 is a general purpose chip while the T4 is explicitly marketed as an inference chip. The K80 has more ram (super important for batch sizes during training), can access that ram faster (480 GB/s versus 320 GB/s), and is an overall more powerful chip than the T4 is.
      • minimaxir 6y ago
        Those metrics are for both GPUs on a board; the GCP K80 only uses one GPU, so those performance metrics in theory would be halved (notably, the GCP K80 has 12 GB VRAM vs. T4's 16 GB VRAM), and it's still more expensive than a T4.
    • 6y ago
• QuixoticQuibit 6y ago
  If the demonstrated speed ups translate to real world performance, then I’m truly blown away. Looks like Nvidia will be holding onto the AI crown a while longer. The only thing I wonder is how difficult is it to take advantage of some of the new arch features, such as TF32 format or sparsity tensor ops.
  • sk0g 6y ago
    Have you looked at Apex.Amp? TF32 sounds to be along similar lines, and the PyTorch usage is a breeze.
• reedwolf 6y ago
  Stealing Epic Games/Unreal Engine's thunder. If Nvidia was a human, they'd be the type to propose at someone else's wedding.
  • notact 6y ago
    So wait, the GTC keynote which was scheduled weeks/months ago, happens to follow news that Epic dropped with absolutely no warning, and apparently that counts as stealing thunder. Is that really what you are saying?
    • __alexs 6y ago
      Nvidia probably collaborated on the Epic demo but also they are aimed at two entirely different sets of customers. Nvidia's news cycle is data center updates in May, consumers/gamer updates in September.
      • chupasaurus 6y ago
        Epic demo was running on PS5 so no NVIDIA involvement there.
        • __alexs 6y ago
          Oh yes, I forgot they've entirely lost this console generation.
          • paavohtl 6y ago
            Well not entirely (and depending on what you count as this console generation): the Nintendo Switch is based on an NVidia SOC. Although that's probably not the biggest money maker.
          • fluffything 6y ago
            And the entire HPC exa-flop super computers as well.
• ethbro 6y ago
  In my experience, Jensen Huang's keynotes are unprofessional in the best possible way. I remember thinking during an entire GTC presentation "Wait, this guy is the CEO?" He seemed like an excited engineer who happened to stumble onto stage.
  • tasogare 6y ago
    > He seemed like an excited engineer Is this a bad thing? I personally avoid presentations made by CEO of big corporations as it’s usually a Bingo of all the trendy buzzwords that as in fine no meaning.
    • ethbro 6y ago
      Yes and no. When a kludged together demo fails and there's an awkward moment, sometimes a little more prep might be nice. But on the other hand, I feel better about a company focused on doing actual work rather than polishing demos.
      • dahart 6y ago
        Tech demos are notorious for failing on stage. I can’t even think of a well known CEO who hasn’t had one happen. I don’t think this has a thing to do with Jensen’s style.
    • deleted 6y ago
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  • epmaybe 6y ago
    Did you see his video before the keynote? I had a good chuckle. https://www.youtube.com/watch?v=So7TNRhIYJ8 https://www.youtube.com/watch?v=So7TNRhIYJ8
    • bredren 6y ago
      That’s a fancy kitchen.
• lowdose 6y ago
  > DGX-A100 - The First HPC System With 140 Peta-OPs Compute Shipping Now For $199,000 Crazy pricing for a chip that basically started as a game solution. Anybody actually seen these Nvidia DGX systems in the wild?
  • jamesblonde 6y ago
    We are working with 20 of them at a customer....
    • thu2111 6y ago
      Can you talk about what sort of things you're doing, in general terms? Does the new generation DGX look like a worthwhile upgrade for you?
      • jamesblonde 6y ago
        Large scale deep learning. I don't make the decision on upgrades. But if i were buying new dgx-1s, i would buy these new ones. But i wouldn't buy a dgx-1 in the first place - it is an appliance with software nobody wants. Buy a commodity server with V100s and NVLink for 66% of the price. Like HPE or somebody else sells.
  • Voloskaya 6y ago
    Yes, we use them (with V100 not A100 of course). Mind you that the full box is more than just the 16 GPUs.
  • tedivm 6y ago
    Yup- they're cheaper than renting from AWS.
• Keyframe 6y ago
  5 petaflops in DGX? That alone would put one of those babies into TOP500 top 50, and a superPOD would make no. 1, no? Well, if it could do that performance on Linpack/Rmax.
  • jl2718 6y ago
    Top500 is generally based on double precision (64 bit).
  • Miraste 6y ago
    Less than that in double precision. If my math is right, they manage around 0.4 petaflops. Their previous-gen SuperPOD was #22. If they do indeed add four of the new ones that will still put it at #1, with something like 230 petaflops.
  • jabl 6y ago
    A previous generation superPOD (with V100 GPU's) is currently at #20. Watch this space...
    • namibj 6y ago
      Yeah, use this with PCIe4 and add a dense PCIe facric. Broadcom https://www.broadcom.com/products/pcie-switches-bridges/expressfabric/gen4/pex88096 https://www.broadcom.com/products/pcie-switches-bridges/expr... and Microchip https://www.microchip.com/wwwproducts/en/PM42100 https://www.microchip.com/wwwproducts/en/PM42100 have 98/100 lane PCIe4 fabric switches to offer.
  • sabalaba 6y ago
    No, the A100 has a 19.5 TFLOP theoretical peak for SGEMM[1], real world benchmarks will likely achieve 93% of that, and so the DGX A100 will be 145 TFlops of FP32 SGEMM performance or 0.145 FP32 PFLOPS. Maybe in 72 FP64 TFLOPS. FP64 is what the TOP500 benchmaks count.[2] The 5 "petaflops" number is a creatively constructed marketing number based on FP16 TensorCore "flops", sparse matrix calculations, and then multiplying by 8x for some reason. They basically take the 19.5 FP32 TFLOPS number and multiply it by 32x to get to the claimed 624 "TFLOPS" for a single A100. 8 * 624 = 5 "petaflops". I see they get 2x by actually using FP16 instead of FP32, 2x from counting sparse matrix ops as dense ops, and 8x from somewhere else that I have no idea. [1] https://devblogs.nvidia.com/nvidia-ampere-architecture-in-depth/ https://devblogs.nvidia.com/nvidia-ampere-architecture-in-de... [2] https://www.top500.org/resources/frequently-asked-questions/ https://www.top500.org/resources/frequently-asked-questions/
• hank_z 6y ago
  Hmm, I was expecting 3080 ti.
  • DavidVoid 6y ago
    I believe the RTX 3000 series is expected to be announced in August. They usually announce their GeForce cards a few months after they announce the Quadro ones.
    • hank_z 6y ago
      Really? That's not too long to wait. Hopefully it won't get delayed by Covid-19.
• liminal 6y ago
  How does RAPIDS relate to GOAI and Arrow? It seems like the same technology keeps getting a name change...?
  • bigdict 6y ago
    Apache Arrow is used in RAPIDS.
  • roaramburu 6y ago
    GoAi was to get GPU developers on the same page and to work together to build an ecosystem for analytics on GPUs. RAPIDS is a project that was born out of GoAi to bring that ecosystem to Python. It is built on Apache Arrow (although on GPU memory), and has many of the original GoAi members like my team, BlazingSQL, and others such as Anaconda, Nvidia, and many MANY others.
• gok 6y ago
  The TensorFloat-32 results look really impressive, but yikes that is not a good name. "TensorFloat" is extremely confusable with "TensorFlow," and it would really more accurately be called a 19 bit format.
  • rrss 6y ago
    'brain floating point' is also bad, but no one cares because it's just bfloat16. If this becomes popular, it will just be tf32 or tfloat32 or something.
    • QuixoticQuibit 6y ago
      I never knew what the “b” in “bfloat” was in all these new DL chips… until today. Man that’s bad.
      • boulos 6y ago
        Disclosure: I work on Google Cloud. I wouldn't worry about it. Looks like the Anandtech article [1] doesn't either :) > bfloat16, a format popularized by Intel [1] https://www.anandtech.com/show/15801/nvidia-announces-ampere-architecture-and-a100-products https://www.anandtech.com/show/15801/nvidia-announces-ampere...
      • joaogui1 6y ago
        It's (Google) Brain float
    • solidasparagus 6y ago
      I mostly agree. But bfloat16 at least uses 16 bits. tfloat32 is a 19 bit format and that just seems like a terrible naming decision to me.
• macksd 6y ago
  The numbers for their SATURNV supercomputer are either untrue or absolutely staggering. 4.6 exaflops? #1 on the Top 500 list of supercomputers just barely passed 200 petaflops at peak performance. If you add up the entire list you only get 1.65 exaflops. And LINPACK isn't usually network-bound. How can this possibly be true?
  • KenoFischer 6y ago
    They're counting TF32, which is a 19 bit format and comparing it to FP64.
    • arcanus 6y ago
      It's tensor Ops, and so the precision might be even lower than single. It could be BF16, for example.
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  • fluffything 6y ago
    Yeah, next generation national super-computers are "pre-exascale" supercomputers. Theoretical 4.6 exaflops today is an unbelievable jump. It would be interesting to know what's the HPL perf that it can sustain.
  • thu2111 6y ago
    AI only perf vs general perf.
• person_of_color 6y ago
  Still waiting for Wave Computing to ship.
  • trsohmers 6y ago
    Well considering they are filing for bankruptcy you are going to be waiting a while...
    • rrss 6y ago
      Speaking of vapor, still waiting for rex computing to ship...
      • trsohmers 6y ago
        Me too; sadly we had silicon that ran great (We had better performance per watt for FP32 and FP64 on 28nm process vs the A100's 7nm GFLOPs/watt) but targeting a market that had 3 customers that didn't want to work with a startup, plus investors that were opposed to us going into the "risky" and "unproven" AI space. Still have 183 of the chips in my closet waiting to see the light of day :/
    • person_of_color 6y ago
      Source?
      • trsohmers 6y ago
        A very simple google search would suffice, but here: https://www.eetimes.com/wave-computing-files-for-chapter-11-protection/ https://www.eetimes.com/wave-computing-files-for-chapter-11-...
• twarge 6y ago
  They show a fictional render of the main chip surrounded by four large gold coated leadless packages. What are those supposed to be?
  • ahmedalsudani 6y ago
    Probably a heatsink
  • wmf 6y ago
    VRMs.
• zelon88 6y ago
  I always thought that a real time scalable architecture would be beneficial. It's refreshing to see someone working on it, and exciting to see that it's nVidia. I always pictured a CPU with variable bit-width. Like a 256-bit ALU that could partition itself down into 16 or 32 bit ALU's as the workload allowed.
  • wmf 6y ago
    That's been around since MMX and AltiVec. It took a while for GPUs to adopt subword SIMD though.
    • zelon88 6y ago
      SIMD works great for doing the same thing to multiple pieces of data, but it doesn't do the scaling up that I described. I'm no chip engineer, so maybe what I'm envisioning isn't possible. In essence, instead of making 4x 64-bit cores you make 128x 2-bit cores and then some architecture on the die to select groups of cores to build a processor of the required size, execute some instructions with that processor, and then disassemble the processor back into a pool of resources. So SIMD might be able to calculate two 16-bit sums on a 32 bit processor in one cycle, but the hypothetical CPU I'm describing will be able to calculate a single 128 bit sum and eight 16 bit sums in one cycle, at the same time.
      • magicalhippo 6y ago
        What you're describing is basically a modern FPGA[1]. You can wire it up as you want at runtime, and they can contain specialized hardware like hardware multipliers and fast local memory to accelerate certain workloads. [1]: https://en.wikipedia.org/wiki/Field-programmable_gate_array https://en.wikipedia.org/wiki/Field-programmable_gate_array
  • Keyframe 6y ago
    Wasn't that how early Cray's worked, with variable bit-width floats?
• 2OEH8eoCRo0 6y ago
  Better breakdown of this architecture compared to previous architectures here: https://www.anandtech.com/show/15801/nvidia-announces-ampere-architecture-and-a100-products https://www.anandtech.com/show/15801/nvidia-announces-ampere...
  • wmf 6y ago
    Even more details: https://devblogs.nvidia.com/nvidia-ampere-architecture-in-depth/ https://devblogs.nvidia.com/nvidia-ampere-architecture-in-de...
• tbenst 6y ago
  Important to remember the half-precision tensorcore misrepresentations where the 8x improvement over fp32 claimed on Imagenet with tensorcores (V100) was actually only 1.2-2x [1,2]. Furthermore, there are major precision issues with network architectures like variational autoencoders and many others. We use V100s for Richardson-Lucy like deconvolutions for example, where we have near-exact photon counts up to 10,000 per pixel. fp32 is sufficient, tf32 is not. V100 claimed 15 teraflops of FP32, A100 claims 19.5 teraflops. For most pytorch/tensorflow workflows out there, where FP32 dominates, this approximates closer to 30% improvement of last generation, which is reasonable and typical. Although FP64 does get a nice boost. [1] https://lambdalabs.com/blog/best-gpu-tensorflow-2080-ti-vs-v100-vs-titan-v-vs-1080-ti-benchmark/ https://lambdalabs.com/blog/best-gpu-tensorflow-2080-ti-vs-v... [2] https://www.pugetsystems.com/labs/hpc/TensorFlow-Performance-with-1-4-GPUs----RTX-Titan-2080Ti-2080-2070-GTX-1660Ti-1070-1080Ti-and-Titan-V-1386/ https://www.pugetsystems.com/labs/hpc/TensorFlow-Performance...
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  • XCSme 6y ago
    I am not that much into ML, just fiddled with it a bit, is tf32=fp16?
    • tbenst 6y ago
      Not quite, but close. “tf32” is 18 bits, but with the same 10 bits of exponent that fp32 has. It’s the range of fp32 with the precision of fp16. It’s a shame to see such unoriginality in new number representations. I’d much rather see Posit hardware acceleration: https://web.stanford.edu/class/ee380/Abstracts/170201-slides.pdf https://web.stanford.edu/class/ee380/Abstracts/170201-slides...
      • rajnathani 6y ago
        TF32 is 19 bits, not 18 bits. There's an additional bit for sign. https://blogs.nvidia.com/blog/2020/05/14/tensorfloat-32-precision-format/ https://blogs.nvidia.com/blog/2020/05/14/tensorfloat-32-prec...
• jzer0cool 6y ago
  Nvidia is one of the major GPU suppliers (as well as AMD and others) as there are more compute needs in autonomous vehicles, robotics, etc. For future demand, will there be more increases in demand for CPU's (or decrease here in favor of GPU's), GPU's or some development other favorable processing unit? Google had TPU's mentioned a few years back as one example. So curious to know what market segments would likely increase, which would require such processors to fill the increased demand for those units.
  • akelly 6y ago
    For dedicated neural network use cases like vehicles, robots, and datacenters, dedicated accelerator chips are going to be huge. Tesla's been shipping custom silicon for a while, I'd be surprised if Waymo cars didn't have a TPU in them, and there's like a dozen companies making AI accelerators but as far as I know, none of them are for sale yet.
  • bonestamp2 6y ago
    In general computing, FPGAs will likely see a rise in popularity (latest mac pro offers an FPGA card as an option). In task specific computing, GPUs and ASICs will likely lead. Tesla replaced their Nvidia GPUs over a year ago with a custom chip (I believe they hired a chip designer away from Apple to develop their own silicon).
• throwawaysea 6y ago
  I know this isn't a traditional supercomputer and these aren't LINPACK benchmarks, but I am still blown away by the 5 petaflops figure, considering where we were just 10 or 15 years ago.
• chodeboy 6y ago
  Fun fact: nVidia CEO Jensen Huang and AMD CEO Lisa Su are niece and uncle. They both are hardware engineers by trade and both wear leather jackets during presentations (although she took after him). Must make for some interesting holiday family dinner talks.
• jayd16 6y ago
  No one is talking about it but the mention of a focus on "datacenter computing" (in the video) with CUDA is interesting. In retrospect a GPU is basically running a map/reduce type workflow so its not that crazy after all. Is this new or is CUDA already being used as a distributed language?
  • massaman_yams 6y ago
    cuDF has supported Dask for distributed processing for a while now, maybe a year or two?
• lustigmacher 6y ago
  Does anyone know what kind of GPU support for Spark is mentioned in this announcement? Are they talking about existing XGBoost acceleration, or is it something general-purpose?
  • T-A 6y ago
    At first glance, it seems general purpose: https://www.zdnet.com/article/nvidia-and-databricks-announce-gpu-acceleration-for-spark-3-0/ https://www.zdnet.com/article/nvidia-and-databricks-announce... "based on the open source RAPIDS suite of software libraries" […] "will allow developers to take their Spark code and, without modification, run it on GPUs instead of CPUs" https://rapids.ai/ https://rapids.ai/
  • zetazzed 6y ago
    This goes beyond the existing Spark+XGBoost GPU acceleration to include ETL, Spark SQL, etc. Coming for Spark 3. Full details here: https://www.nvidia.com/en-us/deep-learning-ai/solutions/data-science/apache-spark-3/ https://www.nvidia.com/en-us/deep-learning-ai/solutions/data...
• baybal2 6y ago
  Have to admit again, Huang is an amazing salesman
• tpmx 6y ago
  I'm mostly just amazed by that... what is it, that ivory thing above/around his stove? Is this a thing newly rich americans have in their kitchens?
  • deleted 6y ago
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• madengr 6y ago
  Did anyone notice that PCB? 50 pounds, 30k components, 1M drill holes, and 1 km of traces. Pretty much blew my mind.