4 ms·
But realistically it can't go on much longer, right? The diameter of a silicon atom is like 0.21 nanometers, so we're almost within an order of magnitude from
by marvy 7y ago
But realistically it can't go on much longer, right? The diameter of a silicon atom is like 0.21 nanometers, so we're almost within an order of magnitude from rock bottom, right? I don't actually know anything about this stuff so I could be hopelessly confused, but that's my impression.
- stefan_ 7y agoRemember this nm number has nothing at all to do with physics and is now purely a marketing term.
- mcchew 7y agoCan you clarify? I thought the number was still the length of the transistor.
- judge2020 7y agohttps://en.wikichip.org/wiki/technology_node https://en.wikichip.org/wiki/technology_node > Historically, the process node name referred to a number of different features of a transistor including the gate length as well as M1 half-pitch. Most recently, due to various marketing and discrepancies among foundries, the number itself has lost the exact meaning it once held. Recent technology nodes such as 22 nm, 16 nm, 14 nm, and 10 nm refer purely to a specific generation of chips made in a particular technology. It does not correspond to any gate length or half pitch. Nevertheless, the name convention has stuck and it's what the leading foundries call their nodes.
- variaga 7y agoFor processes >= 40nm, the number is the gate length of the transistor. For smaller processes, the number is (approximately) the equivalent gate length that would result in the same transistor density (transistors per mm^2) as if the gate length had been reduced to that size, assuming everything else was scaled proportionately. The trick is, not everything else scaled proportionately. The gate lengths (mostly) stopped shrinking at around 34nm but other things kept shrinking, so the overall transistor density kept going up. (And that assumes planar transistors. Things like FinFET or nanowire which make the transistor structure 3d instead of 2d further disconnect the gate length from the achievable density.)
- Dylan16807 7y agoNot nothing. The sizes of various aspects of the process are still roughly correlated with the number, even if they're 2x or 3x that size.
- agumonkey 7y agoWho knows, maybe work at 5/3nm will give people new ideas.
- PaulHoule 7y agoPast that, it is various forms of chiplets, 3-d stacking, high bandwidth memory to intensify densification at some cost. In the wings there are a few semiconductor materials, from Si-Ge to In-P and Ga-A and Ga-N that are used in optical transceivers, cell phone base stations, power electronics, and military electronics. Silicon is a good, not great superconductor, and it dominates because we are good at making things out of Silicon. An In-P microprocessor as complex as a 6502 should be able to clock upwards of 80 GHz and could run with a fully populated address space of static RAM on the chip and be able to react to fast events in real time like nothing else. Such a chip would replace 16 5GHz cores for more mainstream computation, so if cost gaps narrowed, the In-P part might compete with a Si part in a complex chiplet architecture. (e.g. the In-P chip can be built at 1/16 the density of the Si chip and not have all this multiple-patterning and lasers trouble that Si is getting into)
- vardump 7y ago> An In-P microprocessor as complex as a 6502 should be able to clock upwards of 80 GHz and could run with a fully populated address space of static RAM on the chip and be able to react to fast events in real time like nothing else. > Such a chip would replace 16 5GHz cores for more mainstream computation,... 80 GHz 6502 would be about as fast as... 1 GHz x86 in integer operations, and even that is being generous. Floating point would be several orders of magnitude worse than even that. Typical X86 can do 64 8-bit SIMD operations per clock, 2x AVX2 instructions retired in a single clock cycle. At over 4 GHz. But it'd sure be a beast in real-time applications... assuming signal integrity is a solvable problem.
- Dylan16807 7y ago> But it'd sure be a beast in real-time applications... assuming signal integrity is a solvable problem. I'd be skeptical about whether it beats an FPGA.
- vardump 7y agoAgreed, FPGA would be my go-to solution as well. Although FPGAs certainly can't touch gigahertz+ range yet. Even 500 MHz is... challenging.
- imtringued 7y agoThat has nothing to do with Moore's Law which is about the number of transistors on a chip. The process nodes are named so that halving the size of process node will result in increasing the number of transistors by 4x within the same area. The problem with measuring physical features of a transistor is that once you change the design of the transistor multiple times [0] it no longer becomes meaningful to measure one specific dimension. As you can see the gate size barely changes but the transistor count keeps increasing drastically. [0] https://www.hwsw.hu/kepek/hirek/2017/03/planar_finfet_gaa.jpg https://www.hwsw.hu/kepek/hirek/2017/03/planar_finfet_gaa.jp...