7 ms·

What happened to Intel? Have they given any official explanations yet? How does a company, who for decades has been 1-2 node processes ahead of the industry, s

What happened to Intel? Have they given any official explanations yet? How does a company, who for decades has been 1-2 node processes ahead of the industry, suddenly gets 1-2 node processes behind everyone else. There must be an amazing story behind this that no one seems to be digging into.

aw1621107 8y ago
The explanation I've seen most frequently is that process sizes aren't really comparable between fabs any more. In this case, that would mean that Intel's 10nm process is equivalent to another fab's 7nm process.
- berbec 8y ago
  I'm not trying to be snarky; I actually don't understand. Isn't a nanometer the same between fabs?
  - wolf550e 8y ago
    Read this and follow links: https://en.wikichip.org/wiki/7_nm_lithography_process https://en.wikichip.org/wiki/7_nm_lithography_process
    - the8472 8y ago
      Those differences seem enormous. SRAM bitcell, High-Density (HD) A Intel 14nm: 0.064 µm² B Intel 10nm: 0.0312 µm² C TSMC 7nm: 0.027 µm² A is what most current intel chips use, B is in limited production. C is what AMD will be using in 2019
      - PedroBatista 8y ago
        Is B even in production at all?
        matthewmacleod 8y ago
        AFAIK there's a single 10nm Intel processor available – the Core i3-8121U. Performance is sub-14nm though.
  - detaro 8y ago
    It is. But what exactly you measure in nanometers is different, depending on how you define the "size of the structures"
  - aw1621107 8y ago
    A nanometer is indeed a nanometer. The question is what exactly is being measured, and that is what differs.
  - mikeash 8y ago
    A nanometer is the same everywhere, but what you’re measuring isn’t. When they say 7nm, are they talking about the smallest feature they can produce, the minimum wire size, the minimum transistor size, the average transistor size, or...? For an analogy, a GHz is a GHz everywhere but that doesn’t mean a 3GHz CPU is always faster than a 2GHz CPU.
    - gisely 8y ago
      If AMD can suggest that they are on smaller process size because they are measuring a smaller feature, why wouldn't Intel just start measuring the same feature on their chips? I have trouble believing they would stick to some principle about what is the right feature to measure at the cost losing out on marketing themselves.
      - zamadatix 8y ago
        They might, just like the MHz marketing wars. But for now consumers don't care about "7nm" as a marketing figure enough for them to care if it's actually 7nm or not.
      - wtallis 8y ago
        7nm does not refer to any feature size. Process node names have continued to follow the pattern of the next node being named as roughly the current node divided by sqrt(2), even though density increases are no longer coming from simple uniform horizontal shrinks.
  - mooman219 8y ago
    Nanometers is a marketing term now, just like frequency used to be a marketing term when talking about CPUs. In reality, size of various features in a CPU differ widely. Intel 10nm could have a transistor gate pitch of 50nm, while TSMC 7nm could have a pitch of 60nm. All the meaningful parts you care about, like size of the transistor components and interconnects, are _not_ small, and it every company designs their own tweaks on these building blocks for reliability/manufacturability/performance/power/etc.
  - atq2119 8y ago
    Like others wrote, there's no longer a standard for what the measurement actually means. Most structures aren't actually 7nm in a 7nm process. For example, a typical metal pitch on the low metal layers is 40nm, meaning you get one wire every 40nm, or 25 wires in parallel in a 1um channel. What Intel is calling 10nm does indeed appear to be close to the others' 7nm. Then again, Intel is seriously behind on 10nm, so the bottom line remains the same: they seem to have essentially lost their process advantage.
    - JohnJamesRambo 8y ago
      Then why do they continue to use it at all? It's like measuring your electric car in the number of pistons it has. We all agree process node numbers are meaningless now so why do we keep using it? How about a number that actually relates to the performance and can be measured?
      - atq2119 8y ago
        My best guess is a combination of historical inertia and the fact that the names are actually meaningful, just not in the way that one might naively expect as an outsider. When the foundry sends you a design kit which contains all their design rules and tooling around a process, then this process has some codename that appears everywhere (think filenames, names of library elements, and so on). This codename tends to be something like GF14 (for GlobalFoundries' 14nm) or N7 (for TSMC's 7nm) plus cryptic suffixes for different revisions of the foundry process. So the 14/12/10/7nm terms are actually part of the design engineers' everyday work flow. They just also filtered through to marketing for whatever reason. I could imagine that at some point in the future, foundries will switch to a year-based versioning similar to what happened with a lot of software. So you'll have a GF2027 process and so on. That's pure speculation on my part though, and inertia is definitely a thing.
- sureste 8y ago
  Who's explanation is this? Do you have a link?
  - aw1621107 8y ago
    Unfortunately, I don't know. As I said, it's just the explanation I've seen most frequently when browsing HN, and I'm not knowledgeable enough to know where to find reliable sources. Sorry.
- tambourine_man 8y ago
  Yeah, but that's not a good one, since they have been using the same process for 4 years if I'm not mistaken. Whatever metrics are used, they are stuck on it for way longer than they should.
  - aw1621107 8y ago
    Yeah, I don't think anyone would argue that Intel has been having issues in recent years shrinking their process. The interesting question would be whether other fabs would end up facing similar issues with their next process node.
    - snovv_crash 8y ago
      The rumor I heard was that Intel's shrink to 14nm was pushed really hard, and as a result a lot of key talent quit. While I'm not sure if it's true, it would explain a lot.
- pdpi 8y ago
  Comparing processes between fabs might not make sense, but the real question is — does it still make sense within a single fab? If so, then it's still very much the case that Intel, for whatever reason, has been stagnant while AMD has been moving forward at a fair pace, which still lends credibility to the narrative that AMD is closing the gap and Intel is losing some of its lead. Of course, as has been the case for decades, it still remains to be seen whether this will translate into AMD taking more of the market.
  - Skunkleton 8y ago
    Is (Transistor Count / Die Size) something that produces a meaningful number?
    - pdpi 8y ago
      Not really. E.g. the AMD ZEN+ moved to a 12nm process but kept both transistor count and die size constant. They instead used the headroom to space features out and improve cooling.
      - the8472 8y ago
        You could still specify the maximum possible transistor density for the process. It doesn't mean a concrete design actually has to use it. Or make it an SRAM bit, because caches take up the bulk of the area anyway.
        blattimwind 8y ago
        Pretty much equivalent to SRAM cell density, which you can measure under a microscope.
        sevensor 8y ago
        Speaking of SRAM, it's interesting how much effort is devoted to keeping the logic busy so they don't have to spend chip area on cache.
      - 8y ago
- ksec 8y ago
  The problem is you need to be able to produce it in volume. The original projected 10nm is better than TSMC 7nm, that is assuming the 2019 10nm is still the same, which rumoured is not. Will be up against TSMC 7nm+, the next generation of 7nm. Let's just assume they are both equal in absolute terms. By Late 2019, Intel would have barely launched 10nm and possibly shipping in 30 - 50M quantity ( And I think even that is an optimistic number ). TSMC wold have shipped more than 300M 7nm across their entire 7nm generation. And TSMC has 5nm ready in 2020. I don't think Intel will have their EUV 7nm ready even in 2021. Combined with the fact there is exactly only ONE, one EUV equipment maker on the market, ASML. And they have limited capacity in producing these ASML machine. As far as I am aware all of the 2018 and 2019 capacity are already locked to Samsung and TSMC.
marcosdumay 8y ago
The end of Moore's Law happened. Intel is not behind, AMD is likely reaching it by now (as hard as it is to compare the processes). Moving ahead gets much harder the more you advance, so it may even be that Intel still has a 20 month lead from AMD, but since it is so much harder to move, the same lead becomes a small difference.
wmf 8y ago
Every semiconductor analyst has been on this story for the last two years. https://semiaccurate.com/tag/10nm/ https://semiaccurate.com/tag/10nm/
- tambourine_man 8y ago
  Without a satisfactory answer in my opinion, which is my point
  - Symmetry 8y ago
    Semiaccurate actually has some pretty detailed dives into exactly what is going wrong with Intel's 10nm but it's all subscriber only. They've also done some reporting on leadership problems inside Intel that I think make the execution failures more understandable. https://semiaccurate.com/2018/06/29/intels-firing-of-ceo-brian-krzanich-is-a-cover-for-deeper-problems/ https://semiaccurate.com/2018/06/29/intels-firing-of-ceo-bri...
    - tambourine_man 8y ago
      Thanks. I’ve heard this podcast[1] with Ashraf Eassa, which I recommend listening, but IMO still fails to paint the complete picture. Maybe we’ll only know for sure in a few years. [1]https://overcast.fm/+K8lh8cyNY https://overcast.fm/+K8lh8cyNY
ChuckMcM 8y ago
My take on it is that it is fairly complex. First there are 'node wars' where what it means to be a "10nm" process or a "7nm" process has become rather murky. This is because transistors themselves don't work well at these sizes and you start getting novel structures which make it hard to compare things. Back when all transistors were flat rectangles it was easier but now they all have some amount of a verticalness to them (FinFets) and there are various patents around this stuff and so nobody talks about 'transistor' size any more they talk about 'feature' size. But what is a feature? Is it a polysilicon line? (equivalent to a trace width on a printed circuit board) Or is it the smallest thing you can render with your lithography process? But all of that explains when you step back, what has happened to Intel. It used to be that what Intel was doing in there fabs other fabs would take 2 - 3 years to do, and they were big differences, like copper, or finfets, or smaller feature sizes. But as time goes on, the features get harder and harder to develop so when you're two years behind the difference appears smaller and smaller. What is more the cost of trying something that doesn't work out is more and more expensive and time delaying. And costs are huge here. That introduces part three of the puzzle, as fabs have been closed while companies switch to using TSMC we have gone from having a dozen semi-conductor companies spending their R&D budgets on their own process improvements in competition with Intel, to those dozens of companies sending their R&D dollars to TSMC who then in aggregate can spend more on R&D than Intel does while still being profitable enough. So the bottom line is that the market has settled out and there are just few giant foundries (Global, TSMC, Intel, Samsung, Etc.) and one of them doesn't make a business out of others use of their equipment (Intel). Worst, the biggest consumer of silicon has become phones and Intel isn't a serious player. Intel is under siege and I think they know it (they certainly act like they know it).
- petra 8y ago
  So all that past myth, of Intel being a uniquely talented company as the reason for Intel's leadership was false ? And it was mostly about the standard "experience curve", i.e. the fact that larger volumes being manufactured generally lead to better results ?
  - chrisco255 8y ago
api 8y ago
You answered your own question. They were ahead for a long time so they got complacent.
- TheCapn 8y ago
  But the story we want told is who got complacent? Was it the C-levels making budget decisions? Was it engineering staff that left for greener pastures or was it R&D decisions that ended up at dead ends with nothing to show for it? Its easy to point to the big player and say they lost their lead, but the fine details about who made decisions to land them there is the story we want told.
- wmf 8y ago
  If anything, the truth seems to be the opposite. Their 10 nm process was so aggressive (e.g. 2.7x density) that they couldn't make it work.
Symmetry 8y ago
Intel wanted to do a number of ambitious things with their 10nm node such as putting contacts over gates and using cobalt for wiring. These were gambles of the sort they had made before but this time the advances just didn't work out. Now they're trying to do a 10nm process without CoG and I hope it works out this time.
fromthestart 8y ago
I think that Intel was ahead only because their decades of dirty tricks[e.g. 1,2] gave them a sort of artificial Monopoly. 1.https://betanews.com/2005/07/13/suit-intel-sabotaged-compiler-for-amd/ https://betanews.com/2005/07/13/suit-intel-sabotaged-compile... 2.https://www.techspot.com/article/1722-misleading-core-i9-9900k-benchmarks/ https://www.techspot.com/article/1722-misleading-core-i9-990... Now AMD is (rightfully?) pulling ahead.

aw1621107 8y ago

The explanation I've seen most frequently is that process sizes aren't really comparable between fabs any more. In this case, that would mean that Intel's 10nm process is equivalent to another fab's 7nm process.

berbec 8y ago
I'm not trying to be snarky; I actually don't understand. Isn't a nanometer the same between fabs?
- wolf550e 8y ago
  Read this and follow links: https://en.wikichip.org/wiki/7_nm_lithography_process https://en.wikichip.org/wiki/7_nm_lithography_process
  - the8472 8y ago
    Those differences seem enormous. SRAM bitcell, High-Density (HD) A Intel 14nm: 0.064 µm² B Intel 10nm: 0.0312 µm² C TSMC 7nm: 0.027 µm² A is what most current intel chips use, B is in limited production. C is what AMD will be using in 2019
    - PedroBatista 8y ago
      Is B even in production at all?
      - matthewmacleod 8y ago
        AFAIK there's a single 10nm Intel processor available – the Core i3-8121U. Performance is sub-14nm though.
- detaro 8y ago
  It is. But what exactly you measure in nanometers is different, depending on how you define the "size of the structures"
- aw1621107 8y ago
  A nanometer is indeed a nanometer. The question is what exactly is being measured, and that is what differs.
- mikeash 8y ago
  A nanometer is the same everywhere, but what you’re measuring isn’t. When they say 7nm, are they talking about the smallest feature they can produce, the minimum wire size, the minimum transistor size, the average transistor size, or...? For an analogy, a GHz is a GHz everywhere but that doesn’t mean a 3GHz CPU is always faster than a 2GHz CPU.
  - gisely 8y ago
    If AMD can suggest that they are on smaller process size because they are measuring a smaller feature, why wouldn't Intel just start measuring the same feature on their chips? I have trouble believing they would stick to some principle about what is the right feature to measure at the cost losing out on marketing themselves.
    - zamadatix 8y ago
      They might, just like the MHz marketing wars. But for now consumers don't care about "7nm" as a marketing figure enough for them to care if it's actually 7nm or not.
    - wtallis 8y ago
      7nm does not refer to any feature size. Process node names have continued to follow the pattern of the next node being named as roughly the current node divided by sqrt(2), even though density increases are no longer coming from simple uniform horizontal shrinks.
- mooman219 8y ago
  Nanometers is a marketing term now, just like frequency used to be a marketing term when talking about CPUs. In reality, size of various features in a CPU differ widely. Intel 10nm could have a transistor gate pitch of 50nm, while TSMC 7nm could have a pitch of 60nm. All the meaningful parts you care about, like size of the transistor components and interconnects, are _not_ small, and it every company designs their own tweaks on these building blocks for reliability/manufacturability/performance/power/etc.
- atq2119 8y ago
  Like others wrote, there's no longer a standard for what the measurement actually means. Most structures aren't actually 7nm in a 7nm process. For example, a typical metal pitch on the low metal layers is 40nm, meaning you get one wire every 40nm, or 25 wires in parallel in a 1um channel. What Intel is calling 10nm does indeed appear to be close to the others' 7nm. Then again, Intel is seriously behind on 10nm, so the bottom line remains the same: they seem to have essentially lost their process advantage.
  - JohnJamesRambo 8y ago
    Then why do they continue to use it at all? It's like measuring your electric car in the number of pistons it has. We all agree process node numbers are meaningless now so why do we keep using it? How about a number that actually relates to the performance and can be measured?
    - atq2119 8y ago
      My best guess is a combination of historical inertia and the fact that the names are actually meaningful, just not in the way that one might naively expect as an outsider. When the foundry sends you a design kit which contains all their design rules and tooling around a process, then this process has some codename that appears everywhere (think filenames, names of library elements, and so on). This codename tends to be something like GF14 (for GlobalFoundries' 14nm) or N7 (for TSMC's 7nm) plus cryptic suffixes for different revisions of the foundry process. So the 14/12/10/7nm terms are actually part of the design engineers' everyday work flow. They just also filtered through to marketing for whatever reason. I could imagine that at some point in the future, foundries will switch to a year-based versioning similar to what happened with a lot of software. So you'll have a GF2027 process and so on. That's pure speculation on my part though, and inertia is definitely a thing.
sureste 8y ago
Who's explanation is this? Do you have a link?
- aw1621107 8y ago
  Unfortunately, I don't know. As I said, it's just the explanation I've seen most frequently when browsing HN, and I'm not knowledgeable enough to know where to find reliable sources. Sorry.
tambourine_man 8y ago
Yeah, but that's not a good one, since they have been using the same process for 4 years if I'm not mistaken. Whatever metrics are used, they are stuck on it for way longer than they should.
- aw1621107 8y ago
  Yeah, I don't think anyone would argue that Intel has been having issues in recent years shrinking their process. The interesting question would be whether other fabs would end up facing similar issues with their next process node.
  - snovv_crash 8y ago
    The rumor I heard was that Intel's shrink to 14nm was pushed really hard, and as a result a lot of key talent quit. While I'm not sure if it's true, it would explain a lot.
pdpi 8y ago
Comparing processes between fabs might not make sense, but the real question is — does it still make sense within a single fab? If so, then it's still very much the case that Intel, for whatever reason, has been stagnant while AMD has been moving forward at a fair pace, which still lends credibility to the narrative that AMD is closing the gap and Intel is losing some of its lead. Of course, as has been the case for decades, it still remains to be seen whether this will translate into AMD taking more of the market.
- Skunkleton 8y ago
  Is (Transistor Count / Die Size) something that produces a meaningful number?
  - pdpi 8y ago
    Not really. E.g. the AMD ZEN+ moved to a 12nm process but kept both transistor count and die size constant. They instead used the headroom to space features out and improve cooling.
    - the8472 8y ago
      You could still specify the maximum possible transistor density for the process. It doesn't mean a concrete design actually has to use it. Or make it an SRAM bit, because caches take up the bulk of the area anyway.
      - blattimwind 8y ago
        Pretty much equivalent to SRAM cell density, which you can measure under a microscope.
      - sevensor 8y ago
        Speaking of SRAM, it's interesting how much effort is devoted to keeping the logic busy so they don't have to spend chip area on cache.
    - 8y ago
ksec 8y ago
The problem is you need to be able to produce it in volume. The original projected 10nm is better than TSMC 7nm, that is assuming the 2019 10nm is still the same, which rumoured is not. Will be up against TSMC 7nm+, the next generation of 7nm. Let's just assume they are both equal in absolute terms. By Late 2019, Intel would have barely launched 10nm and possibly shipping in 30 - 50M quantity ( And I think even that is an optimistic number ). TSMC wold have shipped more than 300M 7nm across their entire 7nm generation. And TSMC has 5nm ready in 2020. I don't think Intel will have their EUV 7nm ready even in 2021. Combined with the fact there is exactly only ONE, one EUV equipment maker on the market, ASML. And they have limited capacity in producing these ASML machine. As far as I am aware all of the 2018 and 2019 capacity are already locked to Samsung and TSMC.

marcosdumay 8y ago

The end of Moore's Law happened. Intel is not behind, AMD is likely reaching it by now (as hard as it is to compare the processes). Moving ahead gets much harder the more you advance, so it may even be that Intel still has a 20 month lead from AMD, but since it is so much harder to move, the same lead becomes a small difference.

wmf 8y ago

Every semiconductor analyst has been on this story for the last two years. https://semiaccurate.com/tag/10nm/ https://semiaccurate.com/tag/10nm/

tambourine_man 8y ago
Without a satisfactory answer in my opinion, which is my point
- Symmetry 8y ago
  Semiaccurate actually has some pretty detailed dives into exactly what is going wrong with Intel's 10nm but it's all subscriber only. They've also done some reporting on leadership problems inside Intel that I think make the execution failures more understandable. https://semiaccurate.com/2018/06/29/intels-firing-of-ceo-brian-krzanich-is-a-cover-for-deeper-problems/ https://semiaccurate.com/2018/06/29/intels-firing-of-ceo-bri...
  - tambourine_man 8y ago
    Thanks. I’ve heard this podcast[1] with Ashraf Eassa, which I recommend listening, but IMO still fails to paint the complete picture. Maybe we’ll only know for sure in a few years. [1]https://overcast.fm/+K8lh8cyNY https://overcast.fm/+K8lh8cyNY

ChuckMcM 8y ago

My take on it is that it is fairly complex. First there are 'node wars' where what it means to be a "10nm" process or a "7nm" process has become rather murky. This is because transistors themselves don't work well at these sizes and you start getting novel structures which make it hard to compare things. Back when all transistors were flat rectangles it was easier but now they all have some amount of a verticalness to them (FinFets) and there are various patents around this stuff and so nobody talks about 'transistor' size any more they talk about 'feature' size. But what is a feature? Is it a polysilicon line? (equivalent to a trace width on a printed circuit board) Or is it the smallest thing you can render with your lithography process? But all of that explains when you step back, what has happened to Intel. It used to be that what Intel was doing in there fabs other fabs would take 2 - 3 years to do, and they were big differences, like copper, or finfets, or smaller feature sizes. But as time goes on, the features get harder and harder to develop so when you're two years behind the difference appears smaller and smaller. What is more the cost of trying something that doesn't work out is more and more expensive and time delaying. And costs are huge here. That introduces part three of the puzzle, as fabs have been closed while companies switch to using TSMC we have gone from having a dozen semi-conductor companies spending their R&D budgets on their own process improvements in competition with Intel, to those dozens of companies sending their R&D dollars to TSMC who then in aggregate can spend more on R&D than Intel does while still being profitable enough. So the bottom line is that the market has settled out and there are just few giant foundries (Global, TSMC, Intel, Samsung, Etc.) and one of them doesn't make a business out of others use of their equipment (Intel). Worst, the biggest consumer of silicon has become phones and Intel isn't a serious player. Intel is under siege and I think they know it (they certainly act like they know it).

petra 8y ago
So all that past myth, of Intel being a uniquely talented company as the reason for Intel's leadership was false ? And it was mostly about the standard "experience curve", i.e. the fact that larger volumes being manufactured generally lead to better results ?
- chrisco255 8y ago

api 8y ago

You answered your own question. They were ahead for a long time so they got complacent.

TheCapn 8y ago
But the story we want told is who got complacent? Was it the C-levels making budget decisions? Was it engineering staff that left for greener pastures or was it R&D decisions that ended up at dead ends with nothing to show for it? Its easy to point to the big player and say they lost their lead, but the fine details about who made decisions to land them there is the story we want told.
wmf 8y ago
If anything, the truth seems to be the opposite. Their 10 nm process was so aggressive (e.g. 2.7x density) that they couldn't make it work.

Symmetry 8y ago

Intel wanted to do a number of ambitious things with their 10nm node such as putting contacts over gates and using cobalt for wiring. These were gambles of the sort they had made before but this time the advances just didn't work out. Now they're trying to do a 10nm process without CoG and I hope it works out this time.

fromthestart 8y ago

I think that Intel was ahead only because their decades of dirty tricks[e.g. 1,2] gave them a sort of artificial Monopoly. 1.https://betanews.com/2005/07/13/suit-intel-sabotaged-compiler-for-amd/ https://betanews.com/2005/07/13/suit-intel-sabotaged-compile... 2.https://www.techspot.com/article/1722-misleading-core-i9-9900k-benchmarks/ https://www.techspot.com/article/1722-misleading-core-i9-990... Now AMD is (rightfully?) pulling ahead.