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Fifty or Sixty Years of Processor Development for This?
- jtbayly 9y agoI wonder what will happen to the CPU, especially if it’s not speeding up much anymore. Perhaps with Apple doing its own chips, the CPU will just have less and less of the work assigned to it.
- ianai 9y agoAt some point it was going to be germanium to replace silicon.
- resource0x 9y agoRemember GaAs? It was the Future in 1980.
- deepnotderp 9y agoHe's talking about germanium channel FinFETs, GaAs was intended to entirely replace silicon, which probably was never going to happen.
- Tobba_ 9y agoGaAs logic is probably happening at some point, just not yet. All improvements like that which would be incredibly expensive to develop will be held off on until all cheaper options have been exhausted. It does seem to be slowly moving though.
- woadwarrior01 9y agoGaAs is gallium arsenide, which still has applications in high frequency transistors.
- ScottBurson 9y agoGermanium could still come back: https://spectrum.ieee.org/semiconductors/materials/germanium-can-take-transistors-where-silicon-cant https://spectrum.ieee.org/semiconductors/materials/germanium...
- jeffreyrogers 9y agoThe problem is silicon is really cheap compared to germanium, so germanium only makes sense if the increased speed is worth the cost (which it probably isn't for almost all applications);
- ianai 9y agoWhat’s the cost factor? Ie why not have a UI germanium chip and silicon the rest of it?
- blueline 9y agoif someone figures out a way to bring EUV to mass production scale, we would afaik essentially have a clear path all the way to 3nm
- abritinthebay 9y agoThat’s a BIG if.
- martinpw 9y agoWhich still really isn't that much further considering how far we have come so far.
- guitarbill 9y agoHmm, doesn't mention ARM once. A bit of an oversight, or a convenient omission when one is advertising a new RISC instruction set for "purpose-built processors"?
- _chris_ 9y ago"Purpose-built" means you can change the ISA to suit your whims, which for ARM requires you to A) pay for an architecture license and B) pay for the privilege of changing the architecture.
- guitarbill 9y agoI'm sure RISC-V has merits, in fact as a hacker who used microcontrollers I think that would be great. Certainly ARM isn't the be-all and end-all. Technically it's not even 1 ISA, but you still know what I meant. Not mentioning the most* used architecture though? Come on. * most = number of CPUs shipped
- hinkley 9y agoAt the end of this he says transistors are now doubling every twenty years(!?) and it reminded me of another law Patterson doesn’t include in his graph: Proebsting’s Law: improvements to compiler technology double the performance of typical programs every 18 years.
- marvy 9y agoThe derivation of that law is very suspect: http://proebsting.cs.arizona.edu/law.html http://proebsting.cs.arizona.edu/law.html (go on, it's just a paragraph.) The key issue that this ignores in my opinion, is that a compiler optimization will rarely make last year's program faster, but it will make next year's program faster. Why? Because if the compiler can't make an optimization, programmers will do it by hand, even if it makes the code worse in some way. For instance, if your C compiler can't inline small functions, you would use a macro instead. When it finally starts learns to inline, your program won't get any faster, but the next version will be able to use functions in places where macros are a bad fit. Pile up enough of these optimizations, and eventually it starts to feel as if you're coding in a higher-level language than before, even though the syntax that's accepted by the compiler never changed.
- taeric 9y agoThat is an amusingly awesome claim. I thought it was accepted that algorithm improvements have sped things up more than processor advances. I suspect there is a strong argument that memory sizes has been key, but processor speeds themselves haven't necessarily advanced at the same rate as the speed we complete problems. That said, I tried quickly googling for this, but just came up with https://cstheory.stackexchange.com/questions/12905/speedup-from-algorithmic-advances-vs-hardware https://cstheory.stackexchange.com/questions/12905/speedup-f.... Looks like a good answer, but basically points out that it is complicated. For my part, it is frustrating to see so many folks rediscovering things that used to just be too expensive to do and think they have rediscovered alchemy. I say this as someone that constantly thinks to have discovered a key method. :)
- civility 9y ago> compiler optimization will rarely make last year's program faster, but it will make next year's program faster. This doesn't follow. From your argument, last years and next years programs will run the same speed (about as fast as they can). It's just that next year's programs can be cleaner in some sense... Which is interesting, because Dr. Proebsting's page also says his current interests include improving programmer productivity by removing syntactic baggage from statically typed languages.
- dannymulligan 9y agoIs there a video of this talk available anywhere?
- fouc 9y agoNot sure, but this one might be similar: https://www.youtube.com/watch?v=1FtEGIp3a_M https://www.youtube.com/watch?v=1FtEGIp3a_M
- excalibur 9y agoSo the moral of the story is that everyone with a grand vision and an ambitious project is doomed to failure, but there's still plenty of success to be had for those willing to quickly slap some junk together.
- cwp 9y agoTo put it more positively, progress is made by stringing together many small incremental improvements. Even the RISC revolution started as a special purpose project that stripped away the inessential to achieve a specific, narrow goal.
- monochromatic 9y agoMirror: https://web.archive.org/web/20180404023027/https://www.eejournal.com/article/fifty-or-sixty-years-of-processor-developmentfor-this/ https://web.archive.org/web/20180404023027/https://www.eejou...
- jaytaylor 9y agoAlso here: https://archive.is/tY5Cl https://archive.is/tY5Cl
- fouc 9y agoFound an older youtube video that touches on the same topic: https://www.youtube.com/watch?v=1FtEGIp3a_M https://www.youtube.com/watch?v=1FtEGIp3a_M
- strainer 9y agoThis should be a sobering account to the remarkably popular theory, that given enough time we should inevitably make powerful enough processors to model a universe in sufficient 'detail' that creatures within it will be convinced they live and are as important as we find ourselves, in this one.
- quickthrower2 9y agoIf I were to do that, I'd put some constraints in to limit how much the creatures can explore of that universe. For example a maximum speed at which any matter can travel, for one.
- doyoulikeworms 9y agoWhy does this universe have a speed limit? Where does it come from? What enforces it?
- irrational 9y agohttps://aeon.co/essays/why-is-the-speed-of-light-the-speed-of-light https://aeon.co/essays/why-is-the-speed-of-light-the-speed-o...
- ChrisSD 9y agoIt's simply a consequence of our physical laws rather than something that's "enforced". And Relativity tells us that anything travelling faster than that would allow information to travel back in time, thus screwing up cause and effect thus our universe wouldn't exist as it does.
- srcmap 9y ago"Moore’s Law are Dead" only for CPU. Moore's Law is alive and progressing at the same rate for GPU. Applications such AI, Crypto-Currency are leveraging that.
- martinpw 9y agoActually not true. Perhaps surprisingly, CPUs and GPUs are progressing at about the same rate if you look at the high end. GPUs are all about massive parallelism, and if you compare against high end Xeons, the CPU core count increases plus things like AVX512 & FMA means they have been scaling similarly to GPUs over the past 10 years or so. Nice analysis here (URL says 2013 but he has updated his numbers to end-2016). Looking at the graphs, you might even conclude that CPUs are improving faster in some respects. https://www.karlrupp.net/2013/06/cpu-gpu-and-mic-hardware-characteristics-over-time/ https://www.karlrupp.net/2013/06/cpu-gpu-and-mic-hardware-ch...
- eleitl 9y agoMoore's law is about constant doubling times of number of affordable transistors in semiconductor photolithography. GPUs are obviously subject to that, especially if you look at the affordable part. Moore's law scaling has been over for about three years, few people noticed.
- deleted 9y ago[deleted]
- Animats 9y agoYes, we're kind of stuck on individual CPU power. Clocks have been around 3GHz for a decade now. There are now architectures other than CPUs that matter. GPUs, mostly. "AI chips" are coming. And, of course, Bitcoin miners. All are massively parallel. What hasn't taken off are non-shared-memory multiprocessors. The Cell was the only one ever to become a mass market product, and it was a dud as a game console machine.
- std_throwaway 9y ago> There are now architectures other than CPUs that matter. You would make a killing with a CPU twice or ten times as fast. Many algorithms are only suited for single-core operation. I don't know if this will ever change. The focus has shifted to other architectures mostly because we've reached a ceiling for single-core CPU.
- Tobba_ 9y agoIt'll change if someone can manage to take the "central" out of the CPU internals. You don't necessarily need software to see anything other than a monolithic core, but having to plumb everything through one central execution unit is hugely inefficient, if anything due to the latency involved. For example, if you're performing an indirect load and hit DRAM while loading the pointer, that result has to be brought into the core, then all way back to the memory controller the same way it came. So far that's just been worked around by throwing in bigger and bigger caches, but the size of first-level cache is at a dead end for now (due to needing physical proximity). Heck, current x86 chips could be juiced quite a bit if you could take out the requirement for backwards compatibility. Instruction encoding being the obvious thing (not that it's not hip and RISC, but that it's an absolute mess that a huge proportion of the chips power has to be wasted on, and is pretty space-inefficient due to how horribly allocated things are). Less obviously just removing things like the data stack instructions (which, at least on Intel, have a dedicated "stack engine" to optimize them), the ability to read/write instruction memory directly (creates a mess of self-modifying code detection to maintain correct behaviour, and complicates L1 cache coherency a bit). Trimming transistors reduces the power consumption, which in turn means you can raise the voltage without the chip melting, and can clear up space in your critical data path.
- hyperpallium 9y agoSo Moore's Law really is dead this time. And TPU's are only faster than GPU's through lower precision. Will compute at least keep getting cheaper, perhaps through economies of scale? Is Kurzweil's magical next information technology, to carry on the exponential, anywhere in sight?
- nootropicat 9y agoImagine asics for everything. I mean everything, like implementing a javascript engine directly. The energy efficiency could go up 2-3 orders of magnitude (looking at the difference in bitcoin mining between gpus and asics). Old gaming consoles had cartridges (with memory); I can imagine a future in which complex software is transported in the same manner, except cartridges contain specialized asics. Or perhaps a step forward - a chip making device in every home, an equivalent of sorts of burning music to cd.
- iainmerrick 9y agoI mean everything, like implementing a javascript engine directly. In that case, rather than a Javascript engine, wouldn't you have an ASIC for the script itself?
- yjftsjthsd-h 9y agoYou wouldn't want a new chip per website. Maybe hardware handling of a standard library, though.
- AstralStorm 9y agoOr even just of the expensive operations like synchronization, context switches, DMA to cache from network interface... Wait. We have most of that already. :)
- _chris_ 9y agoI assume you meant to reference this, but just to make it clear, those old gaming console cartridges sometimes DID have special chips in them. Much to the horror of emulator writers a decade later, hehe. Wiki: https://en.wikipedia.org/wiki/List_of_Super_NES_enhancement_chips https://en.wikipedia.org/wiki/List_of_Super_NES_enhancement_...
- mtgx 9y ago> Consequently, the x86 processors in today’s PCs may still appear to be executing software-compatible CISC instructions, but, as soon as those instructions cross over from external RAM into the processor, an instruction chopper/shredder slices and dices x86 machine instructions into simpler “micro-ops” (Intel-Speak for RISC instructions) that are then scheduled and executed on multiple RISC execution pipelines. Today’s x86 processors got faster by evolving into RISC machines. Going by that and the graph, then we can conclude that Intel saw the rapid 90's and early 2,000's gains because it was converting its chips into RISC chips? Also, that paragraph is basically saying that Intel's architecture has an extra layer of abstraction - so now we actually see that there is indeed an "x86 bloat" and why ARM chips seem to be so much more efficient (assuming all else, including process node is equal). It also looks like Intel may have made a "mistake" going with CISC decades ago, and it tried to rectify that in the 90's.
- russdill 9y agoEarly 2000s was just cranking frequency higher and higher with longer and longer pipelines. Initially this gave higher performance, but towards the end it mainly just gave higher frequencies. Intel finally gave up on the frequency wars (longer pipelines) and instead concentrated on wider datapath/pipelines. See: Netburst vs Core. I really feel like the changeover needs it's own act.
- blattimwind 9y agoWhich is not true, since ARM processors - the faster ones anyway - use micro-ops as well. Arguably µops are not RISC, either, unless you consider "very wide instruction word whose bits map to control lines" RISC.
- Narishma 9y agoARM isn't exactly your typical RISC either.
- XenophileJKO 9y agoI seriously wonder if cryogenic computing won't break out of this. From what I hear it is very promising by several orders of magnitude both in terms of power and speed.
- hyperion2010 9y agoI heard a rumor that the big guys did the math on the energy costs for running the compressors to keep nitrogen or helium liquid and compared it to their projected cooling cost for normal computers and found that the compressors were cheaper. Trick is, apparently no one has a good story for super conducting circuit parts, so everyone has to start from scratch.
- steve_musk 9y agoWhat is the limit on creating bigger chips? If some of the money/effort was focused on being able to fab larger chips instead of decreasing feature size... I don't know much about lithography so maybe the answer is obvious to those that do.
- carlmr 9y agoIIRC it's about clock speed. Your electrical signals travel at the speed of light. If you have a 4GHz clock the signal travels at 300,000,000 m/s. Now one clock cycle is 0.00000000025s, so the light has time to travel 0.075m. That's only 7.5cm! And you need everything to be synchronized inside and get into a steady state before the next clock cycle.
- blauditore 9y agoElectrical signals don't travel at the speed of light, but your argument is still valid.
- jaytaylor 9y agoActually, they very nearly do. The speed of electricity in a 12-gauge copper wire is 299,792,458 meters per second x 0.951 or 285,102,627 meters per second. This is about 280,000,000 meters per second which is not very much different from the speed of electromagnetic waves (light) in vacuum.
- tlb 9y agoNot wires across silicon, which have higher capacitance and much higher resistance. For millimeter-long connections you might get 1/10 of C, ie 33 ps/mm instead of 3.3.
- jaytaylor 9y agoHey, that's actually really interesting, thanks for the followup! This corroborates what you're saying: https://www.reddit.com/r/askscience/comments/204hl2/at_what_speed_do_electrons_move_around_inside_of/ https://www.reddit.com/r/askscience/comments/204hl2/at_what_...
- PeterStuer 9y agoCouldn't find a video of the event, but probably this talk comes close? "Past and future of hardware and architecture" https://www.youtube.com/watch?v=q9KRq2Ns0ZE https://www.youtube.com/watch?v=q9KRq2Ns0ZE
- aap_ 9y ago> Maurice Wilkes first conceived of microprogramming in 1951 Zuse's Z1 was microprogrammed in 1937.
- narrator 9y agoSpeaking of Moores law being dead this time, check out this old article from 2012 predicting we would be at 7nm Intel chips with 5nm on the way: http://www.tomshardware.com/news/intel-cpu-processor-5nm,17578.html http://www.tomshardware.com/news/intel-cpu-processor-5nm,175... Intel is still trying to figure out 10nm because it is rumored that there are material science problems that are causing yield issues. Remember the 1960s when rapid gains in space tech made everyone think we'd be travelling around the solar system by 2000? The tech hit a plateau and stopped. Maybe we're in that situation with chip technology...
- ribasushi 9y agoAn amazing 2014 talk[1]/article[2] by @idlewords explores exactly this premise. [1] https://www.youtube.com/watch?v=nwhZ3KEqUlw https://www.youtube.com/watch?v=nwhZ3KEqUlw [2] http://idlewords.com/talks/web_design_first_100_years.htm http://idlewords.com/talks/web_design_first_100_years.htm
- duncan_bayne 9y agoI thought it was more that the money dried up, and the nuclear test ban prohibited testing of the sorts of nuclear rockets that were being prototyped at the time.
- orbital-decay 9y agoIt's the same with semiconductors though, the barrier is mostly economical.
- donquichotte 9y agoIs it? I was under the impression that we are hitting physical barriers, like transistor size getting closer and closer to Silicon atom size.
- orbital-decay 9y agoIt's still technically possible to make chips with smaller nodes than the current mainstream processes allow, although this is uneconomical due to low yields and extremely thin margins.
- awiesenhofer 9y agoSo, whats the way forward? FPGAs on Die? Asics? Or doubling down on EVU, Germanium, etc?
- Tobba_ 9y agoI think we're far from the ceiling on CPU performance so far, but we seem to have hit a (micro)architectural dead end. Currently a lot of time and transistors is spent simply shuffling data around the chip, or between the CPU and memory, while the actual computational units simply sit idle. Or similarily, units that sit idle because they can't be used for the current task, even if they should be - the FPUs on modern x86 cores are a pretty good example of this. FP operations are just fused integer/fixed-point operations, but it's been designed into a corner where it has to be a special unit to deal with all the crap quickly. We've probably optimized silicon transistors to death though; that's why it's coming to a stop now. GaAs or SiGe are some of the alternatives there. Although there's still quite a lot of advancements there that simply aren't economical yet. For example, SOI processes at low feature sizes seem to be suitable for mass-produced chips now, but it hasn't made it out of the low-power segment yet. MRAM seems to be viable and might be able to provide us with bigger caches (in the same die area), but right now it's mainly used to replace small flash memories (plus some more novel things like non-volatile write buffers, but it's horrifically expensive). So we've probably got a few big boosts left there, but it's not gonna last forever. The next obvious architectural advancement right now is asynchronous logic. In theory, it's superior in every way - power and timing noise immunity, speed isn't limited by the worst-case timings, no/reduced unnecessary switching (i.e lower power, meaning higher voltages without the chip melting itself). On paper, you run into some big problems on the data path - quasi-delay-insensitive circuits need a lot more transistors and wires, and the current alternative is to use a separate delay path to time the operations, which is a bit iffy. You do at least get rid of the Lovecraftian clock distribution tree that's getting problematic for current synchronous logic. In practice, the tools to work with it and engineers/designers that know how to work it don't exist, and the architecture is entirely up in the air. So it's many years of development behind right now and a huge investment that nobody really bothered with while they could just juice the microarchitecture and physical implementation.
- 9y ago
- nostrademons 9y agoWonder what this means for system software and application development. There's a factor of 10-40x speedup by going from an interpreted language like Python/Ruby/PHP to a tight compiled one like C++/Rust/Ocaml. 2-4x going from a good JIT like V8 or Hotspot (or Go's runtime, though technically not a JIT). Probably another 10-100x by cutting out bloated middleware like most web frameworks or the contents of your node_modules. All this was irrelevant when you could get your 2-4x speedup by waiting 18 months, and your 10x speedup by waiting 5 years. It's very relevant when your 2x now takes 20 years and 10x takes a lifetime. Maybe this is why Rust gets so much attention recently.
- jononor 9y agoPrice for compute is still going steadily down for web services. Which I think is more relevant than individual core/CPU performance. CPUs are still getting cheaper, blades are getting more compact. Virtualization, containers and function-as-a-service are improving utilization. Modern cloud service providers have massive economies of scale.
- roymurdock 9y agoYep, we are seeing computers evolve from hybrid media consumption/creation/business tools into a bifurcated model where IaaS providers rent out the majority of the world's compute power, and average consumers own a (powerful) thin client for UI/display/consumption. There will be still sizable markets (real-time industrial/automotive/medical/etc., gaming, some business apps) where individuals will still want to own and upgrade their own beefy on-prem hardware, but in the consumer realm I can't think of many new applications that have taxed my 2012 MBP, or even my older Dell/Win7 laptop. AWS/Azure/GCP shoulder the burden for me.
- hinkley 9y agoThat only helps for embarrassingly parallel tasks, like rendering hundreds of distinct web pages per second (which in many cases might just as well have been partially precalculated to trade space for time). As was pointed out in the chart, we’re already hitting Amdahl’s law with half a dozen cores.
- mcjiggerlog 9y agoIt's not all bad - one upside is that you don't need to upgrade your hardware anywhere nearly as often as 10 or 20 years ago. I put this PC together in 2013 for maybe £500-600 total and apart from adding some RAM I haven't needed to upgrade anything and can still run games on highish settings.
- criley2 9y agoYou can probably run 2016-2018 games on medium settings if you are not interested in 60fps. I imagine you can play no graphically intense game @60fps at any respectable resolution. I say this because building a computer which can play say Assassin's Creed Origins or Far Cry 5 at 1080p60 High Settings would easy run you over a $1000 right now, due in no small part to the extravagantly over-priced GPUs. Heck, it costs $400-600 to get a GPU to play those games on medium to medium high right now. Not a computer, JUST the graphics chip to get 60fps on medium. Crypto has destroyed affordable PC gaming and it makes me so sad. I can recommend Alienwares on sale that are dramatically cheaper than self-built. What happened to this industry :(
- mcjiggerlog 9y agoWell I guess I don't play that many super graphically-intensive games. I can, for example, play Overwatch on high settings at 1920x1080. I don't really monitor framerates, but I'm ok with about 40fps.
- mort96 9y ago60 FPS? I had a desktop I built in 2014, with a 4770k and an r9 290x, run Overwatch at 144 FPS at 1440p with low settings. The machine could still play Just Case 3 and GTA 5 (2015 games, but I didn't really play any graphically intensive 2016+ games on it) at 1080p 60 FPS with decent graphics settings, if I recall correctly. I have since upgraded to a 6700k and 1080Ti, but that 2014 hardware lasted well into 2017 - and the current GPU cost just under 3/4 the price of the entire 2014 computer, despite the r9 290x being a top of the line GPU. High end PC gaming definitely isn't affordable anymore.
- 9y ago
- tempodox 9y agoIs the host down? I can't open that page.
- krylon 9y agoIt worked for me, but the page took a very long time to load (1 minute or longer).
- JoachimS 9y agoI found this article from a Synopsys User Group meeting to be very interesting. The steps and changes needed to get to 7, 5 and 2 nm are really, really big: https://www.eetimes.com/document.asp?doc_id=1333109 https://www.eetimes.com/document.asp?doc_id=1333109
- api 9y agoThe thing that really killed plain vanilla RISC is memory latency. Compared to on-die registers and cache memory might as well be disk. True RISC is more efficient to execute but it results in more instructions and hence more code that has to be read from RAM. Modern CISC chips that immediately unpack CISC into RISC micro-ops are really something that I've termed "ZISC" -- Zipped Instruction Set Computing. Think of CISC ISA's like the byzantine x86_64 ISA with all its extensions as a custom data compression codec for the instruction stream. We got ZISC accidentally and IMHO without us realizing what we'd actually done. The x86_64 "codec" was not explicitly designed as such but resulted from a very path-dependent "evolutionary walk" through ISA design space. I wonder what would happen if we explicitly embraced ZISC and designed a custom codec for a RISC stream that can be decompressed very efficiently in hardware? Maybe the right approach would be a CPU with hundreds of "macro registers" that store RISC micro-op chunks. The core instruction set would be very parsimonious, but almost immediately you'd start defining macros. Of course multitasking would require saving and restoring these macros which would be expensive, so a work-around for that might be to have one or maybe a few codecs system-wide that are managed by the OS rather than by each application. This would make macro redefinition rare. Apps are compiled into domain specific instruction codec streams using software-defined codec definitions managed by the OS. The neat thing about this hypothetical ZISC is that while 99% of apps might use the standard macro set you could have special apps that did define their own. These could be things like cryptographic applications, neural networks, high performance video encoders, genetic algorithms, graphics renderers, cryptocurrency miners, etc. Maybe the OS would reserve a certain number of macros for user application use.
- deepnotderp 9y agoI agree with a lot of what you said, but ZISC already stands for zero instruction set computing. Also, RISC and CISC instruction cache hitrates are pretty similar.
- api 9y agoAhh I forgot about zero instruction set computing. Maybe CISC should just stand for Compressed Instruction Stream Computing because on today's chips that's exactly what it is. Cache hit-rates being similar may just show that the ad-hoc evolved compression codecs represented by CISC instruction sets are sub-optimal, hence my point about what might happen if we intentionally designed a CPU with on-board compression codec support for the instruction stream.
- tfmkevin 9y agoThe problem is that we have designed ourselves into an architectural cul-de-sac when it comes to processors. We have fifty-plus years of evolution on programming methodologies built on top of von Neumann architectures. Moore's Law has given us decades of exponential gain without significant challenge to that architecture, and now that Moore's Law is reaping diminishing returns in terms of compute performance we are in the situation where we'd have to go backward forty years on our programming model in order to take advantage of a superior (given today's technology) architecture. For example, FPGAs can in many cases outperform von Neumann machines by orders of magnitude in terms of compute performance and (more importantly) performance per watt. However, the programming model and ecosystem for FPGAs is worse than primitive. Something you could write in a couple hundred lines of C code could take months to get up and running on an FPGA. We need a way to transition from von Neumann computing to alternative architectures without starting over on computer science. Or, perhaps recent trends in neural networks will eliminate the need for that?
- scroot 9y agoJust this afternoon I finished reading David Harland's 1988 book "Rekursiv: Object-Oriented Computer Architecture". It describes a completely different way of designing machines at the low level that can support better programming environments at the high level. You might want to check it out. I believe we are going to see further balkanization between different operating systems / programming systems and computers based upon what they are use for. Cloud services will be the domain of what today we call "systems programmers" who work in compiled languages and care about speed. In contrast, we might now be able to get real "personal computers" running environments that teach their users how to peel back the layers and manipulate them — the long sought personal computing medium. This all could have happened back in the 80s, but we didn't have widespread or fast use of the Internet. Now it's different, and both of these types of systems can interop together in the blink of an eye because of it. Both will require completely new computing architectures.
- Const-me 9y agoI don’t think the main reason for Moore’s law slowdown is technical one. Intel enjoyed no competition for quite a few years. They simply lacked incentive to improve performance of their chips. In areas with healthy competition, mobile processors and GPUs, Moore’s law still doing OK. E.g. here’s a graph I recently made for top of the line single-chip nVidia GPUs: http://const.me/tmp/nvidia-gpus.png http://const.me/tmp/nvidia-gpus.png The numbers represent single precision floating-point performance. The graph is in logarithmic scale and it looks pretty close to the exponential growth predicted by Moore’s law.
- kokey 9y agoIt's also interesting to note that Fabrice Bellard has developed a RISC-V emulator https://bellard.org/riscvemu/ https://bellard.org/riscvemu/
- rstuart4133 9y agoThere is a lot of focus on the end of Moore's law here, but it isn't main driver of what's happening. The slow down we are seeing is driven by the end of Dennard scaling. There is a thermal dissipation limit of 200W per chip for air cooling. We hit that decades ago of course, but it didn't matter while Dennard scaling kept dropping the power consumption. Once that stopped we squeezed a bit more of stuff by being more power efficient, which boiled down to two things - turning stuff off when it wasn't needed and devoting the transistors Moore's law gave us to specialised tasks (like silicon dedicated to encryption or h264 encoding) that did the job more efficiently. However, that doesn't get you very far. Which is probably why he didn't mention 3D, even though we have it 32 layers of it now and they are talking about 256 layers. What is the point of having 128 CPU's on a single die just running 4 of them exceeds your power budget? Indeed, what's the point of spending billions perusing Moore's further? Or to put it another way again, the human brain fits roughly the same number of synapses per unit volume as modern 3D silicon has transistors. The brain's raw switching speed is roughly 1,000,000 times slower than silicon (1ms vs 1ns), but power consumption of a synapse vs a transistor is roughly 100,000 times better. So while AlphaZero learnt to play Go between than any human in a few days, it used more energy that an entire human (not just their brain) would use in several life times to do it.