10 ms·
Very interesting, any information about a target price range?
by rightos 9y ago
Very interesting, any information about a target price range?
- zitterbewegung 9y agoDoesn't look like it but I would sign up on the bottom to get more info. (aside it should be on the top of the page)
- opencl 9y agoThis is an IP core rather than an actual SoC so the pricing will obviously depend on what else gets packaged with it, but based on the core+caches area of 0.538mm^2 on 28nm it should be competitive with the Cortex A7/A53/A35. As seen in Allwinner A64, Raspberry Pi, etc. It does say 2MB of L2 cache whereas most quad A53 SoCs I've seen have 512KB so the cost is probably going to be a bit higher from that. But full SoCs are likely going to be in the $5-$10 range.
- petra 9y agoThe raw cost of the coreplex's silicon is probably ~7 cents. of course there's extra stuff that goes into a soc, but why do you assume it will go from 7 cents to $5-$10 ? is it because the cost of the A53 etc is insignificant ?
- pdq 9y agoYou have to take into account the end product, not just raw silicon cost. There are costs in SoC packaging, wire bonding, testing, yield loss, warehousing, distribution, R&D, and profit.
- pjc50 9y agoSince when have the silicon costs been the slightest bit relevant to IC pricing? It's all about volume and recouping R&D costs and other NRE.
- monocasa 9y agoYeah, but this core is open source, which significantly reduces the NRE costs for most integrators.
- pjc50 9y agoIt looks like (although not 100% clear) it's available as hard IP, which means they've done the layout, but the very expensive mask NRE remains. (They have a plan for an actual SOC but aren't shipping yet: https://www.sifive.com/documentation/freedom-soc/freedom-u500-platform-brief/ https://www.sifive.com/documentation/freedom-soc/freedom-u50... )
- opencl 9y agoThe RISC-V ISA is free (i.e. you can design your own core without paying royalties to a company like ARM, which is what SiFive has done here) but this is a normal paid-for IP core. They do have some SoCs with a "free and open platform specification" but there's no public repo to download their Verilog code from. If you want an actual open source RISC-V core, see: https://github.com/lowRISC/lowrisc-chip https://github.com/lowRISC/lowrisc-chip
- monocasa 9y agoThe source here isn't their core? https://github.com/sifive/freedom https://github.com/sifive/freedom
- opencl 9y agoThat code seems to be for an FPGA devkit for their SoC but using an entirely different CPU core, the Berkeley Rocket Chip. They're selling coreplex licenses for several hundred thousand dollars (not the one in the linked product page, it isn't for sale yet): https://dev.sifive.com/coreplex-risc-v-ip/buy/rtl/e51_coreplex/configure/ https://dev.sifive.com/coreplex-risc-v-ip/buy/rtl/e51_corepl...
- 9y ago
- simonh 9y agoI suppose the money for the wages of all the people working at the billion dollar silicon chip fab plant has to come from somewhere.
- imtringued 9y agoBecause it will cost you 10 million dollars+ to produce your first chip. Every chip after that costs you 7 cents.
- mtgx 9y ago1.7 DMIPS/MHz seems to put it in the range of Cortex A5, maybe Cortex A7. But it also targets significantly higher clock speeds of 1.5GHz, so it may be faster than Cortex A7 in the real world. Probably not faster than A53/A35, but it should be close enough. Plus it has some additional features. https://www.cnx-software.com/2015/04/09/relative-performance-of-arm-cortex-a-32-bit-and-64-bit-cores/ https://www.cnx-software.com/2015/04/09/relative-performance... What may hurt it more in the market is the name. Most companies seem to underestimate its importance. U54-MC Coreplex doesn't exactly roll off the tongue...That means it's that much easier to ignore and forget about it. Hopefully whatever SoC will use it will have a better name.
- makapuf 9y agoWell the esp8266 80386, x86-64 or 741 chips didn't perform too bad either. ( I know x86 64 was an arch and not a chip)
- ant6n 9y agou54 rolls off the tongue. Sounds like a u-boot, too. With a night club.
- userbinator 9y agoTo compare with x86, 1.7 DMIPS/MHz is slightly less than the original Pentium (P5) at 1.88 DMIPS/MHz, and well behind the Pentium Pro (P6) at 2.7 DMIPS/MHz. Later x86 microarchitectures are vastly more efficient, with modern i7s achieving closer to 10 DMIPs/MHz. https://en.wikipedia.org/wiki/Million_instructions_per_second https://en.wikipedia.org/wiki/Million_instructions_per_secon...
- jabl 9y agoIsn't this pretty good then? P5-level performance/MHz from a pretty simple in-order scalar processor. And it clocks at 1.5GHz whereas the P5 topped out at around 200MHz. Though I suppose if you'd manufacture a (slightly tweaked) P5 on a modern process you'd reach similar clock speeds too...