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Open-source chip RISC-V to take on closed x86, ARM CPUs
- DonbunEf7 9y agoI want to buy RISC-V, both to play with and to support the cause. What are my options like and should I buy something now or wait for the next generation?
- pmorici 9y agoThe HiFive1 from sifive for $60 is what I got. https://www.sifive.com/products/hifive1/ https://www.sifive.com/products/hifive1/
- wanderingjew 9y agoYou can buy one from SiFive: https://www.crowdsupply.com/sifive/hifive1 https://www.crowdsupply.com/sifive/hifive1 although it's going to be a while until a RISC-V chip will be packaged on a board with USB, Ethernet, SATA, and all peripherals that make an ATX motherboard or a Raspberry Pi worth owning.
- deepnotderp 9y agoSiFive
- microcolonel 9y agoYou can buy the HiFive1 board (I have a few and they're swell), but it's more of a microcontroller than an application processor, the board is Arduino compatible. If you want something more like a Raspberry Pi or bigger, you'll have to wait a bit longer. The Freedom Unleashed platform is coming down the pipe, and you can pre-evaluate it on an FPGA board (albeit at lower frequency, and fairly pricy since it's a complex design and requires a fairly large FPGA to prototype). I won't pretend to know when they'll have a standard Freedom U500 SoC dev board, but it will have multiple cores, PCIe 3.0, USB 3, Gigabit ethernet, and DDR4 compatibility according to their website[1]. [1]: https://www.sifive.com/products/freedom/ https://www.sifive.com/products/freedom/
- ktta 9y agoApart from buying an actual dev kit like HiFive from SiFive, a great way to get into it is to buy SiFive's FPGA kits https://dev.sifive.com/freedom-soc/evaluate/fpga/ https://dev.sifive.com/freedom-soc/evaluate/fpga/ The FPGA board can be used for other things too. If you are really adventurous, I'd suggest buying a FPGA board with better chip so you can fit in larger IP blocks in the future. It will work perfectly fine as a replacement for the above FPGA kit I've linked to. My suggestion would be this[1]. It has a pretty large LUT count so you can go nuts. The RAM and Ethernet will be pretty useful if you want to run linux[2] and test out stuff. It'll be a bit hard to run linux on it right now. On the other hand, you can choose a Parallela board[3] which comes with a FPGA chip along with a new (soon to be retired) arch called epiphany. Here[4] is a GSoC project which runs linux on that board using the FPGA. [1]: http://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-trainer-board-recommended-for-ece-curriculum/ http://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-traine... [2]: https://github.com/riscv/riscv-linux https://github.com/riscv/riscv-linux [3]: https://www.parallella.org/ https://www.parallella.org/ [4]: https://github.com/eliaskousk/parallella-riscv https://github.com/eliaskousk/parallella-riscv
- e12e 9y agoI see that what they recommend for the freedom platform https://www.sifive.com/products/freedom/ https://www.sifive.com/products/freedom/ today, is a dev board https://dev.sifive.com/freedom-soc/evaluate/fpga/ https://dev.sifive.com/freedom-soc/evaluate/fpga/ that costs around 3500 USD: https://www.avnet.com/shop/us/p/kits-and-tools/development-kits/xilinx/ek-v7-vc707-g-3074457345626227804/ https://www.avnet.com/shop/us/p/kits-and-tools/development-k... Do anyone here know what kind of "classic pc" performance one is likely to get out of a board like that? Could you get on the order of low-end pc (~500 dollar soc / netbook with real gigabit ethernet, sata6 and usb3) from something like that, if paired up with a reasonable cpu design?
- q3k 9y agoA somewhat speed-optimized IP CPU core [1] runs at 600DMIPs on a Virtex7. I would hope that SiFive is in the same ballpark, but it's probably slower. Even in a best-case scenario, this is nowhere near a low end consumer PC. edit: For reference, my 5 years old Thinkpad x230 does around 7400 DMIPs per core. [1] - https://www.xilinx.com/products/design-tools/microblaze.html https://www.xilinx.com/products/design-tools/microblaze.html
- ddcc7 9y agoFor an FPGA to play around with, the Lattice ECP-5G is really nice: http://www.latticesemi.com/en/Products/FPGAandCPLD/ECP5andECP55GConnectivityCoProcessing.aspx http://www.latticesemi.com/en/Products/FPGAandCPLD/ECP5andEC... . PCIE and DDR3, in a $99 dev board.
- FullyFunctional 9y ago(Public service announcement: https://riscv.org/forum/ https://riscv.org/forum/) Others have the SiFive chip, but if you want to boot Linux then your best option currently is running Rocket on an FPGA kit. I expect that we'll soon have more options. If you just want to play around, then I'd recommend Spike or Fabrice's https://bellard.org/riscvemu/ https://bellard.org/riscvemu/
- tyingq 9y agoPeople mentioned the siFive option, but that's a microcontroller. If you were looking for a 64 bit processor implementation, without having to use an FPGA... It looks like the first dev board that would be capable of running linux will likely be the lowRISC project. "We are expecting to crowdfund an initial instantiation of the lowRISC platform during the course of 2017" http://www.lowrisc.org/ http://www.lowrisc.org/
- brucehoult 9y agoI'll buy a LoweRISC as soon as they have something for sale (and I have one of the first HiFive1s). But at the rate both organisations are progressing I expect to be able to get a quad core 1.6 GHz 64 bit RISC-V "Pi-like" board from SiFive before LowRISC. Possibly even this year. I've gathered from other things they've said that they're sampling wafers with that SoC about now. Ideally, they'll both succeed.
- alkoumpa 9y agoI wonder how of those fit in a zedboard. (not going to ask how many hours of tool fighting that would require though).
- deleted 9y ago[deleted]
- blitmap 9y agoI look forward to a RISC-V proc powering my laptop with some ridiculous Nvidia GPU. We must escape x86 :(
- deepnotderp 9y agoAtm, arm is likely a better fit for that.
- swiley 9y agoRight now the arm SBCs actually make functional desktops. There's very little you can't do on a raspberry pi other than run closed software.
- kasbah 9y agoYou can actually run Windows on a Raspberry Pi. Having said that, they make for horrible machines to do actual work on even with desktop Linux.
- swiley 9y agoVim and gcc run fine, I can compiler kernels and busybox and work on my personal software projects and homework on mine. They don't run gnome or html5 browsers as well as your laptop might but nothing runs those well anyway.
- deleted 9y ago[deleted]
- filereaper 9y agoMany people claim to want an open-source chip, but end up balking at its price tag, this is exactly why Raptor Engineering's Talos failed. [1] I've pretty much given up hope on a non-x86 based chip hitting our desktops, the closest to reach will be ARM. The economies of scale aren't there, I pretty much end up rolling my eyes at each of these articles. [1] https://www.raptorengineering.com/TALOS/prerelease.php https://www.raptorengineering.com/TALOS/prerelease.php
- nickik 9y agoThe hole point of a free ISA is that many different people can produce them so that it will reach a economy of scale and chip producers will face competition making dirving down price. Its not garantied to work but its a worty target.
- jeffdavis 9y agoFree is about freedom, not price.
- TheAceOfHearts 9y agoSo, freedom is only for the rich?
- gaius 9y agoIn business there is no "cheap" or "expensive". There is only "worth the money" or "not".
- jeffdavis 9y agoFreedom is sometimes efficient enough that it costs nothing to have freedom. Other times, there are real or artificial barriers that mean freedom has a cost. In those cases, someone has to bear the cost or forego freedom.
- comex 9y agoThat's not the point; the context of the post you replied to was people that "claim to want an open-source chip, but end up balking at its price tag".
- sajattack 9y agohttp://i.imgur.com/JGYaa7J.jpg http://i.imgur.com/JGYaa7J.jpg
- webaholic 9y agoRISC-V is atleast 10 years away from competing with x86 and ARM. It is just now getting to a point where it can power arduino class hardware. Long way to go... but looks promising.
- legulere 9y agoWhere do you get this from? It will still take a bit until the privileged spec is finalized, but what is holding RISC-V back then?
- orbifold 9y agoImplementations that are competitive with current x86 and ARM at the highend
- deleted 9y ago[deleted]
- jbarham 9y agoThe Freedom E310 chip in the HiFive1 board is shipping today and is already competitive with embedded ARM: https://www.crowdsupply.com/sifive/hifive1/#comparisons https://www.crowdsupply.com/sifive/hifive1/#comparisons. It's comically faster (i.e., 100x) than the AVR chip in the Arduino Uno board, but the similar form factor makes it cheap & easy for early adopters to play around with. I'd bet that within five years a good proportion, even the majority, of Amazon & Google servers, will be running on RISC V chips.
- dom0 9y ago> It's comically faster (i.e., 100x) than the AVR chip in the Arduino Uno board Beating AVR cores on performance is like stealing candy from a baby. No one hands out prizes for that.
- sweden 9y agoThat sheet doesn't mean anything, they are comparing a microcontroller clocked at a frequency of 300 MHz with microcontrollers clocked at 30 MHz. Of course that they have better performance... Misleading marketing material.
- wyldfire 9y agoI thought that microprocessor production and design was fraught with risk of infringing on other designers' patents (even for original ISAs). I can see that industry heavyweights have arrived to support RISC-V, so hopefully that comes with a team of professors/lawyers that could defend them. But, why now? Why couldn't this have happened sooner? Didn't Sun try to create an open SPARC processor design? What does RISC-V have that it didn't? Is the intent for RISC-V to compete with modern high-end CPU designs, or do we just want to have royalty-free microprocessors for our embedded devices? You might be surprised (at least I was) to learn that peripherals like hard drives and PCI-add-in cards usually have their own CPU executing their own software. Those processors are often MIPS/ARM/etc based and the manufacturer has to shell out to someone to be able to use that, even if they designed the processor themselves. I can see how this particular market is ripe for something like RISC-V. But does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq? I sound incredulous because this seems surprising to me, but I have no evidence to suggest whether it's as unlikely as I think. I've certainly seen open source software designs far superior to closed source ones, so maybe hardware design is no different?
- microcolonel 9y agoThere are a number of things that make RISC-V different from OpenSPARC. One is that OpenSPARC is not a very scalable design, it could probably only ever work in servers and workstations, and workstations are essentially a monoculture. Another reason is timing: manufacturing processes have effectively stopped yielding performance and power gains as the fundamental constraint (distance between components on chip) doesn't get any smaller. This means that in order to keep the pace up for any popular workload, many new microarchitectures will need to be created. RISC-V is amenable to a wide array of microarchitectural decisions, and doesn't carry the architectural baggage of ARM and MIPS licensing and technical quirks, or the impossible licensing of x86. > But does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq? Except for Intel, none of these manufacturers have any reason to resist RISC-V. All of these vendors can directly port knowledge from one ISA to another. So really it becomes a matter of "will there be a demand for RISC-V hardware in the server and workstation markets?", and the answer to that is a firm "maybe". I think that today, since most software is written in high level languages which are at least as abstract as C, there is little reason why a new ISA couldn't take hold in any of these markets if hardware vendors can promise good things to ISVs and to customers who write their own software. At present, there is a considerable barrier to entry for new designers and manufacturers to approach ARM, POWER, and MIPS, and basically no hope of manufacturing an AMD64. ARM is not the cuddly RISC architecture people think it is, it is in many ways nearly as quirky as x86, and therefore very expensive to enter and innovate on. Furthermore, it can take more than a year to negotiate an architectural license with ARM, your company or the market might no longer exist by the time you close the deal. POWER is not too far off on licensing, and it's not all that elegant either (though far more surmountable than ARM). MIPS lacks industry momentum and standardized high performance feature sets (wide vector compute, hardware security features), and its custodian company seems to barely acknowledge it exists. All in all, nobody knows if it'll work out, but there are good reasons for RISC-V to succeed in the market. The challenges also seem surmountable.
- figers 9y agoIsn't ARM the RISC solution that is already here? Already dominating mobile, Microsoft is soon to be announcing x86 apps running on Windows on ARM
- wyager 9y agoARM is too license-encumbered. If we're going to switch away from x86, it might as well be to something that admits free development and production.
- sweden 9y agoThings are not that straight forward, I wrote a better comment here: https://news.ycombinator.com/item?id=14284409 https://news.ycombinator.com/item?id=14284409
- wyager 9y agoI'm aware that individual implementations of the ISA are nonfree. There's still a huge benefit to using the free ISA, because we can target nonfree hardware while necessary and our software will just work on free hardware when it's available. There are already some free low-power designs, and if RISC-V gains traction I expect some free high-power designs to come out of the woodwork. A robust open processor ecosystem could be the impetus for a huge improvement in open-source EDA tooling and public EDA research. Even now, the absolute cutting edge in HDL research is free and open-source (and 100x more user-friendly than anything to come out of Xilinx or Altera), and I suspect the same would happen for silicon-targeting synthesis tools if there was a demand for it. The idea would be to get 90% of Intel's performance for 5% of the work. Intel spends insane amounts of money on manual routing and optimization, extensive testing at every stage of prototyping and production, stuff like that. The creative laziness of the free software/hardware people could probably improve on that very substantially with minimal losses to the finished product.
- jbarham 9y agoRelevant article: http://makezine.com/2017/05/03/sifive-brings-open-source-to-chip-level/ http://makezine.com/2017/05/03/sifive-brings-open-source-to-...
- pubby 9y agoAs someone not knowledgeable about hardware, I really enjoyed reading Agner Fog's message board where he and others discuss creating a new open source instruction set: http://agner.org/optimize/blog/read.php?i=421 http://agner.org/optimize/blog/read.php?i=421 RISC-V is discussed some, and part of the discussion is how to improve it.
- sweden 9y agoI see on this thread a lot of people getting blind-folded by the "open-source" term attached to the headline of this article. First of all RISC-V can mean more than one thing: it can refer to the architecture, which is in fact open and free to use, or it can refer to the implementation of the same architecture, which will not be necessarily free or open source. For example, check the so claimed SiFive company which was promising free and open source implementations of RISC-V: http://www.eetimes.com/document.asp?doc_id=1331690 http://www.eetimes.com/document.asp?doc_id=1331690 "“A year ago there was quite a debate if people would license a core if there was a free version, [but now] we’ve seen significant demand for customers who don’t want an open-source version but one better documented with a company behind it,” said Jack Kang, vice president of product and business development at SiFive." By the end of the day, they just decided to follow ARM's path by providing license fees to their CPUs. Secondly, when people say that RISC-V is "free" and "open-source" and that will allow companies to create cheaper and more open hardware, that is just an illusion. There are many more things on a SoC other than a CPU (like memories, communication buses, GPUs, power management processors, and so on). Cutting costs on a CPU will not make the cost of an SoC go down to zero, the CPU is just a small part of the puzzle. With RISC-V, you either need to implement the CPU yourself (which will be extremely expensive and time consuming) or you will have to find someone who provides with CPU cores already implemented. And of course that you need to have support and guarantees that the cores you bought will work on silicon. There will be always a huge cost associated when shipping CPUs, you can't escape from that. You can already imagine that open-source hardware doesn't play by the same rules as open-source software, it's a completely different game with completely different rules. And people speak of ARM's royalties like if they were a very bad thing. Truth to be told, the royalties you pay ARM can be a very good deal taking into account that you get access to silicon proven CPU cores, support from the best engineers in the industry and you automatically get covered by the many CPU patents that ARM owns. And you can even choose on how you want to pay for ARM's CPU licenses: you can either choose to license an already implemented CPU design by ARM or you can buy an architectural license and implement your CPU completely from scratch (this is what Apple and Qualcomm are current doing). You don't need to be completely tied to ARM. Even in the royalty fees you can choose whether you want to pay a big upfront license fee but then paying low royalties per device or you can choose to pay a low upfront license but compensating on the royalties per device. There is a lot of misinformation going around the possibilities of RISC-V, mostly of this misinformation coming from people involved in the development of the spec. Don't be fooled by the buzzwords "open-source hardware" and "free hardware".
- psydk 9y agoAfter enjoying coding on 680x0 in my youth and later being frustrated by x86, I acclaim that new ISA. There is a design decision I'm curious about but I could not find related information. How did they come with the names "x0, x1, x2..." for general purpose registers, instead of the more conventional "r0, r1, r2..."?
- _chris_ 9y agox for "fixed point". r for "register" is too vague.
- roryisok 9y agoI always thought ARM chips were RISC. shows what I know
- indolering 9y agoThat's how they started out, but there is always pressure to add new instructions for niche markets. But since there isn't any coherent way to implement extensions it means they have to pollute the entire ISA. RISC-V was carefully designed to allow for extensions.
- FullyFunctional 9y agoNo it was never a [real] RISC. Even the very first version included predication and shift in most instructions. They weren't even fast. The event that changed everything was when DEC Alpha engineers (for reasons I don't know) decided to use their expertise to created StrongARM. This ironically ended up at Intel and was renamed XScale, before being spun out. (EDIT: grammar & typos)
- faragon 9y agoAFAIK, most advanced RISC-V design includes superscalar and OoOE (e.g. comparable to a MIPS R10000 (1995) or an Intel Pentium Pro (1995)), while the RISC-V for the IoT is comparable to a typical single instructions per clock RISC CPU, e.g. MIPS R3000 (1988). The success in the IoT will depend not only in a cheaper price because of no royalties, but also in the "ecosystem": peripherals, buses, etc. Running Linux is a huge start, so I have no doubt it can be a success in this field. Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced, and software being adapted (e.g. ffmpeg/libav including RISC-V assembly SIMD implementation for the codecs). Anyway, realistically, for the RISC-V getting enough traction, some big player should bet on that, which is currently highly improbable, unless some Apple/Samsung/Huawei/Google gets crazy enough for doing it.
- homero 9y agoNvidia would be perfect
- pjmlp 9y agoNVidia is busy with their own ARM designs.
- rjsw 9y agoNVidia are using RISC-V in their GPU designs.
- pjmlp 9y agoWhere can I read more about it?
- sherincall 9y ago- https://riscv.org/wp-content/uploads/2016/07/Tue1100_Nvidia_RISCV_Story_V2.pdf https://riscv.org/wp-content/uploads/2016/07/Tue1100_Nvidia_... - https://www.phoronix.com/scan.php?page=news_item&px=NVIDIA-RISC-V-Next-Gen-Falcon https://www.phoronix.com/scan.php?page=news_item&px=NVIDIA-R...
- posterboy 9y agoWhat is so special about reduced ISAs, what's the differentiating factors between them? I mean they are so reduced that the ones I've seen are largely the same few logic ops. RAM access and interrupts might differ some, but a) memory access should follow the implementation and b) essentially everything else is memory mapped (avr, c51, pic)
- FullyFunctional 9y agoTo fully appreciate this, one would need much experience with microprocessor implementation. It's not reduced for the point of being simpler or smaller, but because it represent a local optimum of perf/area for running C code, especially for small to medium implementations. However, much like the Alpha, RISC-V has been carefully designed to be efficient to scale UP, that is, to superscalar out-of-order implementations. Do read the spec and the footnotes; they are delightful: https://raw.githubusercontent.com/riscv/riscv-isa-manual/master/release/riscv-spec-v2.2.pdf https://raw.githubusercontent.com/riscv/riscv-isa-manual/mas...
- jlebrech 9y agowould there be a advantage to not only creating a reduced instruction set but a minimal instruction set and letting the compiler do the rest. especially when you can add a lot more cores, so that mul becomes a cpu core with a counter and add for example.
- FullyFunctional 9y agoNo.
- restalis 9y agoSo many RISC options and almost none for CISC. If you want yet another low power chip, then it makes sense. If, however, you want to get real on efficient cache usage and a high instruction-per-execution ratio, just do yourself a favor and stop ignoring the costly experimenting results that the industry already paid for.
- Nomentatus 9y agoThis just doesn't match the research I've read. CISC wasn't about speed of execution, and x86 isn't an asset, there. (As I understand it Intel's expertise in compilers, emulation of CISC by RISC, and manufacturing are wonderful compensating factors.)
- silur 9y agoAn opensource, non-licensed, low-cost embedded processor -> sifive sells it for 600.000$ minimum.