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How Intel Makes a Chip
- brudgers 10y agoPast: https://news.ycombinator.com/item?id=11875892 https://news.ycombinator.com/item?id=11875892 https://news.ycombinator.com/item?id=11870546 https://news.ycombinator.com/item?id=11870546
- vermontdevil 10y agoStrange. I searched and saw nothing. Then I posted and HN accepted it instead of redirecting to these previous posts as it had done before.
- brudgers 10y agoAlgolia runs its search service on its own metal for performance. Being off-site [relative to YC] and realtime search not really being critical [relative to YC] might explain some latency. Anyway, HN's dupe detector isn't all that performent either.
- BrutallyHonest 10y agoIt's obvious that they failed.
- Cyph0n 10y ago> It’s surprisingly dark, too. For decades, Intel’s cleanrooms have been lit like darkrooms, bathed in a deep, low yellow. “That’s an anachronism,” says Mark Bohr, a small, serious man who has spent his entire 38-year career making chips, and who’s now Intel’s top manufacturing scientist. “Nobody’s had the courage to change it.” Wait, what? Isn't that UV-free light? Ultraviolet light is used in the mask exposure step, so using normal light in the room would basically remove all of the photoresist before photolithography. I guess they've automated the process to the point where the wafers are never exposed to light even when moving between steps.
- shivsta 10y agoThey might be referring to the fact that the room might not have photo-resistive materials or the fact that they have not investigated other methods that could allow them to use white light in the room.
- jjoonathan 10y agoOr they've moved so damn far into the UV that their photoresist doesn't even care about the wimpy just-beyond-visual peaks coming out of fluorescent lights.
- Dylan16807 10y agoEveryone's still using 193nm light because it's so painful to go further. It's easier to solve the ridiculous problems involved when etching features a twentieth the size of your wavelength.
- pipio21 10y agoWith a SLA 3d printer you use a filter in the case so UV light is filtered. You can identify those machines because they are colored: https://www.b9c.com/assets/images/bg/bg-home-header.png https://www.b9c.com/assets/images/bg/bg-home-header.png By the way the people at Intel are working with ultra UV, and every material is opaque to them. That is the reason for the use of reflection surfaces instead of lenses for new machines.
- Cyph0n 10y agoI see, but my point is about the transportation and handling of the wafers. Extreme UV is mentioned in the article, but they'll use that for the 5 nm process. I don't think ultra UV exists.
- TFortunato 10y agoThis is true. The wafer carrying "foups" mentioned are actually an acronym for Front Opening Unified Pods, which is what carry the wafers from machine to machine in batches of up to 25 wafers at a time. They are typically UV opaque yellow, or black. The wafers aren't ever actually out in the open in the room at any time. (As an aside, since the air quality of the room was mentioned...god forbid you ever broke a wafer in the foup. Entire lot in that box is ruined, and cleaning the foup itself and the equipment front ends is a giant PITA) Source: was engineer at Varian Semiconductor / Applied Materials, who make all those giant tools that Intel and the other fabs use. Intel was definitely one of our largest customers and our most technically demanding.
- turbohedgehog 10y ago> Another way to make a chip faster is to add special circuits that only do one thing, but do it extremely quickly. Roughly 25 percent of the E5’s circuits are specialized for, among other tasks, compressing video and encrypting data. There are other special circuits on the E5, but Intel can’t talk about those because they’re created for its largest customers, the so-called Super 7: Google, Amazon, Facebook, Microsoft, Baidu, Alibaba, and Tencent. ... If you buy an off-the-shelf Xeon server from Dell or HP, the Xeon inside will contain technology that’s off-limits to you. “We’ll integrate [a cloud customer’s] unique feature into the product, as long as it doesn’t make the die so much bigger that it becomes a cost burden for everyone else,” says Bryant. “When we ship it to Customer A, he’ll see it. Customer B has no idea that feature is there.” This is something I've never heard of before. Anyone have some insight into this? Is it a relatively recent phenomenon?
- cushychicken 10y agoThis is basically the same principle as a GPU - specialized hardware that does one task really well. (In the GPU's case, it's lots of math, very quickly.) The most common example I can think of is BCH coprocessing, which most modern application processors use for verifying data stored in embedded Flash.
- hart_russell 10y agoIt's called an ASIC: https://en.wikipedia.org/wiki/Application-specific_integrated_circuit https://en.wikipedia.org/wiki/Application-specific_integrate...
- turbohedgehog 10y agoYeah, I know what ASICs are, I just hadn't heard of large companies getting their own IP inserted into Intel's chips for their own use.
- nickpsecurity 10y agoLook up AMD Semi-Custom Design. Should get some news articles on where they got this started in x86. Became big business that Intel got into, too.
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- _yosefk 10y ago"It costs more to make a chip than a plane" - nope, not if you don't build the fabs as Intel does. Of course Bloomberg (or at least many people there) should and does know better.
- nn3 10y agoI'm sure Intel would be happy learn from you how they could avoid investing all that money. To misquote George Burns, too bad that all the people who know how to build fabs are busy hanging out on HN instead...
- jandrese 10y agoIt's easy to build a cheap fab. You just target 45nm and use the old tried and true tech.
- trsohmers 10y agoThe point is that if you have a new chip design as a fabless semiconductor start up (like mine), you can get a chip fabbed on a fairly new process node (28nm) for less than $250k for a small quantity run, and go into production for under $5 million through a pure play fab like Global Foundries, TSMC, Samsung, UMC, SMIC, etc.
- nn3 10y agoRight. Who need power plants when the power is coming out of the wall plug. See the problem? Someone has to build the fab in the first place so you can use it.
- trsohmers 10y agoOh of course there needs to be fabs, but plenty of them exist. All I was saying is that if you want to make a chip, you don't need to take on Intel's capex.
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- rwmj 10y agoInteresting BBC documentary from 1977 which shows the inside of an Intel factory making RAM chips and (I guess?) 8080 processors: https://www.youtube.com/watch?v=HW5Fvk8FNOQ&t=9m https://www.youtube.com/watch?v=HW5Fvk8FNOQ&t=9m
- gavinpc 10y agoWhy is it so important to make the chips smaller every time? Especially if they're going into servers, where, as the article says, they will almost never be seen by the customers. To go from 2bn transistors to 10bn on something that's already trivially small, why not just make the thing 5 times thicker? Obviously there would be downsides in cost of materials and power consumption, but wouldn't that be offset by avoiding the need for nano-manufacturing advances in every single round? It sounds to me like there's some kind of "manifest destiny" at work here, especially the quote: “Our job is to push that point to the very last minute.” Really?
- awinograd 10y agoI think it has to do with distance electricity has to travel. If a chip is physically bigger, it takes longer to move bits inside of it. Sort of similar to why you can't have an L1 cache the same size as main memory. Just my best guess from a single processor architecture class so definitely not positive that's the answer.
- kogepathic 10y ago> I think it has to do with distance electricity has to travel. Correct. The chip has to be small enough that the clock can propagate everywhere within the chip within a single cycle, or problems will occur. > If a chip is physically bigger, it takes longer to move bits inside of it. Yes, so either you would need to delay for some cycles to ensure that the information has propagated (which will basically nullify the performance gains from cranking up your clock) or clock parts of the chip differently, but you're pretty much always limited by the slowest part of the chip (which is why every modern chip has a cache, because otherwise it would stall waiting for data).
- Dylan16807 10y ago> The chip has to be small enough that the clock can propagate everywhere within the chip within a single cycle, or problems will occur. Problems like what? These chips are already chopped up into different clock domains, and it's easy to install some PLLs so that perfectly-synchronized clock signals can blanket a chip even if it's inches across. Moving data around is also not a big deal. The Xeons in the article already have multi-nanosecond ring busses running around between cores[1]. They don't slow the chip down because the design simply lets long-distance data transfers take multiple cycles. L3 and I/O don't have to be blazingly fast in terms of latency. [1] http://images.anandtech.com/doci/8423/HaswellEP_DieConfig.png http://images.anandtech.com/doci/8423/HaswellEP_DieConfig.pn...
- MrBuddyCasino 10y ago> These feats of computer science are often attributed to the rise of the smartphone, but the hard work is being done on thousands of servers. And pretty much all of those servers run on Intel chips. Considering Intel's recent exit from the smartphone SoC business and concentration on the data center, I have a suspicion why Bloomberg was "given the most extensive tour of the factory since President Obama visited in 2011".
- Black-Plaid 10y ago> Our customers expect that they will get a 20 percent increase in performance at the same price that they paid last year Well, looks like they have really lowered the bar, I seem to remember it being twice as much power, for half the price, every 18 months.