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yvdriess
searching PlanetScale…
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61.
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yvdriess
1y ago
He was talking about china because that's the subject in this story, not the poster's residence.
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yvdriess
1y ago
My interpretation, going off on the linked integrated GC research: extensions to the ISA and thus compiler backend, no modifications to 'well formed' applications, some changes to the language runtime dealing with memory managemen
63.
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yvdriess
1y ago
Yep air-gapped security is a thing. But servicing, patching and communicating with air-gapped devices still needs to happen, which involves connecting to them somehow. Likely a manufacturing plant has started to connect everything together
64.
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yvdriess
1y ago
Related discussions: - CHERI with a Linux on Top https://news.ycombinator.com/item?id=45487629 - Why not object capability languages? https://news.ycombinator.com/item?id=43956095 - Ask HN: Why isn't c
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Two Paths to Memory Safety: CHERI and OMA
(ednutting.com)
50 points
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yvdriess
1y ago
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42 comments
66.
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yvdriess
1y ago
Hands up, the dozens of us pedants that have used a relaxed atomic add in situations like these. Updating the SP in the most paranoid way possible is the reason that sort of thing exists. (You cannot express relaxed atomics in golang, but
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yvdriess
1y ago
Go users can only insert assembly wrapped in a function call. That might be safety related, I am not entirely sure. (Well technically there is a way to inject assembly without the function call overhead. That's what https://
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yvdriess
1y ago
Language safety helps get you 80% of the way there, but you are still working from software on top of fundametally unsafe hardware. Companies and agencies are and, increasingly, will pour money into hardware that give certain safety and sec
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yvdriess
1y ago
Totally agree. I have experienced 'ideal' circumstances of 33% taken/untaken branches where you will be hard pressed to make cmov perform better on real life workloads. Pass along other data inputs that do predict better and
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yvdriess
1y ago
I wouldn't say they contain any model of the world. They're a statistical predictive model, which have proven effective at certain tasks. My take is that the demoware part is not inherent to the NN approach, but rather that the t
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yvdriess
1y ago
Required background music for reading the article: https://www.youtube.com/watch?v=Azsk21MpbUk
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yvdriess
1y ago
And tilera in their DPUs
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yvdriess
1y ago
If anything that would be a boost to Intel. One of their problems is GPU capex sucking the air out of the room.
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yvdriess
1y ago
Something that could help is to use llvm-mca or similar to get an idea of the potential speedup.
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yvdriess
1y ago
One of the key innovations behind the DNN/CNN models was Mechanical Turk. OpenAI used a similar system extensively to improve the early GPT models. I would not be surprised that the practice continues today; NN models needs a lot of qu
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yvdriess
1y ago
It would be a waste to use this to just make DIMMs. It's only transistors, like SRAM cells, so you can efficiently fab them on the same process technology and the same dies as your logic. Then again, there is wear, so either you accept
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yvdriess
1y ago
AFAIK the dark silicon term is specifically those transistors not always powered on. Doping the Si substrate to turn it into transistors is not going to change the heat profile, so I don't think dummy transistors are added on purpose
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yvdriess
1y ago
There's tricks to improve the performance of pointer chasing on modern uarchs (cfr go's Greentea GC). You want to batch the address calculation/loading, deref/load and subsequent dependent ops like marking. Reorder buffe
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yvdriess
1y ago
That's most of the work performed by a marking GC. How much a GC is of total cpu cost totally depends on the application, the GC implementation and the language. It's famously hard to measure what the memory management overhead is
80.
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yvdriess
1y ago
The cost of a string array is paid on every GC phase. That array may/contains references so the gc has to check each element every time to check if anything changed. An int array cannot contain references so it can be skipped. edit: Th
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yvdriess
1y ago
A good opportunity to point people to the paper with my favorite title of all time: "How to wreck a nice beach you sing calm incense" https://dl.acm.org/doi/10.1145/1040830.1040898
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yvdriess
1y ago
> With 44GB of SRAM per Cerebras chip, you'd need 45 chips chained together. $3m per chip. $135m total to run this. That on-chip SRAM memory is purely temporary working memory and does need to hold the entire model weights. The Cere
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yvdriess
1y ago
Branch predictors have gotten really good and it often now makes more sense to rely on it rather than working away the branches. For example, modern compilers will very rarely introduce conditional moves (cmov) x86 because they are nearly a
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yvdriess
1y ago
What do you mean with necessary context? Modern compilers all autovectorize really well. Usually writing plain canonical loops with plain C arrays is a good way to write portable optimal SIMD code. The usual workflow I use is to translate t
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yvdriess
1y ago
It's not the same, but boy it sure does rhyme. Typical prose in late 90's early 00s: Designing the right UML meta-schema and UML diagram will generate a bug-free source code of the program, enabling even non-programmers to create
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yvdriess
1y ago
Can you still call it a spring cleaning when you take out support walls in the process?
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yvdriess
1y ago
There's no single good way, but yes as you said, logical deduction based on the surrounding instructions and their hardware counters is a way to do it. Instruction B might be collecting a ton of hardware counted cycles, but it could be
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yvdriess
1y ago
https://archive.org/details/computerarchitectureaquantitativ...
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yvdriess
1y ago
Take front end bound with a grain of salt. Frequently I find a backend backpressure reason for it, e.g. long-tail memory loads needed for a conditional branch or atomic. There are limitations to sampling methods and top down analysis, consi
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yvdriess
1y ago
For the readers that might miss it: that the last sentence was sarcastic: https://www.reuters.com/graphics/GLOBAL-ENVIRONMENT/INSECT-A...
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