visionscaper

10 ms·

31.
by visionscaper 8y ago
From experience I know that models using RNNs have trouble training with FP16 precision. The common solution is to do training in FP32 and inference in FP16. To make this happen you often have to implement custom code (e.g. using Tensorflow
32.
by visionscaper 8y ago
Although the RTX 2080 Ti performs significantly better than the 1080 Ti, I'm still drawn towards the 1080 Ti; I can buy two second-hand 1080 Ti's for the price of one new 2080 Ti, providing me the double amount of memory, plus,
33.
by visionscaper 8y ago
I got this response from Nvidia customer care concerning these questions: "Hello Freddy, Thus far we do not have any information from PR / Marketing on GeForce GTX 20 series Tensor core nor float16 compute performance. If or when
34.
by visionscaper 8y ago
> It may well be that NVidia will make them available for inference via DirectX so they can do AI based denoising and anti aliasing in games but artificially limit support in frameworks for training so as not to eat into the Quadro &#x2F
35.
by visionscaper 8y ago
Is anything known about the number of tensor cores in the new 2080 Ti? What about the float16 performance using the Tensor cores? I couldn't find this on the spec page [1]. [1] https://www.nvidia.com/en-us/geforce&
36.
Deep Learning Hardware Limbo(timdettmers.com)
3 points by visionscaper 9y ago|0 comments
37.
by visionscaper 9y ago
There had been a lot of research on this topic (just Google it), with good results.
38.
by visionscaper 9y ago
Thanks, I also read the article better now. I updated my comment.
39.
by visionscaper 9y ago
The "NVIDIA Tesla Family Specification Comparison" table indicates 112 TFLOPS "Tensor Performance (Deep Learning)" for Tesla V100 (PCIe). Is that double precision? The Nvidia 1080 Ti has a double precision performance of
40.
by visionscaper 9y ago
I might be mistaken, but these servers just have one GTX 1080.
41.
by visionscaper 9y ago
Yes, true, Von Neumann is dead, long live Von Neuman! ;) The difference is of course that we should not see the whole cluster of cores as a Von Neumann machine, the memory bandwidth is just too low to drive multiple cores with some external
42.
by visionscaper 9y ago
We already have practical use cases: training and evaluation of large neural networks.
43.
by visionscaper 9y ago
The Von Neumann architecture is dead, IMHO future computing architectures involve many cores, all with local memory (not just a bit of cache), Tensor computing capabilities and very high bandwidth connecting these cores. Intel has Xeon Phi,
44.
Understanding deep learning requires rethinking generalization(arxiv.org)
131 points by visionscaper 10y ago|18 comments
45.
Zero-Shot Translation with Google Multilingual Neural Machine Translation System(research.googleblog.com)
2 points by visionscaper 10y ago|0 comments
46.
by visionscaper 10y ago
There seems to be considerable effort being undertaken to allow TensorFlow to work with OpenCL [0]. Also see [1]. This coincides nicely with the introduction of these AMD cards. I'm looking forward to the day that Nvidia gets some comp
47.
by visionscaper 10y ago
A few months ago I started working on a large web application that is being implemented with Polymer. A few take a ways that are top of mind: 1) Very easy to learn, but it has no idiomatic way to write large applications; it is not a framew
48.
by visionscaper 10y ago
>> are now going to hit a new plateau in machine learning- or whether "this time it's different" I think it is actually both, yes we are going to hit a new plateau and yes this time it's different. It is different
49.
by visionscaper 10y ago
Good question. Human decisions might even be more difficult to explain fully, so I'm not sure if this regulation makes any sense. It might in general be possible though to analyze what features where most important to a decision. How e
50.
by visionscaper 10y ago
Is this what you are looking for? https://github.com/carpedm20/NTM-tensorflow
51.
by visionscaper 10y ago
Apart from the content of this research, to me, this method of publishing is the future : here, in one github repo, you can find the paper and the code such that you can perform the experiments done in the research yourself. Well done!
52.
by visionscaper 10y ago
> I'm not a fan of defensive programming as it can hide an obvious bug for a long time (I consider it a Good Thing that the program crashed otherwise we might have gone months, or even years, with noticing the actual bug). Not when
53.
by visionscaper 10y ago
With defensive coding I indeed meant defensive programming. You always want to fail fast (faster also means that you can fix more bugs), but this is often interpreted as "fail hard ": no prevention or mitigation what so ever. In
54.
by visionscaper 10y ago
This article promotes the fail-fast approach, something I very much dislike (against popular opinion it seems). I'm very much in favor of the opposite approach, defensive coding. Often when I read opinion pieces about how bad defensive
55.
Scaling Memory-Augmented Neural Networks with Sparse Reads and Writes(xxx.lanl.gov)
3 points by visionscaper 10y ago|1 comments
56.
by visionscaper 10y ago
According to Apple's presentation, the function keys are available when you press the Fn key!
57.
by visionscaper 10y ago
Won't you miss macOS? It is not just about the hardware, it is the combination of the macbook with the OS.
58.
by visionscaper 10y ago
What I noticed is what I think is a thinner screen bezel, which I love. It also seems that the body is less wide. Or I'm I the only one noticing this?
59.
by visionscaper 10y ago
Hmmm, interesting. I wonder what this means for the new Intel Xeon Phi Knights Landing? I liked the approach of many cores on one bootable chip, all having a reasonable amount of local memory, and high bandwidth interconnects: no need to of
60.
by visionscaper 10y ago
Motivation? Developing applications and services people truly enjoy. Dream? Writing code that is used continuously in production for centuries. ;)

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