tntn

12 ms·

61.
by tntn 7y ago
Fin width is around the same size as the node name, but yeah gate length at 7nm is nowhere near 7nm.
62.
by tntn 7y ago
How does this do anything to alleviate spectre and friends? Software isolation doesn't work ( https://arxiv.org/abs/1902.05178 ), so the only protection you get is from process isolation, and I assume this doesn&#x2
63.
by tntn 7y ago
Ditto, but late 1990s instead of 1970s. I survived (so far) as well :)
64.
by tntn 7y ago
That would be great. Subway costs are absolutely ridiculous, so it would be fantastic if the boring company decides to build exactly the same thing for much less.
65.
by tntn 7y ago
> good cache-DMA integration but this not working across NUMA nodes. Ideally Intel would improve this feature to be NUMA-aware How do you propose they do this? You can't magically move the physical devices to the other socket, and t
66.
by tntn 7y ago
I have strong feelings about this. When I was in university, I would quite frequently just going wander through the stacks in random sections, look at the titles, and pick up some that seemed interesting. I'd also go to some sections I
67.
by tntn 7y ago
CM-1, linked in 'dragontamer's comment.
68.
by tntn 7y ago
There are some recent developments that are potentially scary, but I don't see how this is one of them. Humans are really good at guessing approximate age, sex, and ethnicity from a voice. I'm not surprised in the least that some
69.
by tntn 7y ago
But if the duration is > 65535 ticks, the calculated duration will be wrong, no? There is no mechanism to count how many times TCNT1 overflows, so it will be incorrect if the duration of what you are timing exceeds 65535 ticks.
70.
by tntn 7y ago
Apple and AMD just have to ask TSMC to do their magic to make 7nm chips - they haven't had to do anything spectacular, just use TSMCs design libraries. Intel is struggling because of their struggles with 10nm. Apple and AMD are not bec
71.
by tntn 7y ago
Right, but Intel isn't falling behind AMD or apple in this comparison - it is falling behind TSMC.
72.
by tntn 7y ago
Still need the tag to know which way to read and whether there is a hit, so the statement is pretty much accurate.
73.
by tntn 7y ago
That paper primarily discusses a (cooperative) covert channel between processes using the FPU TS register, then mentions that caches or the TLB could similarly be used to implement a covert channel. IMO, meltdown and Spectre and MDS are a d
74.
by tntn 7y ago
Linux ignored those concerns as well. Torvalds didn't think hyperthreading was at fault, and Kleen stated that it was a "user space problem." In other words, there wasn't exactly consensus that there was something to fix
75.
by tntn 7y ago
And how about the generations of computer architecture professors that have promulgated the lie that is "architecturally visible state," am I right? Speculative execution is fine, cause we just throw away the results before they b
76.
by tntn 7y ago
Right, I think it makes a lot of sense that the engineers designing the cores didn't think about the security implications. I know I wouldn't have.
77.
by tntn 7y ago
Cool. In some places it is common to only capitalize acronyms if they are pronounced as individual letters.
78.
by tntn 7y ago
I find it very confusing that you seem to use "real number" and "floating point number" interchangeably. Like this: > The DFT over the reals is not lossless. Using floats, for example, and applying it to max_float ove
79.
by tntn 7y ago
The good thing about standards is everyone can have their own.
80.
by tntn 7y ago
Can you give some details re: > The FFT using real numbers is not lossless The DFT over the reals is invertible, right? How can it be invertible but not lossless?
81.
by tntn 7y ago
I don't see how this is relevant. Certainly related, but not immediately relevant. The Nyquist rate / frequency (depending on where you stand) determines whether the process of sampling is invertible, but the FFT exists independen
82.
by tntn 7y ago
In my mind, OpenAI is different from the other labs you mention because their goal is to harness the power of their own god. Bell Labs, for most of its history, was tasked with improving the Bell System, so anything that was remotely relate
83.
by tntn 7y ago
The adoption of FPGAs is, IMO, limited by the quantity of people who can write RTL. Lots of people can write assembly, a lot more can write C or C++, and legion of people can write software in higher level languages. Compared to the quantit
84.
by tntn 7y ago
> with tons of in-order cores It's worth noting that GPUs are only "in order" because the computer architecture community has decided that "out of order" means "some variation of Tomasulo." Every GPU ar
85.
by tntn 7y ago
> tasked with optimizing the cloth simulation code in Shadow of the Tomb Raider. It had been fine tuned extensively with PowerPC intrinsics for the Xbox 360 but its performance was lacking on XboxOne (x64). Sounds to me like they were re
86.
by tntn 7y ago
Not entirely true - Scott Gray knows: https://github.com/NervanaSystems/maxas/wiki/SGEMM IIRC his kernels shipped in cuBLAS at some point.
87.
by tntn 7y ago
I agree that the majority of the cycles go to traditional codes, but there is quite a bit of ML/AI happening on Summit. From your link: "New Frontiers for Material Modeling via Machine Learning Techniques" "Large scale d
88.
by tntn 7y ago
> So reader/writer locks tend to rely on the additional concurrency, and on readers not blocking other readers. > software has a constant tendency to get slower, absent deliberate and careful efforts to hold the line, as develope
89.
by tntn 7y ago
But ROCm isn't an API is it? It's a "platform," whatever that means, and so software still has to use either hip or OpenCL, right?
90.
by tntn 7y ago
... except for on Summit. "Exascale Deep Learning for Climate Analytics" won the 2018 Gordon bell using summit.

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