tails4e

33 ms·

301.
by tails4e 6y ago
I agree, but what I dont like is how to function a device needs Internet connectivity. Our smart vaccum cannot work with its app unless its connected to thr Internet. The nice thing is we can see its progress on mobile data, etc, but its a
302.
by tails4e 6y ago
What do you intend to do with the 5GHz IO? Assuming it's for peripheral connectivity, then maybe the Ultra96 would work. It does not have general purpose transceivers availbals, but it has a PS (processing subsystem) that has lots of c
303.
by tails4e 6y ago
Thanks, interesting to see that this seems like a niche market thats relitively untapped. What seems initially strange is its protecting SW that can be as much as 100k per seat (e.g. ASIC EDA licenses) I'm sure less scrupulous operatio
304.
by tails4e 6y ago
Flexlm is alive and kicking. All of thr EDA software I use daily is protected by it. Its so archaic I can only assume its been broken seven ways from Sunday, but its still there. Id be interested to know if anyone here knows why it's t
305.
by tails4e 6y ago
This sounds interesting. Any guides for how to use as for boot only and how to attach an SSD to a pi? What powers the ssd etc? The last pi I tried was a 3b
306.
Ask HN: Always on low power home server
98 points by tails4e 6y ago|137 comments
307.
by tails4e 6y ago
Thanks that helps clarify things, also nice to see Robert Baruch's tutorial.
308.
by tails4e 6y ago
I'd be interested in this too, I'm all for improving on the standard HDLs, but from this example I see more downsides than upsides, mostly due to the fact the synatx looks very verbose. Part of the is because its layered on top of
309.
by tails4e 6y ago
This is exactly how I feel, except I also have technical responsibilities, meetings dominate my day. Some technical meetings sure, but a lot of status and syncs, and a lot of email. I'm lucky to get an hour a day between 9 and 5 to eng
310.
by tails4e 6y ago
It's kind of ironic, but I've the exact opposite problem in linux mint, just installed the xfce version and when I type in my password it sometimes does not unlock, the screen kind of hangs with a spinning icon. I can recover by s
311.
by tails4e 6y ago
Yep, it's the de facto automation language for IC design and EDA. I use it everyday. It's not a language I'd use for anything else, but as almost all EDA tools embed it, you have to learn it to be productive in the digital EE
312.
by tails4e 6y ago
Matlab licensing is prohibitive for everyone in a team to have one and WAN licences are 4x the cost of a seat, so we tend to have code capable of running in both octave and matlab in general. The model is all users can use octave for lower
313.
by tails4e 6y ago
The file size limit of git is a bit annoying. I've moved to svn for a few projects that required large binaries to be shared and version controlled along with their source (for hardware design projects) and hit the 100Mbyte (IIRC) file
314.
by tails4e 6y ago
Noce project. How do you get around the fact that the SD cards often die? Every pi I've left running as a 24/7 has died weka to months later.
315.
by tails4e 6y ago
I agree in general its an issue when basics are being thought by any person who does not really understand what they are teaching. They end up tecaching the rote method and not the intuition. Happens all the time in maths.
316.
by tails4e 6y ago
This is very impressive, especially the add ons like the calculator and Lcd, show how much work can be done with 2600 instructions per second when things are highly optimized.
317.
by tails4e 6y ago
I have a system called KNX, its not wireless but each switch is independent of each actuated function (light, blinds, etc). The main advantage is the wiring is simple, a bus for all switches and all lights go back to a relay board. Switches
318.
by tails4e 6y ago
From this [0] it suggests the xilnx floating point core can run at >600Mhz,and the latency of many operations is just a few cycles. Also a s its pipelined the throughput could mean one result per clock, depending on how you configure th
319.
by tails4e 6y ago
You're right about tcl, a comment can mess stuff up as the comment is a command that says do nothing. It's a terrible language, and that may be it's worst flaw, but it's still in every EDA tool. It's kind of like ho
320.
by tails4e 6y ago
I have not benchmarked the open source PnR tools, but I expect they are orders of magnitude worse qor than what a commercial one can do. I don't know a LOC comparison between SV and PnR but I'd say both are huge undertakings at co
321.
by tails4e 6y ago
My point a out SV was that the two major open source simulation tools (Icarus and Verilator) both only support a subset of SV, and not SV 2017, but a lot of SV 2009 is still not supported. Vivado has a free (not open) SV simulator that supp
322.
by tails4e 6y ago
Tcl is the de facto EDA tool scripting language. It's standard in the HW design world - of course it does not stop there being a second alternative scripting language, but not having TCL would alienate much of the HW design community,
323.
by tails4e 6y ago
Version control aside, Vivado is very good at what its intended to do, take RTL and synthesize, place and route, STA, and simulate it all in one tool. With plenty of higher level abstractions like IPI, etc. It's really good at visualis
324.
by tails4e 6y ago
Open source tooling would not materalize if bitstream formats were opened, at least not competitive ones. Why? There are already open source versions for synthesis and PnR , and while functional they are very far off the 'terrible&#x2
325.
by tails4e 6y ago
I imagine they are using a 3rd party prototyping solution like HAPS from synosys, which uses Xilinx FPGAs inside - for good reason, for quite some time Xilinx have had some very large devices built specifically for this market. It must stin
326.
by tails4e 6y ago
My day job is ASIC design and we do some prototyping on FPGAs, so the exact same RTL is used as an input. We always benchmark power, performance, etc between ASIC and FPGA, so this is based on some real deigns. A 5x reduction in power is fa
327.
by tails4e 6y ago
Yes, and FPGAs can be better than GPUs for some applications, even more power efficient, and cost effective.
328.
by tails4e 6y ago
I agree with the sentiment, but the numbers are off. It's about 10x the power worst case (maybe 5x for some dsp heavy apps) and also around 5 to 10x for speed. An FPGA can easily run at 100s of MHz, up to 500 with good design pipelinin
329.
by tails4e 6y ago
I wonder would a compile time switch that enbales 'safe by default' be an option. At least then it means programs could transition to becoming fully able to compile in this safe mode and only let subsets (e.g. certain files in a p
330.
by tails4e 6y ago
I would guess the accidents per mile driven could be up also, and if people are really reckless the deaths per mile driven and per accident could have risen

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