shuklaayush

3 ms·

1. 1.▲
   by shuklaayush 2mo ago

   Author here, thanks for all the comments, didn't expect this to get picked up. I've been working on speeding up RISC-V emulation for work and wrote this up as I went. Still learning this space, so I'd be keen to hear from peo
2. 2.▲
   by shuklaayush 2mo ago

   Neat, I guess this gets you the same output as a per-instruction translator without having to run an assembler and linker over the whole program. I should try this and add it to the post for completeness
3. 3.▲
   by shuklaayush 2mo ago

   Yeah, I went back and forth on the title. It's definitely not an interpreter. I still think of emulation as the umbrella term though, running code for one architecture on another, with interpretation and dynamic/static recompilati
4. 4.▲
   by shuklaayush 2mo ago

   Hey, author here. That's fair, I didn't have the background. I knew interpreters would be slow, I just didn't expect it to still be ~10x after all the optimizations. After reading about it more though, that does seem to be th
5. 5.▲
   Pushing the limits of RISC-V emulation(shuklaayu.sh)

   2 points by shuklaayush 2mo ago|1 comments
6. 6.▲
   by shuklaayush 2mo ago

   I’ve been working on speeding up RISC-V emulation for my work, and I wrote a detailed blog about my learning. For some benchmarks, it now reaches roughly 85% of equivalent native throughput on an Apple M3. I’d appreciate feedback from peopl
7. 7.▲
   Pushing the limits of RISC-V emulation(shuklaayu.sh)

   58 points by shuklaayush 2mo ago|35 comments