sb10q

5 ms·

1. 1.▲
   From Python to FPGA Bitstream Without Verilog/VHDL(git.m-labs.hk)

   2 points by sb10q 7y ago|0 comments
2. 2.▲
   by sb10q 8y ago

   It's possible to do a OSHW shader implementation, but we ran out of time/funding. And lack of shader support was hardly the biggest problem with that project.
3. 3.▲
   by sb10q 8y ago

   Original developer here. Really surprised it got posted on HN today and that the comments are quite positive. We're not working this anymore, though the original code evolved into other projects like ARTIQ. Today for video there is the