robin__j

4 ms·

1. 1.▲
   by robin__j 9y ago

   On FPGAs there is a third way for a register to get new values: FPGA configuration. When FPGA is re/configured initial values specified (like in previous post) will be set as value of FF. BTW This Xilinx white paper is a good read abou
2. 2.▲
   by robin__j 10y ago

   https://stackoverflow.com/a/34599081 In this SO answer does it by reducing the hash size from 160-bit to 4-bit.
3. 3.▲
   by robin__j 11y ago

   FWIW, Systems Engineer is the designation for entry level engineers at Infosys. Since it's a service company with engineers working on all sorts of techs it doesn't really make sense calling those positions Java Dev or Web Dev or