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pavehawk2007
searching PlanetScale…
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7 ms
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1.
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by
pavehawk2007
4y ago
AIA is still a work in progress. The last draft release was 18 days ago, and it is at version 0.3.0-31. Verify here: https://github.com/riscv/riscv-aia/releases As the article mentions, there was a major change
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Gamification, life, and the pursuit of a gold badge
(web.eecs.utk.edu)
35 points
by
pavehawk2007
5y ago
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11 comments
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by
pavehawk2007
5y ago
A and T are "caller saved", meaning that if I want their value after I make a function call, I, the caller, must save the registers. So, li t0, 10 call somefunc # Must consider t0 destroyed here unless we save it first The saved r
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More challenging projects every programmer should try
(web.eecs.utk.edu)
757 points
by
pavehawk2007
6y ago
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223 comments
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by
pavehawk2007
6y ago
I don't understand how you get that SATP is a non-leaf PTE. SATP is a register, and a fence is for memory ordering. A register is a particular kind of memory, but in this context, I do not believe the authors are talking about register
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pavehawk2007
6y ago
Here's the specification's recommended use of SFENCE.VMA, which is just a fancier version of what I wrote above: Page 66 and 67: The following common situations typically require executing an SFENCE.VMA instruction: 1. When softwa
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by
pavehawk2007
6y ago
I don't think it's as cut and dry as "execute sfence.vma every time you write to SATP" as you say for the following reasons. 1. The sfence.vma is much like a TLB flush. Just like a normal fence, it ensures that orderings
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Progress bars still lie
(web.eecs.utk.edu)
201 points
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pavehawk2007
6y ago
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227 comments
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Getting Graphical Output from Our Custom RISC-V Operating System in Rust
(blog.stephenmarz.com)
3 points
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pavehawk2007
6y ago
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0 comments
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by
pavehawk2007
6y ago
Properitary = custom...it just means that it's particular to a single chip manufacturer. They have set aside opcode space for doing just that. RISC-V can't forecast everything someone will want to do with a RISC-V chip. Instead, t
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by
pavehawk2007
6y ago
To my knowledge, and looking at http://riscv.org , this is supposed to be an open-ISA (instruction set architecture). Their specification allows chip manufacturers to write their own extensions using the "custom" opcode
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by
pavehawk2007
6y ago
Do you mean like a hardware board for educational purposes? I use the Sipeed Maixduino (or Maix Bit) for my classes. The problem with these boards is there is a lot of esoteric, non-documented items. For a well documented hardware board, I
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by
pavehawk2007
6y ago
I've been trying to use the Sipeed Maixduino. It's much like the hifive1 except it uses the Kendryte K210, which is a fully supported RV64GC dual-core. It even supports supervisor and user modes. It's also relatively cheap. T
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pavehawk2007
6y ago
I'm writing this from the OS's perspective. Linux abstracts this away, but we have to do it to get the same abstraction. You can see under the user space portion how simple it is to grab a framebuffer, which is then mapped into us
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by
pavehawk2007
6y ago
I think until they get into the mass production market, risc-v will be fairly expensive compared to the Rpi. Take a look at the full stack Hifive Unleashed ($1000) or the cheaper Hifive1 (revb): https://www.sifive.com/boards
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RISC-V OS using Rust: Graphics
(blog.stephenmarz.com)
2 points
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pavehawk2007
6y ago
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0 comments
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by
pavehawk2007
6y ago
I'm assuming LPDDR? I think the goals between the two are a bit different. I think that embedded gets quite messy since it's particularly targeted. Thanks for letting me know of your experience!
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IEEE-754 Floating Point
(courses.stephenmarz.com)
2 points
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pavehawk2007
6y ago
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0 comments
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pavehawk2007
6y ago
Wonder if this spec will make it easy for embedded systems to catch up. It always seems like they lag behind what's cutting edge. Maybe that's a cost/benefit analysis.
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by
pavehawk2007
6y ago
Rust has come a LOOOOOONG way. I'm really impressed with what they've accomplished in just a short time.
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Let's make a Teeny Tiny compiler
(austinhenley.com)
36 points
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pavehawk2007
6y ago
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35 comments
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by
pavehawk2007
6y ago
I loved this series. I even made a Rust version of it with very little compilers knowledge (this one is written in Python): http://github.com/sgmarz/ttrust
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Let's make a Teeny Tiny compiler
(austinhenley.com)
3 points
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pavehawk2007
6y ago
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1 comments
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Let's make a Teeny Tiny compiler, part 3
(web.eecs.utk.edu)
5 points
by
pavehawk2007
6y ago
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0 comments
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by
pavehawk2007
6y ago
As a kid, I always thought this was all mysterious. Demystifying it is always fun.
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by
pavehawk2007
6y ago
Unfortunately no. I've been reverse engineering it from their BSP. It's slower than I'd like.
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by
pavehawk2007
6y ago
Alternative? No. It's a component of the full RISC-V operating system.
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by
pavehawk2007
6y ago
I use the Kendryte K215 which is a dual-core, RV64GC inside of the Sipeed Maixduino (Arduino form factor): https://www.seeedstudio.com/sipeed
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by
pavehawk2007
6y ago
Thank you! I appreciate the kind words.
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by
pavehawk2007
6y ago
Minix 3 has taken on a life of its own and is maintained here: https://minix3.org/ I had trouble finding really good documentation on the filesystem itself, so it took a bit of trial-and-error to figure out the structure.
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